amiro-lld / include / alld_lis331dlh.h @ d6728c5b
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/*
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AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2018 Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _AMIROLLD_LIS331DLH_H_
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#define _AMIROLLD_LIS331DLH_H_
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#include <amiro-lld.h> |
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#if defined(AMIROLLD_CFG_USE_LIS331DLH) || defined(__DOXYGEN__)
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/**
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* @brief A falling edge indicates an interrupt.
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*/
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#define LIS331DLH_LLD_INT_EDGE APAL_GPIO_EDGE_FALLING
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/**
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* @brief The LIS331DLH driver struct
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*/
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typedef struct { |
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apalSPIDriver_t* spid; /**< @brief The SPI Driver */
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} LIS331DLHDriver; |
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/**
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* @brief SPI access modes.
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*/
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typedef enum { |
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LIS331DLH_LLD_SPI_MULT = 0x40u,
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LIS331DLH_LLD_SPI_READ = 0x80u,
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LIS331DLH_LLD_SPI_WRITE = 0x00u,
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} lis331dlh_lld_SPI_mode_t; |
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/**
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* @brief Registers.
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*/
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typedef enum { |
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LIS331DLH_LLD_REGISTER_WHO_AM_I = 0x0fu,
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LIS331DLH_LLD_REGISTER_CTRL_REG1 = 0x20u,
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LIS331DLH_LLD_REGISTER_CTRL_REG2 = 0x21u,
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LIS331DLH_LLD_REGISTER_CTRL_REG3 = 0x22u,
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LIS331DLH_LLD_REGISTER_CTRL_REG4 = 0x23u,
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LIS331DLH_LLD_REGISTER_CTRL_REG5 = 0x24u,
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LIS331DLH_LLD_REGISTER_HP_FILTER_RESET = 0x25u,
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LIS331DLH_LLD_REGISTER_REFERENCE = 0x26u,
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LIS331DLH_LLD_REGISTER_STATUS_REG = 0x27u,
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LIS331DLH_LLD_REGISTER_OUT_X_L = 0x28u,
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LIS331DLH_LLD_REGISTER_OUT_X_H = 0x29u,
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LIS331DLH_LLD_REGISTER_OUT_Y_L = 0x2Au,
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LIS331DLH_LLD_REGISTER_OUT_Y_H = 0x2Bu,
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LIS331DLH_LLD_REGISTER_OUT_Z_L = 0x2Cu,
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LIS331DLH_LLD_REGISTER_OUT_Z_H = 0x2Du,
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LIS331DLH_LLD_REGISTER_INT1_CFG = 0x30u,
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LIS331DLH_LLD_REGISTER_INT1_SOURCE = 0x31u,
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LIS331DLH_LLD_REGISTER_INT1_THS = 0x32u,
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LIS331DLH_LLD_REGISTER_INT1_DURATION = 0x33u,
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LIS331DLH_LLD_REGISTER_INT2_CFG = 0x34u,
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LIS331DLH_LLD_REGISTER_INT2_SOURCE = 0x35u,
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LIS331DLH_LLD_REGISTER_INT2_THS = 0x36u,
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LIS331DLH_LLD_REGISTER_INT2_DURATION = 0x37u,
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} lis331dlh_lld_register_t; |
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/**
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* @brief WHO_AM_I register constant content.
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*/
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typedef enum { |
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LIS331DLH_LLD_WHO_AM_I = 0x32,
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} lis331dlh_lld_whoami_t; |
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/**
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* @brief Control register 1 flags.
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*/
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typedef enum { |
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LIS331DLH_LLD_PM_OFF = 0x00u,
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LIS331DLH_LLD_PM_ODR = 0x20u,
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LIS331DLH_LLD_PM_0_5_HZ = 0x40u,
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LIS331DLH_LLD_PM_1_HZ = 0x60u,
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LIS331DLH_LLD_PM_2_HZ = 0x80u,
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LIS331DLH_LLD_PM_5_HZ = 0xA0u,
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LIS331DLH_LLD_PM_10_HZ = 0xC0u,
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LIS331DLH_LLD_DR_50HZ_37LP = 0x00u,
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LIS331DLH_LLD_DR_100HZ_74LP = 0x08u,
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LIS331DLH_LLD_DR_400HZ_292LP = 0x10u,
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LIS331DLH_LLD_DR_1000HZ_780LP = 0x18u,
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LIS331DLH_LLD_X_AXIS_ENABLE = 0x01u,
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LIS331DLH_LLD_Y_AXIS_ENABLE = 0x02u,
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LIS331DLH_LLD_Z_AXIS_ENABLE = 0x04u,
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} lis331dlh_lld_ctrl_reg1_t; |
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/**
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* @brief Control register 2 flags.
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*/
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typedef enum { |
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LIS331DLH_LLD_REBOOT = 0x80u,
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LIS331DLH_LLD_HPM_NORMAL0 = 0x00u,
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LIS331DLH_LLD_HPM_REF = 0x20u,
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LIS331DLH_LLD_HPM_NORMAL1 = 0x40u,
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LIS331DLH_LLD_FDS_BYPASS = 0x00u,
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LIS331DLH_LLD_FDS_FILTER = 0x10u,
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LIS331DLH_LLD_HP_EN_INT2 = 0x08u,
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LIS331DLH_LLD_HP_EN_INT1 = 0x04u,
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LIS331DLH_LLD_HPCF_8 = 0x00u,
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LIS331DLH_LLD_HPCF_16 = 0x01u,
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LIS331DLH_LLD_HPCF_32 = 0x02u,
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LIS331DLH_LLD_HPCF_64 = 0x03u,
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} lis331dlh_lld_ctrl_reg2_t; |
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/**
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* @brief Control register 3 flags.
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*/
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typedef enum { |
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LIS331DLH_LLD_INT_HIGH = 0x00u,
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LIS331DLH_LLD_INT_LOW = 0x80u,
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LIS331DLH_LLD_PUSH_PULL = 0x00u,
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LIS331DLH_LLD_OPEN_DRAIN = 0x40u,
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LIS331DLH_LLD_LIR2_LATCH = 0x20u,
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LIS331DLH_LLD_I2_CFG_I2 = 0x00u,
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LIS331DLH_LLD_I2_CFG_I1_I2 = 0x08u,
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LIS331DLH_LLD_I2_CFG_DRY = 0x10u,
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LIS331DLH_LLD_I2_CFG_BOOT = 0x18u,
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LIS331DLH_LLD_LIR1_LATCH = 0x04u,
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LIS331DLH_LLD_LIR1_NO_LATCH = 0x00u,
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LIS331DLH_LLD_I1_CFG_I1 = 0x00u,
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LIS331DLH_LLD_I1_CFG_I1_I2 = 0x01u,
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LIS331DLH_LLD_I1_CFG_DRY = 0x02u,
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LIS331DLH_LLD_I1_CFG_BOOT = 0x03u,
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} lis331dlh_lld_ctrl_reg3_t; |
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/**
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* @brief Control register 4 flags.
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*/
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typedef enum { |
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LIS331DLH_LLD_BDU_CONT = 0x00u,
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LIS331DLH_LLD_BDU_STOP = 0x80u,
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LIS331DLH_LLD_BLE_LE = 0x00u,
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LIS331DLH_LLD_BLE_BE = 0x40u,
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LIS331DLH_LLD_FS_2G = 0x00u,
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LIS331DLH_LLD_FS_4G = 0x10u,
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LIS331DLH_LLD_FS_8G = 0x30u,
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LIS331DLH_LLD_STSIGN_POS = 0x00u,
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LIS331DLH_LLD_STSIGN_NEG = 0x08u,
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LIS331DLH_LLD_ST_DISABLE = 0x00u,
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LIS331DLH_LLD_ST_ENABLE = 0x02u,
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LIS331DLH_LLD_SIM_4WI = 0x00u,
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LIS331DLH_LLD_SIM_3WI = 0x01u,
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} lis331dlh_lld_ctrl_reg4_t; |
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/**
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* @brief Control register 5 flags.
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*/
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typedef enum { |
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LIS331DLH_LLD_SLEEP_TO_WAKE_OFF = 0x00u,
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LIS331DLH_LLD_SLEEP_TO_WAKE_ON = 0x03u,
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} lis331dlh_lld_ctrl_reg5_t; |
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/**
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* @brief Axis enum.
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*/
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typedef enum { |
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LIS331DLH_LLD_X_AXIS = 0,
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LIS331DLH_LLD_Y_AXIS = 1,
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LIS331DLH_LLD_Z_AXIS = 2,
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} lis331dlh_lld_axis_t; |
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/**
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* @brief Interrupt enum.
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*/
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typedef enum { |
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LIS331DLH_LLD_INT1 = 0x01,
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LIS331DLH_LLD_INT2 = 0x02,
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} lis331dlh_lld_int_t; |
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/**
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* @brief Config register struct.
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*/
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typedef union { |
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uint8_t data[5];
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struct {
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uint8_t ctrl_reg1; |
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uint8_t ctrl_reg2; |
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uint8_t ctrl_reg3; |
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uint8_t ctrl_reg4; |
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uint8_t ctrl_reg5; |
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} registers; |
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} lis331dlh_lld_cfg_t; |
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/**
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* @brief Interrupt config register flags.
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*/
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typedef enum { |
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LIS331DLH_LLD_INT_CFG_X_LOW_ENABLE = 0x01,
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LIS331DLH_LLD_INT_CFG_X_HIGH_ENABLE = 0x02,
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LIS331DLH_LLD_INT_CFG_Y_LOW_ENABLE = 0x04,
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LIS331DLH_LLD_INT_CFG_Y_HIGH_ENABLE = 0x08,
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LIS331DLH_LLD_INT_CFG_Z_LOW_ENABLE = 0x10,
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LIS331DLH_LLD_INT_CFG_Z_HIGH_ENABLE = 0x20,
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LIS331DLH_LLD_INT_CFG_D6 = 0x40,
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LIS331DLH_LLD_INT_CFG_AOI = 0x80,
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} lis331dlh_lld_int_cfg_reg_t; |
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/**
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* @brief Status register flags.
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*/
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typedef enum { |
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LIS331DLH_LLD_STATUS_ZYXOR = 0x01,
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LIS331DLH_LLD_STATUS_Z_OR = 0x02,
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LIS331DLH_LLD_STATUS_Y_OR = 0x04,
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LIS331DLH_LLD_STATUS_X_OR = 0x08,
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LIS331DLH_LLD_STATUS_ZYXDA = 0x10,
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LIS331DLH_LLD_STATUS_Z_DA = 0x20,
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LIS331DLH_LLD_STATUS_Y_DA = 0x40,
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LIS331DLH_LLD_STATUS_X_DA = 0x80,
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} lis331dlh_lld_status_t; |
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/**
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* @brief Interrupt config struct.
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*/
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typedef struct { |
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uint8_t cfg_reg; |
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uint8_t threshold; |
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uint8_t duration; |
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} lis331dlh_lld_int_cfg_t; |
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#ifdef __cplusplus
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extern "C" { |
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#endif
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apalExitStatus_t lis331dlh_lld_read_register(const LIS331DLHDriver* const lisd, const lis331dlh_lld_register_t regaddr, uint8_t *data, const uint8_t length); |
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apalExitStatus_t lis331dlh_lld_write_register(const LIS331DLHDriver* const lisd, const lis331dlh_lld_register_t regaddr, const uint8_t *data, const uint8_t length); |
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apalExitStatus_t lis331dlh_lld_reset_hp_filter(const LIS331DLHDriver* const lisd); |
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apalExitStatus_t lis331dlh_lld_read_all_data(const LIS331DLHDriver* const lisd, int16_t *data, const lis331dlh_lld_cfg_t *cfg); |
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apalExitStatus_t lis331dlh_lld_read_data(const LIS331DLHDriver* const lisd, int16_t *data, const lis331dlh_lld_axis_t axis, const lis331dlh_lld_cfg_t *cfg); |
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apalExitStatus_t lis331dlh_lld_read_config(const LIS331DLHDriver* const lisd, lis331dlh_lld_cfg_t *cfg); |
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apalExitStatus_t lis331dlh_lld_write_config(const LIS331DLHDriver* const lisd, const lis331dlh_lld_cfg_t *cfg); |
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apalExitStatus_t lis331dlh_lld_read_int_config(const LIS331DLHDriver* const lisd, lis331dlh_lld_int_cfg_t *cfg, const lis331dlh_lld_int_t interrupt); |
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apalExitStatus_t lis331dlh_lld_write_int_config(const LIS331DLHDriver* const lisd, const lis331dlh_lld_int_cfg_t *cfg, const lis331dlh_lld_int_t interrupt); |
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apalExitStatus_t lis331dlh_lld_read_status_register(const LIS331DLHDriver* const lisd, uint8_t *status); |
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#ifdef __cplusplus
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} |
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#endif
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#endif /* defined(AMIROLLD_CFG_USE_LIS331DLH) */ |
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#endif /* _AMIROLLD_LIS331DLH_H_ */ |