amiro-lld / include / MPR121 / v1 / alld_MPR121_v1.h @ ef5bc242
History | View | Annotate | Download (9.359 KB)
1 | d6728c5b | Thomas Schöpping | /*
|
---|---|---|---|
2 | AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform.
|
||
3 | f125ae07 | Thomas Schöpping | Copyright (C) 2016..2019 Thomas Schöpping et al.
|
4 | d6728c5b | Thomas Schöpping | |
5 | This program is free software: you can redistribute it and/or modify
|
||
6 | f0ca400f | Thomas Schöpping | it under the terms of the GNU Lesser General Public License as published by
|
7 | d6728c5b | Thomas Schöpping | the Free Software Foundation, either version 3 of the License, or
|
8 | (at your option) any later version.
|
||
9 | |||
10 | This program is distributed in the hope that it will be useful,
|
||
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||
13 | f0ca400f | Thomas Schöpping | GNU Lesser General Public License for more details.
|
14 | d6728c5b | Thomas Schöpping | |
15 | f0ca400f | Thomas Schöpping | You should have received a copy of the GNU Lesser General Public License
|
16 | d6728c5b | Thomas Schöpping | along with this program. If not, see <http://www.gnu.org/licenses/>.
|
17 | */
|
||
18 | |||
19 | 5e2f673b | Marc Rothmann | /**
|
20 | 1d5bcc82 | Thomas Schöpping | * @file alld_MPR121_v1.h
|
21 | 5e2f673b | Marc Rothmann | * @brief Touch Sensor macros and structures.
|
22 | *
|
||
23 | * @addtogroup lld_touch
|
||
24 | * @{
|
||
25 | */
|
||
26 | |||
27 | 1d5bcc82 | Thomas Schöpping | #ifndef AMIROLLD_MPR121_V1_H
|
28 | #define AMIROLLD_MPR121_V1_H
|
||
29 | d6728c5b | Thomas Schöpping | |
30 | #include <amiro-lld.h> |
||
31 | |||
32 | 1d5bcc82 | Thomas Schöpping | #if (defined(AMIROLLD_CFG_MPR121) && (AMIROLLD_CFG_MPR121 == 1)) || defined(__DOXYGEN__) |
33 | d6728c5b | Thomas Schöpping | |
34 | ef078306 | Thomas Schöpping | /******************************************************************************/
|
35 | /* CONSTANTS */
|
||
36 | /******************************************************************************/
|
||
37 | |||
38 | d6728c5b | Thomas Schöpping | /**
|
39 | * @brief Maximum I2C frequency.
|
||
40 | */
|
||
41 | #define MPR121_LLD_I2C_MAXFREQUENCY 400000 |
||
42 | |||
43 | /**
|
||
44 | * @brief A falling edge indicates an interrupt.
|
||
45 | */
|
||
46 | #define MPR121_LLD_INT_EDGE APAL_GPIO_EDGE_FALLING
|
||
47 | |||
48 | ef078306 | Thomas Schöpping | /******************************************************************************/
|
49 | /* SETTINGS */
|
||
50 | /******************************************************************************/
|
||
51 | |||
52 | /******************************************************************************/
|
||
53 | /* CHECKS */
|
||
54 | /******************************************************************************/
|
||
55 | |||
56 | /******************************************************************************/
|
||
57 | /* DATA STRUCTURES AND TYPES */
|
||
58 | /******************************************************************************/
|
||
59 | |||
60 | d6728c5b | Thomas Schöpping | /**
|
61 | * @brief The MPR121 driver struct
|
||
62 | */
|
||
63 | typedef struct { |
||
64 | apalI2CDriver_t* i2cd; /**< @brief The I2C Driver */
|
||
65 | } MPR121Driver; |
||
66 | |||
67 | enum {
|
||
68 | MPR121_LLD_I2C_ADDR_FIXED = 0x5Au,
|
||
69 | MPR121_LLD_I2C_ADDR_VSS = 0x00u,
|
||
70 | MPR121_LLD_I2C_ADDR_VDD = 0x01u,
|
||
71 | MPR121_LLD_I2C_ADDR_SDA = 0x04u,
|
||
72 | MPR121_LLD_I2C_SOFTRESET = 0x63,
|
||
73 | }; |
||
74 | |||
75 | /**
|
||
76 | * @brief Registers of the mpr121.
|
||
77 | */
|
||
78 | typedef enum { |
||
79 | MPR121_LLD_REGISTER_TOUCH_STATUS = 0x00,
|
||
80 | MPR121_LLD_REGISTER_OOR_STATUS = 0x02,
|
||
81 | MPR121_LLD_REGISTER_FILTERED_DATA = 0x04,
|
||
82 | MPR121_LLD_REGISTER_BASELINE = 0x1E,
|
||
83 | |||
84 | MPR121_LLD_REGISTER_MHD_RISING = 0x2B,
|
||
85 | MPR121_LLD_REGISTER_NHD_RISING = 0x2C,
|
||
86 | MPR121_LLD_REGISTER_NCL_RISING = 0x2D,
|
||
87 | MPR121_LLD_REGISTER_FDL_RISING = 0x2E,
|
||
88 | MPR121_LLD_REGISTER_MHD_FALLING = 0x2F,
|
||
89 | MPR121_LLD_REGISTER_NHD_FALLING = 0x30,
|
||
90 | MPR121_LLD_REGISTER_NCL_FALLING = 0x31,
|
||
91 | MPR121_LLD_REGISTER_FDL_FALLING = 0x32,
|
||
92 | MPR121_LLD_REGISTER_NHD_TOUCHED = 0x33,
|
||
93 | MPR121_LLD_REGISTER_NCL_TOUCHED = 0x34,
|
||
94 | MPR121_LLD_REGISTER_FDL_TOUCHED = 0x35,
|
||
95 | |||
96 | MPR121_LLD_REGISTER_ELEPROX_MHD_RISING = 0x36,
|
||
97 | MPR121_LLD_REGISTER_ELEPROX_NHD_RISING = 0x37,
|
||
98 | MPR121_LLD_REGISTER_ELEPROX_NCL_RISING = 0x38,
|
||
99 | MPR121_LLD_REGISTER_ELEPROX_FDL_RISING = 0x39,
|
||
100 | MPR121_LLD_REGISTER_ELEPROX_MHD_FALLING = 0x3A,
|
||
101 | MPR121_LLD_REGISTER_ELEPROX_NHD_FALLING = 0x3B,
|
||
102 | MPR121_LLD_REGISTER_ELEPROX_NCL_FALLING = 0x3C,
|
||
103 | MPR121_LLD_REGISTER_ELEPROX_FDL_FALLING = 0x3D,
|
||
104 | MPR121_LLD_REGISTER_ELEPROX_NHD_TOUCHED = 0x3E,
|
||
105 | MPR121_LLD_REGISTER_ELEPROX_NCL_TOUCHED = 0x3F,
|
||
106 | MPR121_LLD_REGISTER_ELEPROX_FDL_TOUCHED = 0x40,
|
||
107 | |||
108 | MPR121_LLD_REGISTER_THRESHOLDS = 0x41,
|
||
109 | MPR121_LLD_REGISTER_DEBOUNCE = 0x5B,
|
||
110 | MPR121_LLD_REGISTER_CONFIG_1 = 0x5C,
|
||
111 | MPR121_LLD_REGISTER_CONFIG_2 = 0x5D,
|
||
112 | MPR121_LLD_REGISTER_CONFIG_ECR = 0x5E,
|
||
113 | MPR121_LLD_REGISTER_ELE_CURRENT = 0x5F,
|
||
114 | MPR121_LLD_REGISTER_CHARGE_TIME = 0x6C,
|
||
115 | |||
116 | MPR121_LLD_REGISTER_GPIO_CTRL_0 = 0x73,
|
||
117 | MPR121_LLD_REGISTER_GPIO_CTRL_1 = 0x74,
|
||
118 | MPR121_LLD_REGISTER_GPIO_DATA = 0x75,
|
||
119 | MPR121_LLD_REGISTER_GPIO_DIRECTION_CTRL = 0x76,
|
||
120 | MPR121_LLD_REGISTER_GPIO_ENABLE = 0x77,
|
||
121 | MPR121_LLD_REGISTER_GPIO_DATA_SET = 0x78,
|
||
122 | MPR121_LLD_REGISTER_GPIO_DATA_CLEAR = 0x79,
|
||
123 | MPR121_LLD_REGISTER_GPIO_DATA_TOGGLE = 0x7A,
|
||
124 | |||
125 | MPR121_LLD_REGISTER_AUTOCFG_CTRL_0 = 0x7B,
|
||
126 | MPR121_LLD_REGISTER_AUTOCFG_CTRL_1 = 0x7C,
|
||
127 | MPR121_LLD_REGISTER_AUTOCFG_USL = 0x7D,
|
||
128 | MPR121_LLD_REGISTER_AUTOCFG_LSL = 0x7E,
|
||
129 | MPR121_LLD_REGISTER_AUTOCFG_TARGET_LEVEL = 0x7F,
|
||
130 | |||
131 | MPR121_LLD_REGISTER_SOFT_RESET = 0x80
|
||
132 | } mpr121_lld_register_t; |
||
133 | |||
134 | /**
|
||
135 | * @brief Configuration data type.
|
||
136 | */
|
||
137 | typedef union { |
||
138 | uint8_t values[8];
|
||
139 | struct {
|
||
140 | uint8_t auto_config_1; |
||
141 | uint8_t auto_config_2; |
||
142 | uint8_t up_side_limit; |
||
143 | uint8_t low_side_limit; |
||
144 | uint8_t target_level; |
||
145 | uint8_t config_1; |
||
146 | uint8_t config_2; |
||
147 | uint8_t ele_config; |
||
148 | } registers; |
||
149 | } mpr121_lld_config_t; |
||
150 | |||
151 | /**
|
||
152 | * €brief Configutation register 1 masks.
|
||
153 | */
|
||
154 | typedef enum { |
||
155 | MPR121_LLD_FFI_6 = 0x00u,
|
||
156 | MPR121_LLD_FFI_10 = 0x40u,
|
||
157 | MPR121_LLD_FFI_18 = 0x80u,
|
||
158 | MPR121_LLD_FFI_34 = 0xC0u,
|
||
159 | } mpr121_lld_config1_t; |
||
160 | |||
161 | /**
|
||
162 | * @brief Configuration register 2 masks.
|
||
163 | */
|
||
164 | typedef enum { |
||
165 | MPR121_LLD_CDT_OFF = 0x00u,
|
||
166 | MPR121_LLD_CDT_0_5 = 0x20u,
|
||
167 | MPR121_LLD_CDT_1 = 0x40u,
|
||
168 | MPR121_LLD_CDT_2 = 0x60u,
|
||
169 | MPR121_LLD_CDT_4 = 0x80u,
|
||
170 | MPR121_LLD_CDT_8 = 0xA0u,
|
||
171 | MPR121_LLD_CDT_16 = 0xC0u,
|
||
172 | MPR121_LLD_CDT_32 = 0xE0u,
|
||
173 | MPR121_LLD_SFI_4 = 0x00u,
|
||
174 | MPR121_LLD_SFI_6 = 0x08u,
|
||
175 | MPR121_LLD_SFI_10 = 0x10u,
|
||
176 | MPR121_LLD_SFI_18 = 0x18u,
|
||
177 | MPR121_LLD_ESI_1 = 0x00u,
|
||
178 | MPR121_LLD_ESI_2 = 0x01u,
|
||
179 | MPR121_LLD_ESI_4 = 0x02u,
|
||
180 | MPR121_LLD_ESI_8 = 0x03u,
|
||
181 | MPR121_LLD_ESI_16 = 0x04u,
|
||
182 | MPR121_LLD_ESI_32 = 0x05u,
|
||
183 | MPR121_LLD_ESI_64 = 0x06u,
|
||
184 | MPR121_LLD_ESI_128 = 0x07u,
|
||
185 | } mpr121_lld_config2_t; |
||
186 | |||
187 | /**
|
||
188 | * @brief Ele configuration register masks.
|
||
189 | */
|
||
190 | typedef enum { |
||
191 | MPR121_LLD_CL_ON_CURRENT = 0x00u,
|
||
192 | MPR121_LLD_CL_OFF = 0x40u,
|
||
193 | MPR121_LLD_CL_ON_HIGH5 = 0x80u,
|
||
194 | MPR121_LLD_CL_ON_ALL = 0xC0u,
|
||
195 | MPR121_LLD_ELEPROX_0 = 0x00u,
|
||
196 | MPR121_LLD_ELEPROX_2 = 0x10u,
|
||
197 | MPR121_LLD_ELEPROX_4 = 0x20u,
|
||
198 | MPR121_LLD_ELEPROX_12 = 0x30u,
|
||
199 | } mpr121_lld_ele_config_t; |
||
200 | |||
201 | /**
|
||
202 | * @brief Auto configuration register 0 masks.
|
||
203 | */
|
||
204 | typedef enum { |
||
205 | MPR121_LLD_AC_ENABLE = 0x01u,
|
||
206 | MPR121_LLD_AC_RECONF_EN = 0x02u,
|
||
207 | MPR121_LLD_BVA_ON_CURRENT = 0x00u,
|
||
208 | MPR121_LLD_BVA_OFF = 0x04u,
|
||
209 | MPR121_LLD_BVA_ON_HIGH5 = 0x08u,
|
||
210 | MPR121_LLD_BVA_ON_ALL = 0x0Cu,
|
||
211 | MPR121_LLD_RETRY_OFF = 0x00u,
|
||
212 | MPR121_LLD_RETRY_2 = 0x10u,
|
||
213 | MPR121_LLD_RETRY_4 = 0x20u,
|
||
214 | MPR121_LLD_RETRY_8 = 0x30u,
|
||
215 | /* skip FFI */
|
||
216 | } mpr121_lld_auto_config0_t; |
||
217 | |||
218 | /**
|
||
219 | * @brief Auto configuration register 1 masks.
|
||
220 | */
|
||
221 | typedef enum { |
||
222 | MPR121_LLD_AC_FAIL_INT_EN = 0x01u,
|
||
223 | MPR121_LLD_AC_RECONF_FAIL_INT_EN = 0x02u,
|
||
224 | MPR121_LLD_AC_OUT_OF_RANGE_INT_EN = 0x04u,
|
||
225 | MPR121_LLD_AC_SKIP_CHRG_TIME_SRCH = 0x80u,
|
||
226 | } mpr121_lld_auto_config1_t; |
||
227 | |||
228 | ef078306 | Thomas Schöpping | /******************************************************************************/
|
229 | /* MACROS */
|
||
230 | /******************************************************************************/
|
||
231 | |||
232 | /******************************************************************************/
|
||
233 | /* EXTERN DECLARATIONS */
|
||
234 | /******************************************************************************/
|
||
235 | |||
236 | d6728c5b | Thomas Schöpping | #ifdef __cplusplus
|
237 | extern "C" { |
||
238 | #endif
|
||
239 | apalExitStatus_t mpr121_lld_read_register(const MPR121Driver* const mprd, const mpr121_lld_register_t regaddr, const uint8_t offset, const uint8_t size, uint8_t* const data, const apalTime_t timeout); |
||
240 | apalExitStatus_t mpr121_lld_write_register(const MPR121Driver* const mprd, const mpr121_lld_register_t regaddr, const uint8_t offset, const uint8_t size, const uint8_t* const data, const apalTime_t timeout); |
||
241 | apalExitStatus_t mpr121_lld_soft_reset(const MPR121Driver* const mprd, const apalTime_t timeout); |
||
242 | apalExitStatus_t mpr121_lld_read_filtered_data(const MPR121Driver* const mprd, const uint8_t index, const uint8_t num, uint16_t* const data, const apalTime_t timeout); |
||
243 | apalExitStatus_t mpr121_lld_read_baseline_data(const MPR121Driver* const mprd, const uint8_t index, const uint8_t num, uint8_t* const data, const apalTime_t timeout); |
||
244 | apalExitStatus_t mpr121_lld_read_electrode_data(const MPR121Driver* const mprd, const uint8_t index, const uint8_t num, uint8_t* const data, const apalTime_t timeout); |
||
245 | apalExitStatus_t mpr121_lld_write_config(const MPR121Driver* const mprd, const mpr121_lld_config_t cfg, const apalTime_t timeout); |
||
246 | apalExitStatus_t mpr121_lld_read_config(const MPR121Driver* const mprd, mpr121_lld_config_t* const cfg, const apalTime_t timeout); |
||
247 | #ifdef __cplusplus
|
||
248 | } |
||
249 | #endif
|
||
250 | |||
251 | ef078306 | Thomas Schöpping | /******************************************************************************/
|
252 | /* INLINE FUNCTIONS */
|
||
253 | /******************************************************************************/
|
||
254 | |||
255 | 1d5bcc82 | Thomas Schöpping | #endif /* defined(AMIROLLD_CFG_MPR121) && (AMIROLLD_CFG_MPR121 == 1) */ |
256 | d6728c5b | Thomas Schöpping | |
257 | 1d5bcc82 | Thomas Schöpping | #endif /* AMIROLLD_MPR121_V1_H */ |
258 | 5e2f673b | Marc Rothmann | |
259 | /** @} */ |