Revision 0128be0f modules/PowerManagement_1-1/module.c
modules/PowerManagement_1-1/module.c | ||
---|---|---|
29 | 29 |
/** |
30 | 30 |
* @brief Interrupt service routine callback for I/O interrupt signals. |
31 | 31 |
* |
32 |
* @param extp EXT driver to handle the ISR. |
|
33 |
* @param channel Channel on which the interrupt was encountered. |
|
32 |
* @param args Channel on which the interrupt was encountered. |
|
34 | 33 |
*/ |
35 |
static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) { |
|
36 |
(void)extp; |
|
37 |
|
|
34 |
static void _modulePalIsrCallback(void *args) { |
|
38 | 35 |
chSysLockFromISR(); |
39 |
chEvtBroadcastFlagsI(&aos.events.io, (1 << channel));
|
|
36 |
chEvtBroadcastFlagsI(&aos.events.io, (1 << (*(uint16_t*)args)));
|
|
40 | 37 |
chSysUnlockFromISR(); |
41 | 38 |
|
42 | 39 |
return; |
... | ... | |
72 | 69 |
/* btr */ CAN_BTR_SJW(1) | CAN_BTR_TS2(3) | CAN_BTR_TS1(15) | CAN_BTR_BRP(1), |
73 | 70 |
}; |
74 | 71 |
|
75 |
EXTConfig moduleHalExtConfig = { |
|
76 |
/* channel configrations */ { |
|
77 |
/* channel 0 */ { // IR_INT1_N: must be enabled explicitely |
|
78 |
/* mode */ EXT_MODE_GPIOB | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE), |
|
79 |
/* callback */ _moduleIsrCallback, |
|
80 |
}, |
|
81 |
/* channel 1 */ { // GAUGE_BATLOW1: must be enabled explicitely |
|
82 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE, |
|
83 |
/* callback */ _moduleIsrCallback, |
|
84 |
}, |
|
85 |
/* channel 2 */ { // GAUGE_BATDG1_N: must be enabled expliciety |
|
86 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE, |
|
87 |
/* callback */ _moduleIsrCallback, |
|
88 |
}, |
|
89 |
/* channel 3 */ { // SYS_UART_DN: automatic interrupt on event |
|
90 |
/* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, |
|
91 |
/* callback */ _moduleIsrCallback, |
|
92 |
}, |
|
93 |
/* channel 4 */ { // IR_INT2_N: must be enabled explicitely |
|
94 |
/* mode */ EXT_MODE_GPIOC | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE), |
|
95 |
/* callback */ _moduleIsrCallback, |
|
96 |
}, |
|
97 |
/* channel 5 */ { // TOUCH_INT: must be enabled explicitely |
|
98 |
/* mode */ EXT_MODE_GPIOC | APAL2CH_EDGE(MPR121_LLD_INT_EDGE), |
|
99 |
/* callback */ _moduleIsrCallback, |
|
100 |
}, |
|
101 |
/* channel 6 */ { // GAUGE_BATLOW2: must be enabled explicitely |
|
102 |
/* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE, |
|
103 |
/* callback */ _moduleIsrCallback, |
|
72 |
aos_interrupt_cfg_t moduleIntConfig[14] = { |
|
73 |
/* channel 1 */ { // IR_INT1_N: must be enabled explicitely |
|
74 |
/* port */ GPIOB, |
|
75 |
/* pad */ GPIOB_IR_INT1_N, |
|
76 |
/* flags */ 0, |
|
77 |
/* mode */ APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE), |
|
78 |
/* callback */ _modulePalIsrCallback, |
|
79 |
/* cb arg */ 1, |
|
104 | 80 |
}, |
105 |
/* channel 7 */ { // GAUGE_BATDG2_N: must be enabled expliciety |
|
106 |
/* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE, |
|
107 |
/* callback */ _moduleIsrCallback, |
|
81 |
/* channel 2 */ { // GAUGE_BATLOW1: must be enabled explicitely |
|
82 |
/* port */ GPIOC, |
|
83 |
/* pad */ GPIOC_GAUGE_BATLOW1, |
|
84 |
/* flags */ 0, |
|
85 |
/* mode */ PAL_EVENT_MODE_RISING_EDGE, |
|
86 |
/* callback */ _modulePalIsrCallback, |
|
87 |
/* cb arg */ 2, |
|
108 | 88 |
}, |
109 |
/* channel 8 */ { // PATH_DC: must be enabled explicitely |
|
110 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES, |
|
111 |
/* callback */ _moduleIsrCallback, |
|
89 |
/* channel 3 */ { // GAUGE_BATGD1_N: must be enabled explicitely |
|
90 |
/* port */ GPIOC, |
|
91 |
/* pad */ GPIOC_GAUGE_BATGD1_N, |
|
92 |
/* flags */ 0, |
|
93 |
/* mode */ PAL_EVENT_MODE_RISING_EDGE, |
|
94 |
/* callback */ _modulePalIsrCallback, |
|
95 |
/* cb arg */ 3, |
|
112 | 96 |
}, |
113 |
/* channel 9 */ { // SYS_SPI_DIR: must be enabled explicitely |
|
114 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES, |
|
115 |
/* callback */ _moduleIsrCallback, |
|
97 |
/* channel 4 */ { // SYS_UART_DN: automatic interrupt on event |
|
98 |
/* port */ GPIOB, |
|
99 |
/* pad */ GPIOB_SYS_UART_DN, |
|
100 |
/* flags */ AOS_INTERRUPT_AUTOSTART, |
|
101 |
/* mode */ PAL_EVENT_MODE_BOTH_EDGES, |
|
102 |
/* callback */ _modulePalIsrCallback, |
|
103 |
/* cb arg */ 4, |
|
116 | 104 |
}, |
117 |
/* channel 10 */ { |
|
118 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
119 |
/* callback */ NULL, |
|
105 |
/* channel 5 */ { // IR_INT2_N: must be enabled explicitely |
|
106 |
/* port */ GPIOC, |
|
107 |
/* pad */ GPIOC_IR_INT2_N, |
|
108 |
/* flags */ 0, |
|
109 |
/* mode */ APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE), |
|
110 |
/* callback */ _modulePalIsrCallback, |
|
111 |
/* cb arg */ 5, |
|
120 | 112 |
}, |
121 |
/* channel 11 */ { |
|
122 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
123 |
/* callback */ NULL, |
|
113 |
/* channel 6 */ { // TOUCH_INT: must be enabled explicitely |
|
114 |
/* port */ GPIOC, |
|
115 |
/* pad */ GPIOC_TOUCH_INT_N, |
|
116 |
/* flags */ 0, |
|
117 |
/* mode */ APAL2CH_EDGE(MPR121_LLD_INT_EDGE), |
|
118 |
/* callback */ _modulePalIsrCallback, |
|
119 |
/* cb arg */ 6, |
|
124 | 120 |
}, |
125 |
/* channel 12 */ { // SYS_SYNC_N: automatic interrupt on event |
|
126 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, |
|
127 |
/* callback */ _moduleIsrCallback, |
|
121 |
/* channel 7 */ { // GAUGE_BATLOW2: must be enabled explicitely |
|
122 |
/* port */ GPIOB, |
|
123 |
/* pad */ GPIOB_GAUGE_BATLOW2, |
|
124 |
/* flags */ 0, |
|
125 |
/* mode */ PAL_EVENT_MODE_RISING_EDGE, |
|
126 |
/* callback */ _modulePalIsrCallback, |
|
127 |
/* cb arg */ 7, |
|
128 | 128 |
}, |
129 |
/* channel 13 */ { // SYS_PD_N: automatic interrupt when activated |
|
130 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART, |
|
131 |
/* callback */ _moduleIsrCallback, |
|
129 |
/* channel 8 */ { // GAUGE_BATGD2_N: must be enabled explicitely |
|
130 |
/* port */ GPIOB, |
|
131 |
/* pad */ GPIOB_GAUGE_BATGD2_N, |
|
132 |
/* flags */ 0, |
|
133 |
/* mode */ PAL_EVENT_MODE_RISING_EDGE, |
|
134 |
/* callback */ _modulePalIsrCallback, |
|
135 |
/* cb arg */ 8, |
|
132 | 136 |
}, |
133 |
/* channel 14 */ { // SYS_WARMRST_N: automatic interrupt when activated |
|
134 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART, |
|
135 |
/* callback */ _moduleIsrCallback, |
|
137 |
/* channel 9 */ { // PATH_DC: must be enabled explicitely |
|
138 |
/* port */ GPIOC, |
|
139 |
/* pad */ GPIOC_PATH_DC, |
|
140 |
/* flags */ 0, |
|
141 |
/* mode */ PAL_EVENT_MODE_BOTH_EDGES, |
|
142 |
/* callback */ _modulePalIsrCallback, |
|
143 |
/* cb arg */ 9, |
|
136 | 144 |
}, |
137 |
/* channel 15 */ { // SYS_UART_UP: automatic interrupt on event |
|
138 |
/* mode */ EXT_MODE_GPIOB| EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, |
|
139 |
/* callback */ _moduleIsrCallback, |
|
145 |
/* channel 10 */ { // SYS_SPI_DIR: must be enabled explicitely |
|
146 |
/* port */ GPIOC, |
|
147 |
/* pad */ GPIOC_SYS_SPI_DIR, |
|
148 |
/* flags */ 0, |
|
149 |
/* mode */ PAL_EVENT_MODE_BOTH_EDGES, |
|
150 |
/* callback */ _modulePalIsrCallback, |
|
151 |
/* cb arg */ 10, |
|
140 | 152 |
}, |
141 |
/* channel 16 */ { |
|
142 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
143 |
/* callback */ NULL, |
|
153 |
/* channel 11 */ { // SYS_SYNC_N: must be enabled explicitely |
|
154 |
/* port */ GPIOC, |
|
155 |
/* pad */ GPIOC_SYS_INT_N, // TODO: check this |
|
156 |
/* flags */ AOS_INTERRUPT_AUTOSTART, |
|
157 |
/* mode */ PAL_EVENT_MODE_BOTH_EDGES, |
|
158 |
/* callback */ _modulePalIsrCallback, |
|
159 |
/* cb arg */ 11, |
|
144 | 160 |
}, |
145 |
/* channel 17 */ { |
|
146 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
147 |
/* callback */ NULL, |
|
161 |
/* channel 12 */ { // SYS_PD_N: must be enabled explicitely |
|
162 |
/* port */ GPIOC, |
|
163 |
/* pad */ GPIOC_SYS_PD_N, |
|
164 |
/* flags */ AOS_INTERRUPT_AUTOSTART, |
|
165 |
/* mode */ PAL_EVENT_MODE_FALLING_EDGE, |
|
166 |
/* callback */ _modulePalIsrCallback, |
|
167 |
/* cb arg */ 12, |
|
148 | 168 |
}, |
149 |
/* channel 18 */ { |
|
150 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
151 |
/* callback */ NULL, |
|
169 |
/* channel 13 */ { // SYS_WARMRST_N: must be enabled explicitely |
|
170 |
/* port */ GPIOC, |
|
171 |
/* pad */ GPIOC_SYS_WARMRST_N, |
|
172 |
/* flags */ AOS_INTERRUPT_AUTOSTART, |
|
173 |
/* mode */ PAL_EVENT_MODE_FALLING_EDGE, |
|
174 |
/* callback */ _modulePalIsrCallback, |
|
175 |
/* cb arg */ 13, |
|
152 | 176 |
}, |
153 |
/* channel 19 */ { |
|
154 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
155 |
/* callback */ NULL, |
|
177 |
/* channel 14 */ { // SYS_UART_UP: must be enabled explicitely |
|
178 |
/* port */ GPIOB, |
|
179 |
/* pad */ GPIOB_SYS_UART_UP, |
|
180 |
/* flags */ AOS_INTERRUPT_AUTOSTART, |
|
181 |
/* mode */ PAL_EVENT_MODE_BOTH_EDGES, |
|
182 |
/* callback */ _modulePalIsrCallback, |
|
183 |
/* cb arg */ 14, |
|
156 | 184 |
}, |
157 |
/* channel 20 */ { |
|
158 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
159 |
/* callback */ NULL, |
|
160 |
}, |
|
161 |
/* channel 21 */ { |
|
162 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
163 |
/* callback */ NULL, |
|
164 |
}, |
|
165 |
/* channel 22 */ { |
|
166 |
/* mode */ EXT_CH_MODE_DISABLED, |
|
167 |
/* callback */ NULL, |
|
168 |
}, |
|
169 |
}, |
|
185 |
}; |
|
186 |
|
|
187 |
aos_interrupt_driver_t moduleIntDriver = { |
|
188 |
/* config */ NULL, |
|
189 |
/* interrupts */ 14, |
|
170 | 190 |
}; |
171 | 191 |
|
172 | 192 |
I2CConfig moduleHalI2cProxPm18Pm33GaugeRearConfig = { |
... | ... | |
879 | 899 |
{ |
880 | 900 |
(void)argc; |
881 | 901 |
(void)argv; |
882 |
extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_TOUCHINT);
|
|
902 |
aosIntEnable(&moduleIntDriver, MODULE_GPIO_INT_TOUCHINT);
|
|
883 | 903 |
aosUtRun(stream, &moduleUtAlldMpr121, NULL); |
904 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_TOUCHINT); |
|
884 | 905 |
return AOS_OK; |
885 | 906 |
} |
886 | 907 |
static ut_mpr121data_t _utAlldMpr121Data= { |
887 | 908 |
/* MPR121 driver */ &moduleLldTouch, |
888 | 909 |
/* timeout */ MICROSECONDS_PER_SECOND, |
889 | 910 |
/* event source */ &aos.events.io, |
890 |
/* event flags */ (1 << MODULE_GPIO_EXTCHANNEL_TOUCHINT),
|
|
911 |
/* event flags */ (1 << MODULE_GPIO_INT_TOUCHINT),
|
|
891 | 912 |
}; |
892 | 913 |
aos_unittest_t moduleUtAlldMpr121 = { |
893 | 914 |
/* name */ "MPR121", |
... | ... | |
1061 | 1082 |
case WNW: |
1062 | 1083 |
mux = &moduleLldI2cMultiplexer1; |
1063 | 1084 |
((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity1; |
1064 |
((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_EXTCHANNEL_IRINT2);
|
|
1065 |
extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT2);
|
|
1085 |
((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_INT_IRINT2);
|
|
1086 |
aosIntEnable(&moduleIntDriver, MODULE_GPIO_INT_IRINT2);
|
|
1066 | 1087 |
break; |
1067 | 1088 |
case NNW: |
1068 | 1089 |
case NNE: |
... | ... | |
1070 | 1091 |
case ESE: |
1071 | 1092 |
mux = &moduleLldI2cMultiplexer2; |
1072 | 1093 |
((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity2; |
1073 |
((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_EXTCHANNEL_IRINT1);
|
|
1074 |
extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT1);
|
|
1094 |
((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_INT_IRINT1);
|
|
1095 |
aosIntEnable(&moduleIntDriver, MODULE_GPIO_INT_IRINT1);
|
|
1075 | 1096 |
break; |
1076 | 1097 |
default: |
1077 | 1098 |
break; |
... | ... | |
1088 | 1109 |
case NNE: |
1089 | 1110 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1090 | 1111 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northeast sensor"); |
1112 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT1); |
|
1091 | 1113 |
break; |
1092 | 1114 |
case ENE: |
1093 | 1115 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1094 | 1116 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "east-northeast sensor"); |
1117 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT1); |
|
1095 | 1118 |
break; |
1096 | 1119 |
case ESE: |
1097 | 1120 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1098 | 1121 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "north-southeast sensor"); |
1122 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT1); |
|
1099 | 1123 |
break; |
1100 | 1124 |
case SSE: |
1101 | 1125 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1102 | 1126 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southeast sensor"); |
1127 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT2); |
|
1103 | 1128 |
break; |
1104 | 1129 |
case SSW: |
1105 | 1130 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1106 | 1131 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southwest sensor"); |
1132 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT2); |
|
1107 | 1133 |
break; |
1108 | 1134 |
case WSW: |
1109 | 1135 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1110 | 1136 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "west-southwest sensor"); |
1137 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT2); |
|
1111 | 1138 |
break; |
1112 | 1139 |
case WNW: |
1113 | 1140 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1114 | 1141 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "west-northwest sensor"); |
1142 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT2); |
|
1115 | 1143 |
break; |
1116 | 1144 |
case NNW: |
1117 | 1145 |
pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout); |
1118 | 1146 |
aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northwest sensor"); |
1147 |
aosIntDisable(&moduleIntDriver, MODULE_GPIO_INT_IRINT1); |
|
1119 | 1148 |
break; |
1120 | 1149 |
default: |
1121 | 1150 |
break; |
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