amiro-os / os / modules / PowerManagement_1-1 / board.h @ 20205a98
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/*
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AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2018 Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for AMiRo PowerManagement v1.1 board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_POWERMANAGEMENT
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#define BOARD_NAME "AMiRo PowerManagement" |
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#define BOARD_VERSION "1.1" |
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0U |
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#endif
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000U |
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 330U |
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F405xx
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/*
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* STM32F4 alternate function definitions
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*/
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#define STM32F4xx_AF_system 0U |
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#define STM32F4xx_AF_TIM1to2 1U |
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#define STM32F4xx_AF_TIM3to5 2U |
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#define STM32F4xx_AF_TIM8to11 3U |
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#define STM32F4xx_AF_I2C1to3 4U |
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#define STM32F4xx_AF_SPI1to2 5U |
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#define STM32F4xx_AF_SPI3 6U |
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#define STM32F4xx_AF_USART1to3 7U |
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#define STM32F4xx_AF_USART4to6 8U |
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#define STM32F4xx_AF_CAN1to2_TIM12to14 9U |
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#define STM32F4xx_AF_OTG_HSFS 10U |
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#define STM32F4xx_AF_ETH 11U |
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#define STM32F4xx_AF_FSMC_SDIO_OTGHS 12U |
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#define STM32F4xx_AF_DCMI 13U |
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#define STM32F4xx_AF_EVENTOUT 15U |
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/*
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* IO pins assignments.
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*/
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#define GPIOA_WKUP 0U |
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#define GPIOA_PIN1 1U |
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#define GPIOA_SYS_UART_TX 2U |
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#define GPIOA_SYS_UART_RX 3U |
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#define GPIOA_SYS_SPI_SS0_N 4U |
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#define GPIOA_SYS_SPI_SCLK 5U |
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#define GPIOA_SYS_SPI_MISO 6U |
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#define GPIOA_SYS_SPI_MOSI 7U |
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#define GPIOA_SYS_REG_EN 8U |
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#define GPIOA_PROG_RX 9U |
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#define GPIOA_PROG_TX 10U |
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#define GPIOA_CAN_RX 11U |
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#define GPIOA_CAN_TX 12U |
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#define GPIOA_SWDIO 13U |
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#define GPIOA_SWCLK 14U |
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#define GPIOA_SYS_SPI_SS1_N 15U |
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#define GPIOB_IR_INT1_N 0U |
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#define GPIOB_VSYS_SENSE 1U |
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#define GPIOB_POWER_EN 2U |
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#define GPIOB_SYS_UART_DN 3U |
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#define GPIOB_CHARGE_STAT2A 4U |
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#define GPIOB_BUZZER 5U |
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#define GPIOB_GAUGE_BATLOW2 6U |
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#define GPIOB_GAUGE_BATGD2_N 7U |
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#define GPIOB_GAUGE_SCL2 8U |
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#define GPIOB_GAUGE_SDA2 9U |
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#define GPIOB_GAUGE_SCL1 10U |
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#define GPIOB_GAUGE_SDA1 11U |
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#define GPIOB_LED 12U |
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#define GPIOB_BT_RTS 13U |
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#define GPIOB_BT_CTS 14U |
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#define GPIOB_SYS_UART_UP 15U |
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#define GPIOC_CHARGE_STAT1A 0U |
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#define GPIOC_GAUGE_BATLOW1 1U |
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#define GPIOC_GAUGE_BATGD1_N 2U |
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#define GPIOC_CHARGE_EN1_N 3U |
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#define GPIOC_IR_INT2_N 4U |
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#define GPIOC_TOUCH_INT_N 5U |
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#define GPIOC_SYS_DONE 6U |
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#define GPIOC_SYS_PROG_N 7U |
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#define GPIOC_PATH_DC 8U |
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#define GPIOC_SYS_SPI_DIR 9U |
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#define GPIOC_BT_RX 10U |
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#define GPIOC_BT_TX 11U |
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#define GPIOC_SYS_INT_N 12U |
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#define GPIOC_SYS_PD_N 13U |
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#define GPIOC_SYS_WARMRST_N 14U |
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#define GPIOC_BT_RST 15U |
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#define GPIOD_PIN0 0U |
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#define GPIOD_PIN1 1U |
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#define GPIOD_CHARGE_EN2_N 2U |
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#define GPIOD_PIN3 3U |
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#define GPIOD_PIN4 4U |
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#define GPIOD_PIN5 5U |
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#define GPIOD_PIN6 6U |
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#define GPIOD_PIN7 7U |
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#define GPIOD_PIN8 8U |
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#define GPIOD_PIN9 9U |
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#define GPIOD_PIN10 10U |
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#define GPIOD_PIN11 11U |
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#define GPIOD_PIN12 12U |
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#define GPIOD_PIN13 13U |
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#define GPIOD_PIN14 14U |
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#define GPIOD_PIN15 15U |
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#define GPIOE_PIN0 0U |
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#define GPIOE_PIN1 1U |
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#define GPIOE_PIN2 2U |
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#define GPIOE_PIN3 3U |
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#define GPIOE_PIN4 4U |
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#define GPIOE_PIN5 5U |
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#define GPIOE_PIN6 6U |
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#define GPIOE_PIN7 7U |
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#define GPIOE_PIN8 8U |
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#define GPIOE_PIN9 9U |
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#define GPIOE_PIN10 10U |
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#define GPIOE_PIN11 11U |
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#define GPIOE_PIN12 12U |
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#define GPIOE_PIN13 13U |
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#define GPIOE_PIN14 14U |
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#define GPIOE_PIN15 15U |
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#define GPIOF_PIN0 0U |
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#define GPIOF_PIN1 1U |
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#define GPIOF_PIN2 2U |
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#define GPIOF_PIN3 3U |
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#define GPIOF_PIN4 4U |
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#define GPIOF_PIN5 5U |
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#define GPIOF_PIN6 6U |
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#define GPIOF_PIN7 7U |
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#define GPIOF_PIN8 8U |
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#define GPIOF_PIN9 9U |
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#define GPIOF_PIN10 10U |
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#define GPIOF_PIN11 11U |
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#define GPIOF_PIN12 12U |
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#define GPIOF_PIN13 13U |
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#define GPIOF_PIN14 14U |
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#define GPIOF_PIN15 15U |
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#define GPIOG_PIN0 0U |
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#define GPIOG_PIN1 1U |
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#define GPIOG_PIN2 2U |
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#define GPIOG_PIN3 3U |
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#define GPIOG_PIN4 4U |
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#define GPIOG_PIN5 5U |
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#define GPIOG_PIN6 6U |
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#define GPIOG_PIN7 7U |
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#define GPIOG_PIN8 8U |
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#define GPIOG_PIN9 9U |
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#define GPIOG_PIN10 10U |
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#define GPIOG_PIN11 11U |
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#define GPIOG_PIN12 12U |
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#define GPIOG_PIN13 13U |
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#define GPIOG_PIN14 14U |
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#define GPIOG_PIN15 15U |
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#define GPIOH_OSC_IN 0U |
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#define GPIOH_OSC_OUT 1U |
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#define GPIOH_PIN2 2U |
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#define GPIOH_PIN3 3U |
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#define GPIOH_PIN4 4U |
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#define GPIOH_PIN5 5U |
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#define GPIOH_PIN6 6U |
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#define GPIOH_PIN7 7U |
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#define GPIOH_PIN8 8U |
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#define GPIOH_PIN9 9U |
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#define GPIOH_PIN10 10U |
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#define GPIOH_PIN11 11U |
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#define GPIOH_PIN12 12U |
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#define GPIOH_PIN13 13U |
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#define GPIOH_PIN14 14U |
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#define GPIOH_PIN15 15U |
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#define GPIOI_PIN0 0U |
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#define GPIOI_PIN1 1U |
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#define GPIOI_PIN2 2U |
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#define GPIOI_PIN3 3U |
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#define GPIOI_PIN4 4U |
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#define GPIOI_PIN5 5U |
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#define GPIOI_PIN6 6U |
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#define GPIOI_PIN7 7U |
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#define GPIOI_PIN8 8U |
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#define GPIOI_PIN9 9U |
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#define GPIOI_PIN10 10U |
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#define GPIOI_PIN11 11U |
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#define GPIOI_PIN12 12U |
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#define GPIOI_PIN13 13U |
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#define GPIOI_PIN14 14U |
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#define GPIOI_PIN15 15U |
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/*
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* IO lines assignments.
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*/
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#define LINE_WKUP PAL_LINE(GPIOA, GPIOA_WKUP)
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#define LINE_SYS_UART_TX PAL_LINE(GPIOA, GPIOA_SYS_UART_TX)
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#define LINE_SYS_UART_RX PAL_LINE(GPIOA, GPIOA_SYS_UART_RX)
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#define LINE_SYS_SPI_SS0_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N)
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#define LINE_SYS_SPI_SCLK PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK)
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#define LINE_SYS_SPI_MISO PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO)
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#define LINE_SYS_SPI_MOSI PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI)
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#define LINE_SYS_REG_EN PAL_LINE(GPIOA, GPIOA_SYS_REG_EN)
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#define LINE_PROG_RX PAL_LINE(GPIOA, GPIOA_PROG_RX)
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#define LINE_PROG_TX PAL_LINE(GPIOA, GPIOA_PROG_TX)
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#define LINE_CAN_RX PAL_LINE(GPIOA, GPIOA_CAN_RX)
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#define LINE_CAN_TX PAL_LINE(GPIOA, GPIOA_CAN_TX)
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#define LINE_SWDIO PAL_LINE(GPIOA, GPIOA_SWDIO)
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#define LINE_SWCLK PAL_LINE(GPIOA, GPIOA_SWCLK)
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#define LINE_SYS_SPI_SS1_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N)
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#define LINE_IR_INT1_N PAL_LINE(GPIOB, GPIOB_IR_INT1_N)
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#define LINE_VSYS_SENSE PAL_LINE(GPIOB, GPIOB_VSYS_SENSE)
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#define LINE_POWER_EN PAL_LINE(GPIOB, GPIOB_POWER_EN)
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#define LINE_SYS_UART_DN PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
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#define LINE_CHARGE_STAT2A PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A)
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#define LINE_BUZZER PAL_LINE(GPIOB, GPIOB_BUZZER)
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#define LINE_GAUGE_BATLOW2 PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2)
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#define LINE_GAUGE_BATGD2_N PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N)
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#define LINE_GAUGE_SCL2 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2)
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#define LINE_GAUGE_SDA2 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2)
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#define LINE_GAUGE_SCL1 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1)
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#define LINE_GAUGE_SDA1 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1)
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#define LINE_LED PAL_LINE(GPIOB, GPIOB_LED)
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#define LINE_BT_RTS PAL_LINE(GPIOB, GPIOB_BT_RTS)
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#define LINE_BT_CTS PAL_LINE(GPIOB, GPIOB_BT_CTS)
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#define LINE_SYS_UART_UP PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
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#define LINE_CHARGE_STAT1A PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A)
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#define LINE_GAUGE_BATLOW1 PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1)
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#define LINE_GAUGE_BATGD1_N PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N)
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#define LINE_CHARGE_EN1_N PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N)
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#define LINE_IR_INT2_N PAL_LINE(GPIOC, GPIOC_IR_INT2_N)
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#define LINE_TOUCH_INT_N PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N)
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#define LINE_SYS_DONE PAL_LINE(GPIOC, GPIOC_SYS_DONE)
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#define LINE_SYS_PROG_N PAL_LINE(GPIOC, GPIOC_SYS_PROG_N)
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#define LINE_PATH_DC PAL_LINE(GPIOC, GPIOC_PATH_DC)
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#define LINE_SYS_SPI_DIR PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR)
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#define LINE_BT_RX PAL_LINE(GPIOC, GPIOC_BT_RX)
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#define LINE_BT_TX PAL_LINE(GPIOC, GPIOC_BT_TX)
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#define LINE_SYS_INT_N PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
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#define LINE_SYS_PD_N PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
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#define LINE_SYS_WARMRST_N PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N)
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#define LINE_BT_RST PAL_LINE(GPIOC, GPIOC_BT_RST)
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#define LINE_CHARGE_EN2_N PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N)
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#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) |
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#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) |
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
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#define PIN_ODR_LOW(n) (0U << (n)) |
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#define PIN_ODR_HIGH(n) (1U << (n)) |
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
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#define PIN_OSPEED_LOW(n) (0U << ((n) * 2U)) |
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#define PIN_OSPEED_MEDIUM(n) (1U << ((n) * 2U)) |
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#define PIN_OSPEED_HIGH(n) (2U << ((n) * 2U)) |
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#define PIN_OSPEED_VERYHIGH(n) (3U << ((n) * 2U)) |
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
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/*
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* GPIOA setup:
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*
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* PA0 - WKUP (input floating)
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* PA1 - PIN1 (input pullup)
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* PA2 - SYS_UART_TX (input floating)
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* PA3 - SYS_UART_RX (alternate 7 pushpull floating)
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* PA4 - SYS_SPI_SS0_N (input floating)
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* PA5 - SYS_SPI_SCLK (alternate 5 pushpull floating)
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* PA6 - SYS_SPI_MISO (alternate 5 pushpull floating)
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* PA7 - SYS_SPI_MOSI (alternate 5 pushpull floating)
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* PA8 - SYS_REG_EN (output pushpull high)
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* PA9 - PROG_RX (alternate 7 pushpull floating)
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* PA10 - PROG_TX (alternate 7 pushpull pullup)
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* PA11 - CAN_RX (alternate 9 pushpull floating)
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* PA12 - CAN_TX (input floating)
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* PA13 - SWDIO (alternate 0 pushpull floating)
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* PA14 - SWCLK (alternate 0 pushpull floating)
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* PA15 - SYS_SPI_SS1_N (input floating)
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_WKUP) | \
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PIN_MODE_INPUT(GPIOA_PIN1) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_UART_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) | \ |
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PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) | \ |
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PIN_MODE_ALTERNATE(GPIOA_PROG_RX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_PROG_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_CAN_RX) | \ |
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PIN_MODE_INPUT(GPIOA_CAN_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N)) |
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N)) |
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) | \
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PIN_OSPEED_VERYHIGH(GPIOA_PIN1) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) | \ |
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PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N)) |
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_WKUP) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ |
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PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) | \ |
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PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) | \ |
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PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) | \ |
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PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) | \ |
385 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) | \ |
386 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) | \ |
387 |
PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) | \ |
388 |
PIN_PUPDR_FLOATING(GPIOA_PROG_RX) | \ |
389 |
PIN_PUPDR_PULLUP(GPIOA_PROG_TX) | \ |
390 |
PIN_PUPDR_FLOATING(GPIOA_CAN_RX) | \ |
391 |
PIN_PUPDR_FLOATING(GPIOA_CAN_TX) | \ |
392 |
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ |
393 |
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ |
394 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N)) |
395 |
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_WKUP) | \
|
396 |
PIN_ODR_HIGH(GPIOA_PIN1) | \ |
397 |
PIN_ODR_HIGH(GPIOA_SYS_UART_TX) | \ |
398 |
PIN_ODR_HIGH(GPIOA_SYS_UART_RX) | \ |
399 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) | \ |
400 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) | \ |
401 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) | \ |
402 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) | \ |
403 |
PIN_ODR_HIGH(GPIOA_SYS_REG_EN) | \ |
404 |
PIN_ODR_HIGH(GPIOA_PROG_RX) | \ |
405 |
PIN_ODR_HIGH(GPIOA_PROG_TX) | \ |
406 |
PIN_ODR_HIGH(GPIOA_CAN_RX) | \ |
407 |
PIN_ODR_HIGH(GPIOA_CAN_TX) | \ |
408 |
PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
409 |
PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
410 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N)) |
411 |
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) | \
|
412 |
PIN_AFIO_AF(GPIOA_PIN1, STM32F4xx_AF_system) | \ |
413 |
PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) | \ |
414 |
PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) | \ |
415 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) | \ |
416 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) | \ |
417 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) | \ |
418 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2)) |
419 |
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) | \
|
420 |
PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) | \ |
421 |
PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) | \ |
422 |
PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
423 |
PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
424 |
PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) | \ |
425 |
PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) | \ |
426 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system)) |
427 |
|
428 |
/*
|
429 |
* GPIOB setup:
|
430 |
*
|
431 |
* PB0 - IR_INT1_N (input floating)
|
432 |
* PB1 - VSYS_SENSE (analog)
|
433 |
* PB2 - POWER_EN (output pushpull high)
|
434 |
* PB3 - SYS_UART_DN (output opendrain high)
|
435 |
* PB4 - CHARGE_STAT2A (inout floating)
|
436 |
* PB5 - BUZZER (alternate 2 pushpull floating)
|
437 |
* PB6 - GAUGE_BATLOW2 (input floating)
|
438 |
* PB7 - GAUGE_BATGD2_N (input floating)
|
439 |
* PB8 - GAUGE_SCL2 (alternate 4 opendrain floating)
|
440 |
* PB9 - GAUGE_SDA2 (alternate 4 opendrain floating)
|
441 |
* PB10 - GAUGE_SCL1 (alternate 4 opendrain floating)
|
442 |
* PB11 - GAUGE_SDA1 (alternate 4 opendrain floating)
|
443 |
* PB12 - LED (output opendrain high)
|
444 |
* PB13 - BT_RTS (alternate 7 pushpull floating)
|
445 |
* PB14 - BT_CTS (inout floating)
|
446 |
* PB15 - SYS_UART_UP (output opendrain high)
|
447 |
*/
|
448 |
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_IR_INT1_N) | \
|
449 |
PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) | \ |
450 |
PIN_MODE_OUTPUT(GPIOB_POWER_EN) | \ |
451 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) | \ |
452 |
PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) | \ |
453 |
PIN_MODE_ALTERNATE(GPIOB_BUZZER) | \ |
454 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) | \ |
455 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) | \ |
456 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) | \ |
457 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) | \ |
458 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) | \ |
459 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) | \ |
460 |
PIN_MODE_OUTPUT(GPIOB_LED) | \ |
461 |
PIN_MODE_ALTERNATE(GPIOB_BT_RTS) | \ |
462 |
PIN_MODE_INPUT(GPIOB_BT_CTS) | \ |
463 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP)) |
464 |
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) | \
|
465 |
PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) | \ |
466 |
PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) | \ |
467 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) | \ |
468 |
PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) | \ |
469 |
PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) | \ |
470 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) | \ |
471 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) | \ |
472 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) | \ |
473 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) | \ |
474 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) | \ |
475 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) | \ |
476 |
PIN_OTYPE_OPENDRAIN(GPIOB_LED) | \ |
477 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) | \ |
478 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) | \ |
479 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP)) |
480 |
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) | \
|
481 |
PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) | \ |
482 |
PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) | \ |
483 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) | \ |
484 |
PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) | \ |
485 |
PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) | \ |
486 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) | \ |
487 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) | \ |
488 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) | \ |
489 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) | \ |
490 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) | \ |
491 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) | \ |
492 |
PIN_OSPEED_VERYHIGH(GPIOB_LED) | \ |
493 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) | \ |
494 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) | \ |
495 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP)) |
496 |
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) | \
|
497 |
PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) | \ |
498 |
PIN_PUPDR_FLOATING(GPIOB_POWER_EN) | \ |
499 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) | \ |
500 |
PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) | \ |
501 |
PIN_PUPDR_FLOATING(GPIOB_BUZZER) | \ |
502 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) | \ |
503 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) | \ |
504 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) | \ |
505 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) | \ |
506 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) | \ |
507 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) | \ |
508 |
PIN_PUPDR_FLOATING(GPIOB_LED) | \ |
509 |
PIN_PUPDR_FLOATING(GPIOB_BT_RTS) | \ |
510 |
PIN_PUPDR_FLOATING(GPIOB_BT_CTS) | \ |
511 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP)) |
512 |
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_IR_INT1_N) | \
|
513 |
PIN_ODR_HIGH(GPIOB_VSYS_SENSE) | \ |
514 |
PIN_ODR_HIGH(GPIOB_POWER_EN) | \ |
515 |
PIN_ODR_HIGH(GPIOB_SYS_UART_DN) | \ |
516 |
PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) | \ |
517 |
PIN_ODR_HIGH(GPIOB_BUZZER) | \ |
518 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) | \ |
519 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) | \ |
520 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) | \ |
521 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) | \ |
522 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL1) | \ |
523 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA1) | \ |
524 |
PIN_ODR_HIGH(GPIOB_LED) | \ |
525 |
PIN_ODR_HIGH(GPIOB_BT_RTS) | \ |
526 |
PIN_ODR_HIGH(GPIOB_BT_CTS) | \ |
527 |
PIN_ODR_HIGH(GPIOB_SYS_UART_UP)) |
528 |
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_IR_INT1_N, STM32F4xx_AF_system) | \
|
529 |
PIN_AFIO_AF(GPIOB_VSYS_SENSE, STM32F4xx_AF_system) | \ |
530 |
PIN_AFIO_AF(GPIOB_POWER_EN, STM32F4xx_AF_system) | \ |
531 |
PIN_AFIO_AF(GPIOB_SYS_UART_DN, STM32F4xx_AF_system) | \ |
532 |
PIN_AFIO_AF(GPIOB_CHARGE_STAT2A, STM32F4xx_AF_system) | \ |
533 |
PIN_AFIO_AF(GPIOB_BUZZER, STM32F4xx_AF_TIM3to5) | \ |
534 |
PIN_AFIO_AF(GPIOB_GAUGE_BATLOW2, STM32F4xx_AF_system) | \ |
535 |
PIN_AFIO_AF(GPIOB_GAUGE_BATGD2_N, STM32F4xx_AF_system)) |
536 |
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, STM32F4xx_AF_I2C1to3) | \
|
537 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA2, STM32F4xx_AF_I2C1to3) | \ |
538 |
PIN_AFIO_AF(GPIOB_GAUGE_SCL1, STM32F4xx_AF_I2C1to3) | \ |
539 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA1, STM32F4xx_AF_I2C1to3) | \ |
540 |
PIN_AFIO_AF(GPIOB_LED, STM32F4xx_AF_system) | \ |
541 |
PIN_AFIO_AF(GPIOB_BT_RTS, STM32F4xx_AF_USART1to3) | \ |
542 |
PIN_AFIO_AF(GPIOB_BT_CTS, STM32F4xx_AF_USART1to3) | \ |
543 |
PIN_AFIO_AF(GPIOB_SYS_UART_UP, STM32F4xx_AF_system)) |
544 |
|
545 |
/*
|
546 |
* GPIOC setup:
|
547 |
*
|
548 |
* PC0 - CHARGE_STAT1A (input floating)
|
549 |
* PC1 - GAUGE_BATLOW1 (input floating)
|
550 |
* PC2 - GAUGE_BATGD1_N (input floating)
|
551 |
* PC3 - CHARGE_EN1_N (output opendrain high)
|
552 |
* PC4 - IR_INT2_N (input floating)
|
553 |
* PC5 - TOUCH_INT_N (input floating)
|
554 |
* PC6 - SYS_DONE (input floating)
|
555 |
* PC7 - SYS_PROG_N (output opendrain high)
|
556 |
* PC8 - PATH_DC (input floating)
|
557 |
* PC9 - SYS_SPI_DIR (output opendrain high)
|
558 |
* PC10 - BT_RX (alternate 7 pushpull floating)
|
559 |
* PC11 - BT_TX (alternate 7 pushpull floating)
|
560 |
* PC12 - SYS_INT_N (output opendrain low)
|
561 |
* PC13 - SYS_PD_N (output opendrain high)
|
562 |
* PC14 - SYS_WARMRST_N (output opendrain high)
|
563 |
* PC15 - BT_RST (output opendrain high)
|
564 |
*/
|
565 |
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) | \
|
566 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) | \ |
567 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) | \ |
568 |
PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) | \ |
569 |
PIN_MODE_INPUT(GPIOC_IR_INT2_N) | \ |
570 |
PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) | \ |
571 |
PIN_MODE_INPUT(GPIOC_SYS_DONE) | \ |
572 |
PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) | \ |
573 |
PIN_MODE_INPUT(GPIOC_PATH_DC) | \ |
574 |
PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) | \ |
575 |
PIN_MODE_ALTERNATE(GPIOC_BT_RX) | \ |
576 |
PIN_MODE_ALTERNATE(GPIOC_BT_TX) | \ |
577 |
PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) | \ |
578 |
PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) | \ |
579 |
PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) | \ |
580 |
PIN_MODE_OUTPUT(GPIOC_BT_RST)) |
581 |
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_CHARGE_STAT1A) | \
|
582 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATLOW1) | \ |
583 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATGD1_N) | \ |
584 |
PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) | \ |
585 |
PIN_OTYPE_PUSHPULL(GPIOC_IR_INT2_N) | \ |
586 |
PIN_OTYPE_PUSHPULL(GPIOC_TOUCH_INT_N) | \ |
587 |
PIN_OTYPE_PUSHPULL(GPIOC_SYS_DONE) | \ |
588 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) | \ |
589 |
PIN_OTYPE_PUSHPULL(GPIOC_PATH_DC) | \ |
590 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) | \ |
591 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) | \ |
592 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_TX) | \ |
593 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) | \ |
594 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) | \ |
595 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) | \ |
596 |
PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST)) |
597 |
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_STAT1A) | \
|
598 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATLOW1) | \ |
599 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATGD1_N) | \ |
600 |
PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_EN1_N) | \ |
601 |
PIN_OSPEED_VERYHIGH(GPIOC_IR_INT2_N) | \ |
602 |
PIN_OSPEED_VERYHIGH(GPIOC_TOUCH_INT_N) | \ |
603 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_DONE) | \ |
604 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PROG_N) | \ |
605 |
PIN_OSPEED_VERYHIGH(GPIOC_PATH_DC) | \ |
606 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_SPI_DIR) | \ |
607 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RX) | \ |
608 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_TX) | \ |
609 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_INT_N) | \ |
610 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PD_N) | \ |
611 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_WARMRST_N) | \ |
612 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RST)) |
613 |
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_CHARGE_STAT1A) | \
|
614 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATLOW1) | \ |
615 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATGD1_N) | \ |
616 |
PIN_PUPDR_FLOATING(GPIOC_CHARGE_EN1_N) | \ |
617 |
PIN_PUPDR_FLOATING(GPIOC_IR_INT2_N) | \ |
618 |
PIN_PUPDR_FLOATING(GPIOC_TOUCH_INT_N) | \ |
619 |
PIN_PUPDR_FLOATING(GPIOC_SYS_DONE) | \ |
620 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PROG_N) | \ |
621 |
PIN_PUPDR_FLOATING(GPIOC_PATH_DC) | \ |
622 |
PIN_PUPDR_FLOATING(GPIOC_SYS_SPI_DIR) | \ |
623 |
PIN_PUPDR_FLOATING(GPIOC_BT_RX) | \ |
624 |
PIN_PUPDR_FLOATING(GPIOC_BT_TX) | \ |
625 |
PIN_PUPDR_FLOATING(GPIOC_SYS_INT_N) | \ |
626 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PD_N) | \ |
627 |
PIN_PUPDR_FLOATING(GPIOC_SYS_WARMRST_N) | \ |
628 |
PIN_PUPDR_FLOATING(GPIOC_BT_RST)) |
629 |
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_CHARGE_STAT1A) | \
|
630 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATLOW1) | \ |
631 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATGD1_N) | \ |
632 |
PIN_ODR_HIGH(GPIOC_CHARGE_EN1_N) | \ |
633 |
PIN_ODR_HIGH(GPIOC_IR_INT2_N) | \ |
634 |
PIN_ODR_HIGH(GPIOC_TOUCH_INT_N) | \ |
635 |
PIN_ODR_HIGH(GPIOC_SYS_DONE) | \ |
636 |
PIN_ODR_HIGH(GPIOC_SYS_PROG_N) | \ |
637 |
PIN_ODR_LOW(GPIOC_PATH_DC) | \ |
638 |
PIN_ODR_HIGH(GPIOC_SYS_SPI_DIR) | \ |
639 |
PIN_ODR_HIGH(GPIOC_BT_RX) | \ |
640 |
PIN_ODR_HIGH(GPIOC_BT_TX) | \ |
641 |
PIN_ODR_LOW(GPIOC_SYS_INT_N) | \ |
642 |
PIN_ODR_HIGH(GPIOC_SYS_PD_N) | \ |
643 |
PIN_ODR_HIGH(GPIOC_SYS_WARMRST_N) | \ |
644 |
PIN_ODR_HIGH(GPIOC_BT_RST)) |
645 |
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_CHARGE_STAT1A, STM32F4xx_AF_system) | \
|
646 |
PIN_AFIO_AF(GPIOC_GAUGE_BATLOW1, STM32F4xx_AF_system) | \ |
647 |
PIN_AFIO_AF(GPIOC_GAUGE_BATGD1_N, STM32F4xx_AF_system) | \ |
648 |
PIN_AFIO_AF(GPIOC_CHARGE_EN1_N, STM32F4xx_AF_system) | \ |
649 |
PIN_AFIO_AF(GPIOC_IR_INT2_N, STM32F4xx_AF_system) | \ |
650 |
PIN_AFIO_AF(GPIOC_TOUCH_INT_N, STM32F4xx_AF_system) | \ |
651 |
PIN_AFIO_AF(GPIOC_SYS_DONE, STM32F4xx_AF_system) | \ |
652 |
PIN_AFIO_AF(GPIOC_SYS_PROG_N, STM32F4xx_AF_system)) |
653 |
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PATH_DC, STM32F4xx_AF_system) | \
|
654 |
PIN_AFIO_AF(GPIOC_SYS_SPI_DIR, STM32F4xx_AF_system) | \ |
655 |
PIN_AFIO_AF(GPIOC_BT_RX, STM32F4xx_AF_USART1to3) | \ |
656 |
PIN_AFIO_AF(GPIOC_BT_TX, STM32F4xx_AF_USART1to3) | \ |
657 |
PIN_AFIO_AF(GPIOC_SYS_INT_N, STM32F4xx_AF_system) | \ |
658 |
PIN_AFIO_AF(GPIOC_SYS_PD_N, STM32F4xx_AF_system) | \ |
659 |
PIN_AFIO_AF(GPIOC_SYS_WARMRST_N, STM32F4xx_AF_system) | \ |
660 |
PIN_AFIO_AF(GPIOC_BT_RST, STM32F4xx_AF_system)) |
661 |
|
662 |
/*
|
663 |
* GPIOD setup:
|
664 |
*
|
665 |
* PD0 - PIN0 (input floating)
|
666 |
* PD1 - PIN1 (input floating)
|
667 |
* PD2 - CHARGE_EN2_N (output opendrain high)
|
668 |
* PD3 - PIN3 (input floating)
|
669 |
* PD4 - PIN4 (input floating)
|
670 |
* PD5 - PIN5 (input floating)
|
671 |
* PD6 - PIN6 (input floating)
|
672 |
* PD7 - PIN7 (input floating)
|
673 |
* PD8 - PIN8 (input floating)
|
674 |
* PD9 - PIN9 (input floating)
|
675 |
* PD10 - PIN10 (input floating)
|
676 |
* PD11 - PIN11 (input floating)
|
677 |
* PD12 - PIN12 (input floating)
|
678 |
* PD13 - PIN13 (input floating)
|
679 |
* PD14 - PIN14 (input floating)
|
680 |
* PD15 - PIN15 (input floating)
|
681 |
*/
|
682 |
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
683 |
PIN_MODE_INPUT(GPIOD_PIN1) | \ |
684 |
PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) | \ |
685 |
PIN_MODE_INPUT(GPIOD_PIN3) | \ |
686 |
PIN_MODE_INPUT(GPIOD_PIN4) | \ |
687 |
PIN_MODE_INPUT(GPIOD_PIN5) | \ |
688 |
PIN_MODE_INPUT(GPIOD_PIN6) | \ |
689 |
PIN_MODE_INPUT(GPIOD_PIN7) | \ |
690 |
PIN_MODE_INPUT(GPIOD_PIN8) | \ |
691 |
PIN_MODE_INPUT(GPIOD_PIN9) | \ |
692 |
PIN_MODE_INPUT(GPIOD_PIN10) | \ |
693 |
PIN_MODE_INPUT(GPIOD_PIN11) | \ |
694 |
PIN_MODE_INPUT(GPIOD_PIN12) | \ |
695 |
PIN_MODE_INPUT(GPIOD_PIN13) | \ |
696 |
PIN_MODE_INPUT(GPIOD_PIN14) | \ |
697 |
PIN_MODE_INPUT(GPIOD_PIN15)) |
698 |
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
699 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ |
700 |
PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N) | \ |
701 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ |
702 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ |
703 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ |
704 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ |
705 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ |
706 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ |
707 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ |
708 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ |
709 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ |
710 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ |
711 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ |
712 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ |
713 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) |
714 |
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOD_PIN0) | \
|
715 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN1) | \ |
716 |
PIN_OSPEED_VERYHIGH(GPIOD_CHARGE_EN2_N) | \ |
717 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN3) | \ |
718 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN4) | \ |
719 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN5) | \ |
720 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN6) | \ |
721 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN7) | \ |
722 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN8) | \ |
723 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN9) | \ |
724 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN10) | \ |
725 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN11) | \ |
726 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN12) | \ |
727 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN13) | \ |
728 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN14) | \ |
729 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN15)) |
730 |
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
731 |
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ |
732 |
PIN_PUPDR_FLOATING(GPIOD_CHARGE_EN2_N) | \ |
733 |
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ |
734 |
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ |
735 |
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ |
736 |
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ |
737 |
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ |
738 |
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ |
739 |
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ |
740 |
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ |
741 |
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ |
742 |
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ |
743 |
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ |
744 |
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ |
745 |
PIN_PUPDR_PULLUP(GPIOD_PIN15)) |
746 |
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
747 |
PIN_ODR_HIGH(GPIOD_PIN1) | \ |
748 |
PIN_ODR_HIGH(GPIOD_CHARGE_EN2_N) | \ |
749 |
PIN_ODR_HIGH(GPIOD_PIN3) | \ |
750 |
PIN_ODR_HIGH(GPIOD_PIN4) | \ |
751 |
PIN_ODR_HIGH(GPIOD_PIN5) | \ |
752 |
PIN_ODR_HIGH(GPIOD_PIN6) | \ |
753 |
PIN_ODR_HIGH(GPIOD_PIN7) | \ |
754 |
PIN_ODR_HIGH(GPIOD_PIN8) | \ |
755 |
PIN_ODR_HIGH(GPIOD_PIN9) | \ |
756 |
PIN_ODR_HIGH(GPIOD_PIN10) | \ |
757 |
PIN_ODR_HIGH(GPIOD_PIN11) | \ |
758 |
PIN_ODR_HIGH(GPIOD_PIN12) | \ |
759 |
PIN_ODR_HIGH(GPIOD_PIN13) | \ |
760 |
PIN_ODR_HIGH(GPIOD_PIN14) | \ |
761 |
PIN_ODR_HIGH(GPIOD_PIN15)) |
762 |
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, STM32F4xx_AF_system) | \
|
763 |
PIN_AFIO_AF(GPIOD_PIN1, STM32F4xx_AF_system) | \ |
764 |
PIN_AFIO_AF(GPIOD_CHARGE_EN2_N, STM32F4xx_AF_system) | \ |
765 |
PIN_AFIO_AF(GPIOD_PIN3, STM32F4xx_AF_system) | \ |
766 |
PIN_AFIO_AF(GPIOD_PIN4, STM32F4xx_AF_system) | \ |
767 |
PIN_AFIO_AF(GPIOD_PIN5, STM32F4xx_AF_system) | \ |
768 |
PIN_AFIO_AF(GPIOD_PIN6, STM32F4xx_AF_system) | \ |
769 |
PIN_AFIO_AF(GPIOD_PIN7, STM32F4xx_AF_system)) |
770 |
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, STM32F4xx_AF_system) | \
|
771 |
PIN_AFIO_AF(GPIOD_PIN9, STM32F4xx_AF_system) | \ |
772 |
PIN_AFIO_AF(GPIOD_PIN10, STM32F4xx_AF_system) | \ |
773 |
PIN_AFIO_AF(GPIOD_PIN11, STM32F4xx_AF_system) | \ |
774 |
PIN_AFIO_AF(GPIOD_PIN12, STM32F4xx_AF_system) | \ |
775 |
PIN_AFIO_AF(GPIOD_PIN13, STM32F4xx_AF_system) | \ |
776 |
PIN_AFIO_AF(GPIOD_PIN14, STM32F4xx_AF_system) | \ |
777 |
PIN_AFIO_AF(GPIOD_PIN15, STM32F4xx_AF_system)) |
778 |
|
779 |
/*
|
780 |
* GPIOE setup:
|
781 |
*
|
782 |
* PE0 - PIN0 (input floating)
|
783 |
* PE1 - PIN1 (input floating)
|
784 |
* PE2 - PIN2 (input floating)
|
785 |
* PE3 - PIN3 (input floating)
|
786 |
* PE4 - PIN4 (input floating)
|
787 |
* PE5 - PIN5 (input floating)
|
788 |
* PE6 - PIN6 (input floating)
|
789 |
* PE7 - PIN7 (input floating)
|
790 |
* PE8 - PIN8 (input floating)
|
791 |
* PE9 - PIN9 (input floating)
|
792 |
* PE10 - PIN10 (input floating)
|
793 |
* PE11 - PIN11 (input floating)
|
794 |
* PE12 - PIN12 (input floating)
|
795 |
* PE13 - PIN13 (input floating)
|
796 |
* PE14 - PIN14 (input floating)
|
797 |
* PE15 - PIN15 (input floating)
|
798 |
*/
|
799 |
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
800 |
PIN_MODE_INPUT(GPIOE_PIN1) | \ |
801 |
PIN_MODE_INPUT(GPIOE_PIN2) | \ |
802 |
PIN_MODE_INPUT(GPIOE_PIN3) | \ |
803 |
PIN_MODE_INPUT(GPIOE_PIN4) | \ |
804 |
PIN_MODE_INPUT(GPIOE_PIN5) | \ |
805 |
PIN_MODE_INPUT(GPIOE_PIN6) | \ |
806 |
PIN_MODE_INPUT(GPIOE_PIN7) | \ |
807 |
PIN_MODE_INPUT(GPIOE_PIN8) | \ |
808 |
PIN_MODE_INPUT(GPIOE_PIN9) | \ |
809 |
PIN_MODE_INPUT(GPIOE_PIN10) | \ |
810 |
PIN_MODE_INPUT(GPIOE_PIN11) | \ |
811 |
PIN_MODE_INPUT(GPIOE_PIN12) | \ |
812 |
PIN_MODE_INPUT(GPIOE_PIN13) | \ |
813 |
PIN_MODE_INPUT(GPIOE_PIN14) | \ |
814 |
PIN_MODE_INPUT(GPIOE_PIN15)) |
815 |
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
|
816 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ |
817 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ |
818 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ |
819 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ |
820 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ |
821 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ |
822 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ |
823 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ |
824 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ |
825 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ |
826 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ |
827 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ |
828 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ |
829 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ |
830 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) |
831 |
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_LOW(GPIOE_PIN0) | \
|
832 |
PIN_OSPEED_LOW(GPIOE_PIN1) | \ |
833 |
PIN_OSPEED_LOW(GPIOE_PIN2) | \ |
834 |
PIN_OSPEED_LOW(GPIOE_PIN3) | \ |
835 |
PIN_OSPEED_LOW(GPIOE_PIN4) | \ |
836 |
PIN_OSPEED_LOW(GPIOE_PIN5) | \ |
837 |
PIN_OSPEED_LOW(GPIOE_PIN6) | \ |
838 |
PIN_OSPEED_LOW(GPIOE_PIN7) | \ |
839 |
PIN_OSPEED_LOW(GPIOE_PIN8) | \ |
840 |
PIN_OSPEED_LOW(GPIOE_PIN9) | \ |
841 |
PIN_OSPEED_LOW(GPIOE_PIN10) | \ |
842 |
PIN_OSPEED_LOW(GPIOE_PIN11) | \ |
843 |
PIN_OSPEED_LOW(GPIOE_PIN12) | \ |
844 |
PIN_OSPEED_LOW(GPIOE_PIN13) | \ |
845 |
PIN_OSPEED_LOW(GPIOE_PIN14) | \ |
846 |
PIN_OSPEED_LOW(GPIOE_PIN15)) |
847 |
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \
|
848 |
PIN_PUPDR_FLOATING(GPIOE_PIN1) | \ |
849 |
PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ |
850 |
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ |
851 |
PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ |
852 |
PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ |
853 |
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ |
854 |
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ |
855 |
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ |
856 |
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ |
857 |
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ |
858 |
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ |
859 |
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ |
860 |
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ |
861 |
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ |
862 |
PIN_PUPDR_FLOATING(GPIOE_PIN15)) |
863 |
#define VAL_GPIOE_ODR (PIN_ODR_LOW(GPIOE_PIN0) | \
|
864 |
PIN_ODR_LOW(GPIOE_PIN1) | \ |
865 |
PIN_ODR_LOW(GPIOE_PIN2) | \ |
866 |
PIN_ODR_LOW(GPIOE_PIN3) | \ |
867 |
PIN_ODR_LOW(GPIOE_PIN4) | \ |
868 |
PIN_ODR_LOW(GPIOE_PIN5) | \ |
869 |
PIN_ODR_LOW(GPIOE_PIN6) | \ |
870 |
PIN_ODR_LOW(GPIOE_PIN7) | \ |
871 |
PIN_ODR_LOW(GPIOE_PIN8) | \ |
872 |
PIN_ODR_LOW(GPIOE_PIN9) | \ |
873 |
PIN_ODR_LOW(GPIOE_PIN10) | \ |
874 |
PIN_ODR_LOW(GPIOE_PIN11) | \ |
875 |
PIN_ODR_LOW(GPIOE_PIN12) | \ |
876 |
PIN_ODR_LOW(GPIOE_PIN13) | \ |
877 |
PIN_ODR_LOW(GPIOE_PIN14) | \ |
878 |
PIN_ODR_LOW(GPIOE_PIN15)) |
879 |
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, STM32F4xx_AF_system) | \
|
880 |
PIN_AFIO_AF(GPIOE_PIN1, STM32F4xx_AF_system) | \ |
881 |
PIN_AFIO_AF(GPIOE_PIN2, STM32F4xx_AF_system) | \ |
882 |
PIN_AFIO_AF(GPIOE_PIN3, STM32F4xx_AF_system) | \ |
883 |
PIN_AFIO_AF(GPIOE_PIN4, STM32F4xx_AF_system) | \ |
884 |
PIN_AFIO_AF(GPIOE_PIN5, STM32F4xx_AF_system) | \ |
885 |
PIN_AFIO_AF(GPIOE_PIN6, STM32F4xx_AF_system) | \ |
886 |
PIN_AFIO_AF(GPIOE_PIN7, STM32F4xx_AF_system)) |
887 |
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, STM32F4xx_AF_system) | \
|
888 |
PIN_AFIO_AF(GPIOE_PIN9, STM32F4xx_AF_system) | \ |
889 |
PIN_AFIO_AF(GPIOE_PIN10, STM32F4xx_AF_system) | \ |
890 |
PIN_AFIO_AF(GPIOE_PIN11, STM32F4xx_AF_system) | \ |
891 |
PIN_AFIO_AF(GPIOE_PIN12, STM32F4xx_AF_system) | \ |
892 |
PIN_AFIO_AF(GPIOE_PIN13, STM32F4xx_AF_system) | \ |
893 |
PIN_AFIO_AF(GPIOE_PIN14, STM32F4xx_AF_system) | \ |
894 |
PIN_AFIO_AF(GPIOE_PIN15, STM32F4xx_AF_system)) |
895 |
|
896 |
/*
|
897 |
* GPIOF setup:
|
898 |
*
|
899 |
* PF0 - PIN0 (input floating)
|
900 |
* PF1 - PIN1 (input floating)
|
901 |
* PF2 - PIN2 (input floating)
|
902 |
* PF3 - PIN3 (input floating)
|
903 |
* PF4 - PIN4 (input floating)
|
904 |
* PF5 - PIN5 (input floating)
|
905 |
* PF6 - PIN6 (input floating)
|
906 |
* PF7 - PIN7 (input floating)
|
907 |
* PF8 - PIN8 (input floating)
|
908 |
* PF9 - PIN9 (input floating)
|
909 |
* PF10 - PIN10 (input floating)
|
910 |
* PF11 - PIN11 (input floating)
|
911 |
* PF12 - PIN12 (input floating)
|
912 |
* PF13 - PIN13 (input floating)
|
913 |
* PF14 - PIN14 (input floating)
|
914 |
* PF15 - PIN15 (input floating)
|
915 |
*/
|
916 |
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \
|
917 |
PIN_MODE_INPUT(GPIOF_PIN1) | \ |
918 |
PIN_MODE_INPUT(GPIOF_PIN2) | \ |
919 |
PIN_MODE_INPUT(GPIOF_PIN3) | \ |
920 |
PIN_MODE_INPUT(GPIOF_PIN4) | \ |
921 |
PIN_MODE_INPUT(GPIOF_PIN5) | \ |
922 |
PIN_MODE_INPUT(GPIOF_PIN6) | \ |
923 |
PIN_MODE_INPUT(GPIOF_PIN7) | \ |
924 |
PIN_MODE_INPUT(GPIOF_PIN8) | \ |
925 |
PIN_MODE_INPUT(GPIOF_PIN9) | \ |
926 |
PIN_MODE_INPUT(GPIOF_PIN10) | \ |
927 |
PIN_MODE_INPUT(GPIOF_PIN11) | \ |
928 |
PIN_MODE_INPUT(GPIOF_PIN12) | \ |
929 |
PIN_MODE_INPUT(GPIOF_PIN13) | \ |
930 |
PIN_MODE_INPUT(GPIOF_PIN14) | \ |
931 |
PIN_MODE_INPUT(GPIOF_PIN15)) |
932 |
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
|
933 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ |
934 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ |
935 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ |
936 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ |
937 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ |
938 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ |
939 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ |
940 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ |
941 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ |
942 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ |
943 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ |
944 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ |
945 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ |
946 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ |
947 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) |
948 |
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_LOW(GPIOF_PIN0) | \
|
949 |
PIN_OSPEED_LOW(GPIOF_PIN1) | \ |
950 |
PIN_OSPEED_LOW(GPIOF_PIN2) | \ |
951 |
PIN_OSPEED_LOW(GPIOF_PIN3) | \ |
952 |
PIN_OSPEED_LOW(GPIOF_PIN4) | \ |
953 |
PIN_OSPEED_LOW(GPIOF_PIN5) | \ |
954 |
PIN_OSPEED_LOW(GPIOF_PIN6) | \ |
955 |
PIN_OSPEED_LOW(GPIOF_PIN7) | \ |
956 |
PIN_OSPEED_LOW(GPIOF_PIN8) | \ |
957 |
PIN_OSPEED_LOW(GPIOF_PIN9) | \ |
958 |
PIN_OSPEED_LOW(GPIOF_PIN10) | \ |
959 |
PIN_OSPEED_LOW(GPIOF_PIN11) | \ |
960 |
PIN_OSPEED_LOW(GPIOF_PIN12) | \ |
961 |
PIN_OSPEED_LOW(GPIOF_PIN13) | \ |
962 |
PIN_OSPEED_LOW(GPIOF_PIN14) | \ |
963 |
PIN_OSPEED_LOW(GPIOF_PIN15)) |
964 |
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \
|
965 |
PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ |
966 |
PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ |
967 |
PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ |
968 |
PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ |
969 |
PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ |
970 |
PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ |
971 |
PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ |
972 |
PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ |
973 |
PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ |
974 |
PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ |
975 |
PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ |
976 |
PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ |
977 |
PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ |
978 |
PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ |
979 |
PIN_PUPDR_FLOATING(GPIOF_PIN15)) |
980 |
#define VAL_GPIOF_ODR (PIN_ODR_LOW(GPIOF_PIN0) | \
|
981 |
PIN_ODR_LOW(GPIOF_PIN1) | \ |
982 |
PIN_ODR_LOW(GPIOF_PIN2) | \ |
983 |
PIN_ODR_LOW(GPIOF_PIN3) | \ |
984 |
PIN_ODR_LOW(GPIOF_PIN4) | \ |
985 |
PIN_ODR_LOW(GPIOF_PIN5) | \ |
986 |
PIN_ODR_LOW(GPIOF_PIN6) | \ |
987 |
PIN_ODR_LOW(GPIOF_PIN7) | \ |
988 |
PIN_ODR_LOW(GPIOF_PIN8) | \ |
989 |
PIN_ODR_LOW(GPIOF_PIN9) | \ |
990 |
PIN_ODR_LOW(GPIOF_PIN10) | \ |
991 |
PIN_ODR_LOW(GPIOF_PIN11) | \ |
992 |
PIN_ODR_LOW(GPIOF_PIN12) | \ |
993 |
PIN_ODR_LOW(GPIOF_PIN13) | \ |
994 |
PIN_ODR_LOW(GPIOF_PIN14) | \ |
995 |
PIN_ODR_LOW(GPIOF_PIN15)) |
996 |
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, STM32F4xx_AF_system) | \
|
997 |
PIN_AFIO_AF(GPIOF_PIN1, STM32F4xx_AF_system) | \ |
998 |
PIN_AFIO_AF(GPIOF_PIN2, STM32F4xx_AF_system) | \ |
999 |
PIN_AFIO_AF(GPIOF_PIN3, STM32F4xx_AF_system) | \ |
1000 |
PIN_AFIO_AF(GPIOF_PIN4, STM32F4xx_AF_system) | \ |
1001 |
PIN_AFIO_AF(GPIOF_PIN5, STM32F4xx_AF_system) | \ |
1002 |
PIN_AFIO_AF(GPIOF_PIN6, STM32F4xx_AF_system) | \ |
1003 |
PIN_AFIO_AF(GPIOF_PIN7, STM32F4xx_AF_system)) |
1004 |
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, STM32F4xx_AF_system) | \
|
1005 |
PIN_AFIO_AF(GPIOF_PIN9, STM32F4xx_AF_system) | \ |
1006 |
PIN_AFIO_AF(GPIOF_PIN10, STM32F4xx_AF_system) | \ |
1007 |
PIN_AFIO_AF(GPIOF_PIN11, STM32F4xx_AF_system) | \ |
1008 |
PIN_AFIO_AF(GPIOF_PIN12, STM32F4xx_AF_system) | \ |
1009 |
PIN_AFIO_AF(GPIOF_PIN13, STM32F4xx_AF_system) | \ |
1010 |
PIN_AFIO_AF(GPIOF_PIN14, STM32F4xx_AF_system) | \ |
1011 |
PIN_AFIO_AF(GPIOF_PIN15, STM32F4xx_AF_system)) |
1012 |
|
1013 |
/*
|
1014 |
* GPIOG setup:
|
1015 |
*
|
1016 |
* PG0 - PIN0 (input floating)
|
1017 |
* PG1 - PIN1 (input floating)
|
1018 |
* PG2 - PIN2 (input floating)
|
1019 |
* PG3 - PIN3 (input floating)
|
1020 |
* PG4 - PIN4 (input floating)
|
1021 |
* PG5 - PIN5 (input floating)
|
1022 |
* PG6 - PIN6 (input floating)
|
1023 |
* PG7 - PIN7 (input floating)
|
1024 |
* PG8 - PIN8 (input floating)
|
1025 |
* PG9 - PIN9 (input floating)
|
1026 |
* PG10 - PIN10 (input floating)
|
1027 |
* PG11 - PIN11 (input floating)
|
1028 |
* PG12 - PIN12 (input floating)
|
1029 |
* PG13 - PIN13 (input floating)
|
1030 |
* PG14 - PIN14 (input floating)
|
1031 |
* PG15 - PIN15 (input floating)
|
1032 |
*/
|
1033 |
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
|
1034 |
PIN_MODE_INPUT(GPIOG_PIN1) | \ |
1035 |
PIN_MODE_INPUT(GPIOG_PIN2) | \ |
1036 |
PIN_MODE_INPUT(GPIOG_PIN3) | \ |
1037 |
PIN_MODE_INPUT(GPIOG_PIN4) | \ |
1038 |
PIN_MODE_INPUT(GPIOG_PIN5) | \ |
1039 |
PIN_MODE_INPUT(GPIOG_PIN6) | \ |
1040 |
PIN_MODE_INPUT(GPIOG_PIN7) | \ |
1041 |
PIN_MODE_INPUT(GPIOG_PIN8) | \ |
1042 |
PIN_MODE_INPUT(GPIOG_PIN9) | \ |
1043 |
PIN_MODE_INPUT(GPIOG_PIN10) | \ |
1044 |
PIN_MODE_INPUT(GPIOG_PIN11) | \ |
1045 |
PIN_MODE_INPUT(GPIOG_PIN12) | \ |
1046 |
PIN_MODE_INPUT(GPIOG_PIN13) | \ |
1047 |
PIN_MODE_INPUT(GPIOG_PIN14) | \ |
1048 |
PIN_MODE_INPUT(GPIOG_PIN15)) |
1049 |
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
|
1050 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ |
1051 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ |
1052 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ |
1053 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ |
1054 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ |
1055 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ |
1056 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ |
1057 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ |
1058 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ |
1059 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ |
1060 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ |
1061 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ |
1062 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ |
1063 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ |
1064 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) |
1065 |
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_LOW(GPIOG_PIN0) | \
|
1066 |
PIN_OSPEED_LOW(GPIOG_PIN1) | \ |
1067 |
PIN_OSPEED_LOW(GPIOG_PIN2) | \ |
1068 |
PIN_OSPEED_LOW(GPIOG_PIN3) | \ |
1069 |
PIN_OSPEED_LOW(GPIOG_PIN4) | \ |
1070 |
PIN_OSPEED_LOW(GPIOG_PIN5) | \ |
1071 |
PIN_OSPEED_LOW(GPIOG_PIN6) | \ |
1072 |
PIN_OSPEED_LOW(GPIOG_PIN7) | \ |
1073 |
PIN_OSPEED_LOW(GPIOG_PIN8) | \ |
1074 |
PIN_OSPEED_LOW(GPIOG_PIN9) | \ |
1075 |
PIN_OSPEED_LOW(GPIOG_PIN10) | \ |
1076 |
PIN_OSPEED_LOW(GPIOG_PIN11) | \ |
1077 |
PIN_OSPEED_LOW(GPIOG_PIN12) | \ |
1078 |
PIN_OSPEED_LOW(GPIOG_PIN13) | \ |
1079 |
PIN_OSPEED_LOW(GPIOG_PIN14) | \ |
1080 |
PIN_OSPEED_LOW(GPIOG_PIN15)) |
1081 |
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
|
1082 |
PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ |
1083 |
PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ |
1084 |
PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ |
1085 |
PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ |
1086 |
PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ |
1087 |
PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ |
1088 |
PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ |
1089 |
PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ |
1090 |
PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ |
1091 |
PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ |
1092 |
PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ |
1093 |
PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ |
1094 |
PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ |
1095 |
PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ |
1096 |
PIN_PUPDR_FLOATING(GPIOG_PIN15)) |
1097 |
#define VAL_GPIOG_ODR (PIN_ODR_LOW(GPIOG_PIN0) | \
|
1098 |
PIN_ODR_LOW(GPIOG_PIN1) | \ |
1099 |
PIN_ODR_LOW(GPIOG_PIN2) | \ |
1100 |
PIN_ODR_LOW(GPIOG_PIN3) | \ |
1101 |
PIN_ODR_LOW(GPIOG_PIN4) | \ |
1102 |
PIN_ODR_LOW(GPIOG_PIN5) | \ |
1103 |
PIN_ODR_LOW(GPIOG_PIN6) | \ |
1104 |
PIN_ODR_LOW(GPIOG_PIN7) | \ |
1105 |
PIN_ODR_LOW(GPIOG_PIN8) | \ |
1106 |
PIN_ODR_LOW(GPIOG_PIN9) | \ |
1107 |
PIN_ODR_LOW(GPIOG_PIN10) | \ |
1108 |
PIN_ODR_LOW(GPIOG_PIN11) | \ |
1109 |
PIN_ODR_LOW(GPIOG_PIN12) | \ |
1110 |
PIN_ODR_LOW(GPIOG_PIN13) | \ |
1111 |
PIN_ODR_LOW(GPIOG_PIN14) | \ |
1112 |
PIN_ODR_LOW(GPIOG_PIN15)) |
1113 |
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, STM32F4xx_AF_system) | \
|
1114 |
PIN_AFIO_AF(GPIOG_PIN1, STM32F4xx_AF_system) | \ |
1115 |
PIN_AFIO_AF(GPIOG_PIN2, STM32F4xx_AF_system) | \ |
1116 |
PIN_AFIO_AF(GPIOG_PIN3, STM32F4xx_AF_system) | \ |
1117 |
PIN_AFIO_AF(GPIOG_PIN4, STM32F4xx_AF_system) | \ |
1118 |
PIN_AFIO_AF(GPIOG_PIN5, STM32F4xx_AF_system) | \ |
1119 |
PIN_AFIO_AF(GPIOG_PIN6, STM32F4xx_AF_system) | \ |
1120 |
PIN_AFIO_AF(GPIOG_PIN7, STM32F4xx_AF_system)) |
1121 |
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, STM32F4xx_AF_system) | \
|
1122 |
PIN_AFIO_AF(GPIOG_PIN9, STM32F4xx_AF_system) | \ |
1123 |
PIN_AFIO_AF(GPIOG_PIN10, STM32F4xx_AF_system) | \ |
1124 |
PIN_AFIO_AF(GPIOG_PIN11, STM32F4xx_AF_system) | \ |
1125 |
PIN_AFIO_AF(GPIOG_PIN12, STM32F4xx_AF_system) | \ |
1126 |
PIN_AFIO_AF(GPIOG_PIN13, STM32F4xx_AF_system) | \ |
1127 |
PIN_AFIO_AF(GPIOG_PIN14, STM32F4xx_AF_system) | \ |
1128 |
PIN_AFIO_AF(GPIOG_PIN15, STM32F4xx_AF_system)) |
1129 |
|
1130 |
/*
|
1131 |
* GPIOH setup:
|
1132 |
*
|
1133 |
* PH0 - OSC_IN (input floating)
|
1134 |
* PH1 - OSC_OUT (input floating)
|
1135 |
* PH2 - PIN2 (input floating)
|
1136 |
* PH3 - PIN3 (input floating)
|
1137 |
* PH4 - PIN4 (input floating)
|
1138 |
* PH5 - PIN5 (input floating)
|
1139 |
* PH6 - PIN6 (input floating)
|
1140 |
* PH7 - PIN7 (input floating)
|
1141 |
* PH8 - PIN8 (input floating)
|
1142 |
* PH9 - PIN9 (input floating)
|
1143 |
* PH10 - PIN10 (input floating)
|
1144 |
* PH11 - PIN11 (input floating)
|
1145 |
* PH12 - PIN12 (input floating)
|
1146 |
* PH13 - PIN13 (input floating)
|
1147 |
* PH14 - PIN14 (input floating)
|
1148 |
* PH15 - PIN15 (input floating)
|
1149 |
*/
|
1150 |
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
|
1151 |
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ |
1152 |
PIN_MODE_INPUT(GPIOH_PIN2) | \ |
1153 |
PIN_MODE_INPUT(GPIOH_PIN3) | \ |
1154 |
PIN_MODE_INPUT(GPIOH_PIN4) | \ |
1155 |
PIN_MODE_INPUT(GPIOH_PIN5) | \ |
1156 |
PIN_MODE_INPUT(GPIOH_PIN6) | \ |
1157 |
PIN_MODE_INPUT(GPIOH_PIN7) | \ |
1158 |
PIN_MODE_INPUT(GPIOH_PIN8) | \ |
1159 |
PIN_MODE_INPUT(GPIOH_PIN9) | \ |
1160 |
PIN_MODE_INPUT(GPIOH_PIN10) | \ |
1161 |
PIN_MODE_INPUT(GPIOH_PIN11) | \ |
1162 |
PIN_MODE_INPUT(GPIOH_PIN12) | \ |
1163 |
PIN_MODE_INPUT(GPIOH_PIN13) | \ |
1164 |
PIN_MODE_INPUT(GPIOH_PIN14) | \ |
1165 |
PIN_MODE_INPUT(GPIOH_PIN15)) |
1166 |
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
|
1167 |
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ |
1168 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ |
1169 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ |
1170 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ |
1171 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ |
1172 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ |
1173 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ |
1174 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ |
1175 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ |
1176 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ |
1177 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ |
1178 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ |
1179 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ |
1180 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ |
1181 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) |
1182 |
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOH_OSC_IN) | \
|
1183 |
PIN_OSPEED_VERYHIGH(GPIOH_OSC_OUT) | \ |
1184 |
PIN_OSPEED_LOW(GPIOH_PIN2) | \ |
1185 |
PIN_OSPEED_LOW(GPIOH_PIN3) | \ |
1186 |
PIN_OSPEED_LOW(GPIOH_PIN4) | \ |
1187 |
PIN_OSPEED_LOW(GPIOH_PIN5) | \ |
1188 |
PIN_OSPEED_LOW(GPIOH_PIN6) | \ |
1189 |
PIN_OSPEED_LOW(GPIOH_PIN7) | \ |
1190 |
PIN_OSPEED_LOW(GPIOH_PIN8) | \ |
1191 |
PIN_OSPEED_LOW(GPIOH_PIN9) | \ |
1192 |
PIN_OSPEED_LOW(GPIOH_PIN10) | \ |
1193 |
PIN_OSPEED_LOW(GPIOH_PIN11) | \ |
1194 |
PIN_OSPEED_LOW(GPIOH_PIN12) | \ |
1195 |
PIN_OSPEED_LOW(GPIOH_PIN13) | \ |
1196 |
PIN_OSPEED_LOW(GPIOH_PIN14) | \ |
1197 |
PIN_OSPEED_LOW(GPIOH_PIN15)) |
1198 |
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
1199 |
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ |
1200 |
PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ |
1201 |
PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ |
1202 |
PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ |
1203 |
PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ |
1204 |
PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ |
1205 |
PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ |
1206 |
PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ |
1207 |
PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ |
1208 |
PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ |
1209 |
PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ |
1210 |
PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ |
1211 |
PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ |
1212 |
PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ |
1213 |
PIN_PUPDR_FLOATING(GPIOH_PIN15)) |
1214 |
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
1215 |
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ |
1216 |
PIN_ODR_HIGH(GPIOH_PIN2) | \ |
1217 |
PIN_ODR_HIGH(GPIOH_PIN3) | \ |
1218 |
PIN_ODR_HIGH(GPIOH_PIN4) | \ |
1219 |
PIN_ODR_HIGH(GPIOH_PIN5) | \ |
1220 |
PIN_ODR_HIGH(GPIOH_PIN6) | \ |
1221 |
PIN_ODR_HIGH(GPIOH_PIN7) | \ |
1222 |
PIN_ODR_HIGH(GPIOH_PIN8) | \ |
1223 |
PIN_ODR_HIGH(GPIOH_PIN9) | \ |
1224 |
PIN_ODR_HIGH(GPIOH_PIN10) | \ |
1225 |
PIN_ODR_HIGH(GPIOH_PIN11) | \ |
1226 |
PIN_ODR_HIGH(GPIOH_PIN12) | \ |
1227 |
PIN_ODR_HIGH(GPIOH_PIN13) | \ |
1228 |
PIN_ODR_HIGH(GPIOH_PIN14) | \ |
1229 |
PIN_ODR_HIGH(GPIOH_PIN15)) |
1230 |
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, STM32F4xx_AF_system) | \
|
1231 |
PIN_AFIO_AF(GPIOH_OSC_OUT, STM32F4xx_AF_system) | \ |
1232 |
PIN_AFIO_AF(GPIOH_PIN2, STM32F4xx_AF_system) | \ |
1233 |
PIN_AFIO_AF(GPIOH_PIN3, STM32F4xx_AF_system) | \ |
1234 |
PIN_AFIO_AF(GPIOH_PIN4, STM32F4xx_AF_system) | \ |
1235 |
PIN_AFIO_AF(GPIOH_PIN5, STM32F4xx_AF_system) | \ |
1236 |
PIN_AFIO_AF(GPIOH_PIN6, STM32F4xx_AF_system) | \ |
1237 |
PIN_AFIO_AF(GPIOH_PIN7, STM32F4xx_AF_system)) |
1238 |
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, STM32F4xx_AF_system) | \
|
1239 |
PIN_AFIO_AF(GPIOH_PIN9, STM32F4xx_AF_system) | \ |
1240 |
PIN_AFIO_AF(GPIOH_PIN10, STM32F4xx_AF_system) | \ |
1241 |
PIN_AFIO_AF(GPIOH_PIN11, STM32F4xx_AF_system) | \ |
1242 |
PIN_AFIO_AF(GPIOH_PIN12, STM32F4xx_AF_system) | \ |
1243 |
PIN_AFIO_AF(GPIOH_PIN13, STM32F4xx_AF_system) | \ |
1244 |
PIN_AFIO_AF(GPIOH_PIN14, STM32F4xx_AF_system) | \ |
1245 |
PIN_AFIO_AF(GPIOH_PIN15, STM32F4xx_AF_system)) |
1246 |
|
1247 |
/*
|
1248 |
* GPIOI setup:
|
1249 |
*
|
1250 |
* PI0 - PIN0 (input floating)
|
1251 |
* PI1 - PIN1 (input floating)
|
1252 |
* PI2 - PIN2 (input floating)
|
1253 |
* PI3 - PIN3 (input floating)
|
1254 |
* PI4 - PIN4 (input floating)
|
1255 |
* PI5 - PIN5 (input floating)
|
1256 |
* PI6 - PIN6 (input floating)
|
1257 |
* PI7 - PIN7 (input floating)
|
1258 |
* PI8 - PIN8 (input floating)
|
1259 |
* PI9 - PIN9 (input floating)
|
1260 |
* PI10 - PIN10 (input floating)
|
1261 |
* PI11 - PIN11 (input floating)
|
1262 |
* PI12 - PIN12 (input floating)
|
1263 |
* PI13 - PIN13 (input floating)
|
1264 |
* PI14 - PIN14 (input floating)
|
1265 |
* PI15 - PIN15 (input floating)
|
1266 |
*/
|
1267 |
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
|
1268 |
PIN_MODE_INPUT(GPIOI_PIN1) | \ |
1269 |
PIN_MODE_INPUT(GPIOI_PIN2) | \ |
1270 |
PIN_MODE_INPUT(GPIOI_PIN3) | \ |
1271 |
PIN_MODE_INPUT(GPIOI_PIN4) | \ |
1272 |
PIN_MODE_INPUT(GPIOI_PIN5) | \ |
1273 |
PIN_MODE_INPUT(GPIOI_PIN6) | \ |
1274 |
PIN_MODE_INPUT(GPIOI_PIN7) | \ |
1275 |
PIN_MODE_INPUT(GPIOI_PIN8) | \ |
1276 |
PIN_MODE_INPUT(GPIOI_PIN9) | \ |
1277 |
PIN_MODE_INPUT(GPIOI_PIN10) | \ |
1278 |
PIN_MODE_INPUT(GPIOI_PIN11) | \ |
1279 |
PIN_MODE_INPUT(GPIOI_PIN12) | \ |
1280 |
PIN_MODE_INPUT(GPIOI_PIN13) | \ |
1281 |
PIN_MODE_INPUT(GPIOI_PIN14) | \ |
1282 |
PIN_MODE_INPUT(GPIOI_PIN15)) |
1283 |
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
|
1284 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ |
1285 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ |
1286 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ |
1287 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ |
1288 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ |
1289 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ |
1290 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ |
1291 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ |
1292 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ |
1293 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ |
1294 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ |
1295 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ |
1296 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ |
1297 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ |
1298 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) |
1299 |
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_LOW(GPIOI_PIN0) | \
|
1300 |
PIN_OSPEED_LOW(GPIOI_PIN1) | \ |
1301 |
PIN_OSPEED_LOW(GPIOI_PIN2) | \ |
1302 |
PIN_OSPEED_LOW(GPIOI_PIN3) | \ |
1303 |
PIN_OSPEED_LOW(GPIOI_PIN4) | \ |
1304 |
PIN_OSPEED_LOW(GPIOI_PIN5) | \ |
1305 |
PIN_OSPEED_LOW(GPIOI_PIN6) | \ |
1306 |
PIN_OSPEED_LOW(GPIOI_PIN7) | \ |
1307 |
PIN_OSPEED_LOW(GPIOI_PIN8) | \ |
1308 |
PIN_OSPEED_LOW(GPIOI_PIN9) | \ |
1309 |
PIN_OSPEED_LOW(GPIOI_PIN10) | \ |
1310 |
PIN_OSPEED_LOW(GPIOI_PIN11) | \ |
1311 |
PIN_OSPEED_LOW(GPIOI_PIN12) | \ |
1312 |
PIN_OSPEED_LOW(GPIOI_PIN13) | \ |
1313 |
PIN_OSPEED_LOW(GPIOI_PIN14) | \ |
1314 |
PIN_OSPEED_LOW(GPIOI_PIN15)) |
1315 |
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \
|
1316 |
PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ |
1317 |
PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ |
1318 |
PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ |
1319 |
PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ |
1320 |
PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ |
1321 |
PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ |
1322 |
PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ |
1323 |
PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ |
1324 |
PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ |
1325 |
PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ |
1326 |
PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ |
1327 |
PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ |
1328 |
PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ |
1329 |
PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ |
1330 |
PIN_PUPDR_FLOATING(GPIOI_PIN15)) |
1331 |
#define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \
|
1332 |
PIN_ODR_LOW(GPIOI_PIN1) | \ |
1333 |
PIN_ODR_LOW(GPIOI_PIN2) | \ |
1334 |
PIN_ODR_LOW(GPIOI_PIN3) | \ |
1335 |
PIN_ODR_LOW(GPIOI_PIN4) | \ |
1336 |
PIN_ODR_LOW(GPIOI_PIN5) | \ |
1337 |
PIN_ODR_LOW(GPIOI_PIN6) | \ |
1338 |
PIN_ODR_LOW(GPIOI_PIN7) | \ |
1339 |
PIN_ODR_LOW(GPIOI_PIN8) | \ |
1340 |
PIN_ODR_LOW(GPIOI_PIN9) | \ |
1341 |
PIN_ODR_LOW(GPIOI_PIN10) | \ |
1342 |
PIN_ODR_LOW(GPIOI_PIN11) | \ |
1343 |
PIN_ODR_LOW(GPIOI_PIN12) | \ |
1344 |
PIN_ODR_LOW(GPIOI_PIN13) | \ |
1345 |
PIN_ODR_LOW(GPIOI_PIN14) | \ |
1346 |
PIN_ODR_LOW(GPIOI_PIN15)) |
1347 |
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, STM32F4xx_AF_system) | \
|
1348 |
PIN_AFIO_AF(GPIOI_PIN1, STM32F4xx_AF_system) | \ |
1349 |
PIN_AFIO_AF(GPIOI_PIN2, STM32F4xx_AF_system) | \ |
1350 |
PIN_AFIO_AF(GPIOI_PIN3, STM32F4xx_AF_system) | \ |
1351 |
PIN_AFIO_AF(GPIOI_PIN4, STM32F4xx_AF_system) | \ |
1352 |
PIN_AFIO_AF(GPIOI_PIN5, STM32F4xx_AF_system) | \ |
1353 |
PIN_AFIO_AF(GPIOI_PIN6, STM32F4xx_AF_system) | \ |
1354 |
PIN_AFIO_AF(GPIOI_PIN7, STM32F4xx_AF_system)) |
1355 |
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, STM32F4xx_AF_system) | \
|
1356 |
PIN_AFIO_AF(GPIOI_PIN9, STM32F4xx_AF_system) | \ |
1357 |
PIN_AFIO_AF(GPIOI_PIN10, STM32F4xx_AF_system) | \ |
1358 |
PIN_AFIO_AF(GPIOI_PIN11, STM32F4xx_AF_system) | \ |
1359 |
PIN_AFIO_AF(GPIOI_PIN12, STM32F4xx_AF_system) | \ |
1360 |
PIN_AFIO_AF(GPIOI_PIN13, STM32F4xx_AF_system) | \ |
1361 |
PIN_AFIO_AF(GPIOI_PIN14, STM32F4xx_AF_system) | \ |
1362 |
PIN_AFIO_AF(GPIOI_PIN15, STM32F4xx_AF_system)) |
1363 |
|
1364 |
#if !defined(_FROM_ASM_)
|
1365 |
#ifdef __cplusplus
|
1366 |
extern "C" { |
1367 |
#endif
|
1368 |
void boardInit(void); |
1369 |
#ifdef __cplusplus
|
1370 |
} |
1371 |
#endif
|
1372 |
#endif /* _FROM_ASM_ */ |
1373 |
|
1374 |
#endif /* _BOARD_H_ */ |