amiro-os / modules / NUCLEO-L476RG / board.c @ 34c85f04
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1 | 27d0378b | Simon Welzel | /*
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2 | 0f60c8ad | Thomas Schöpping | AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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3 | 96621a83 | Thomas Schöpping | Copyright (C) 2016..2020 Thomas Schöpping et al.
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4 | 27d0378b | Simon Welzel | |
5 | 0f60c8ad | Thomas Schöpping | This program is free software: you can redistribute it and/or modify
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6 | it under the terms of the GNU General Public License as published by
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7 | the Free Software Foundation, either version 3 of the License, or
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8 | (at your option) any later version.
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9 | 27d0378b | Simon Welzel | |
10 | 0f60c8ad | Thomas Schöpping | This program is distributed in the hope that it will be useful,
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11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 | GNU General Public License for more details.
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14 | 27d0378b | Simon Welzel | |
15 | 0f60c8ad | Thomas Schöpping | You should have received a copy of the GNU General Public License
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16 | along with this program. If not, see <http://www.gnu.org/licenses/>.
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17 | 27d0378b | Simon Welzel | */
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18 | |||
19 | #include "hal.h" |
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20 | #include "stm32_gpio.h" |
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21 | |||
22 | /*===========================================================================*/
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23 | /* Driver local definitions. */
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24 | /*===========================================================================*/
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25 | |||
26 | /*===========================================================================*/
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27 | /* Driver exported variables. */
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28 | /*===========================================================================*/
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29 | |||
30 | /*===========================================================================*/
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31 | /* Driver local variables and types. */
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32 | /*===========================================================================*/
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33 | |||
34 | /**
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35 | * @brief Type of STM32 GPIO port setup.
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36 | */
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37 | typedef struct { |
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38 | uint32_t moder; |
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39 | uint32_t otyper; |
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40 | uint32_t ospeedr; |
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41 | uint32_t pupdr; |
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42 | uint32_t odr; |
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43 | uint32_t afrl; |
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44 | uint32_t afrh; |
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45 | uint32_t ascr; |
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46 | uint32_t lockr; |
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47 | } gpio_setup_t; |
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48 | |||
49 | /**
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50 | * @brief Type of STM32 GPIO initialization data.
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51 | */
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52 | typedef struct { |
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53 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__)
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54 | gpio_setup_t PAData; |
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55 | #endif
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56 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__)
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57 | gpio_setup_t PBData; |
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58 | #endif
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59 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__)
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60 | gpio_setup_t PCData; |
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61 | #endif
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62 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__)
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63 | gpio_setup_t PDData; |
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64 | #endif
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65 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__)
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66 | gpio_setup_t PEData; |
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67 | #endif
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68 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__)
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69 | gpio_setup_t PFData; |
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70 | #endif
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71 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__)
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72 | gpio_setup_t PGData; |
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73 | #endif
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74 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__)
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75 | gpio_setup_t PHData; |
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76 | #endif
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77 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__)
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78 | gpio_setup_t PIData; |
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79 | #endif
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80 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
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81 | gpio_setup_t PJData; |
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82 | #endif
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83 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__)
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84 | gpio_setup_t PKData; |
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85 | #endif
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86 | } gpio_config_t; |
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87 | |||
88 | /**
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89 | * @brief STM32 GPIO static initialization data.
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90 | */
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91 | static const gpio_config_t gpio_default_config = { |
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92 | #if STM32_HAS_GPIOA
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93 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, |
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94 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_ASCR, |
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95 | VAL_GPIOA_LOCKR}, |
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96 | #endif
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97 | #if STM32_HAS_GPIOB
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98 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, |
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99 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_ASCR, |
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100 | VAL_GPIOB_LOCKR}, |
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101 | #endif
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102 | #if STM32_HAS_GPIOC
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103 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, |
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104 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_ASCR, |
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105 | VAL_GPIOC_LOCKR}, |
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106 | #endif
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107 | #if STM32_HAS_GPIOD
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108 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, |
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109 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_ASCR, |
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110 | VAL_GPIOD_LOCKR}, |
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111 | #endif
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112 | #if STM32_HAS_GPIOE
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113 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, |
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114 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_ASCR, |
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115 | VAL_GPIOE_LOCKR}, |
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116 | #endif
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117 | #if STM32_HAS_GPIOF
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118 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, |
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119 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_ASCR, |
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120 | VAL_GPIOF_LOCKR}, |
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121 | #endif
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122 | #if STM32_HAS_GPIOG
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123 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, |
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124 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_ASCR, |
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125 | VAL_GPIOG_LOCKR}, |
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126 | #endif
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127 | #if STM32_HAS_GPIOH
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128 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, |
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129 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_ASCR, |
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130 | VAL_GPIOH_LOCKR}, |
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131 | #endif
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132 | #if STM32_HAS_GPIOI
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133 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, |
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134 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_ASCR, |
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135 | VAL_GPIOI_LOCKR}, |
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136 | #endif
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137 | #if STM32_HAS_GPIOJ
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138 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, |
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139 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_ASCR, |
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140 | VAL_GPIOJ_LOCKR}, |
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141 | #endif
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142 | #if STM32_HAS_GPIOK
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143 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, |
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144 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_ASCR, |
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145 | VAL_GPIOK_LOCKR} |
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146 | #endif
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147 | }; |
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148 | |||
149 | /*===========================================================================*/
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150 | /* Driver local functions. */
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151 | /*===========================================================================*/
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152 | |||
153 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { |
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154 | |||
155 | gpiop->OTYPER = config->otyper; |
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156 | gpiop->ASCR = config->ascr; |
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157 | gpiop->OSPEEDR = config->ospeedr; |
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158 | gpiop->PUPDR = config->pupdr; |
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159 | gpiop->ODR = config->odr; |
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160 | gpiop->AFRL = config->afrl; |
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161 | gpiop->AFRH = config->afrh; |
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162 | gpiop->MODER = config->moder; |
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163 | gpiop->LOCKR = config->lockr; |
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164 | } |
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165 | |||
166 | static void stm32_gpio_init(void) { |
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167 | |||
168 | /* Enabling GPIO-related clocks, the mask comes from the
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169 | registry header file.*/
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170 | rccResetAHB2(STM32_GPIO_EN_MASK); |
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171 | rccEnableAHB2(STM32_GPIO_EN_MASK, true);
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172 | |||
173 | /* Initializing all the defined GPIO ports.*/
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174 | #if STM32_HAS_GPIOA
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175 | gpio_init(GPIOA, &gpio_default_config.PAData); |
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176 | #endif
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177 | #if STM32_HAS_GPIOB
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178 | gpio_init(GPIOB, &gpio_default_config.PBData); |
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179 | #endif
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180 | #if STM32_HAS_GPIOC
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181 | gpio_init(GPIOC, &gpio_default_config.PCData); |
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182 | #endif
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183 | #if STM32_HAS_GPIOD
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184 | gpio_init(GPIOD, &gpio_default_config.PDData); |
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185 | #endif
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186 | #if STM32_HAS_GPIOE
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187 | gpio_init(GPIOE, &gpio_default_config.PEData); |
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188 | #endif
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189 | #if STM32_HAS_GPIOF
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190 | gpio_init(GPIOF, &gpio_default_config.PFData); |
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191 | #endif
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192 | #if STM32_HAS_GPIOG
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193 | gpio_init(GPIOG, &gpio_default_config.PGData); |
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194 | #endif
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195 | #if STM32_HAS_GPIOH
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196 | gpio_init(GPIOH, &gpio_default_config.PHData); |
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197 | #endif
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198 | #if STM32_HAS_GPIOI
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199 | gpio_init(GPIOI, &gpio_default_config.PIData); |
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200 | #endif
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201 | #if STM32_HAS_GPIOJ
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202 | gpio_init(GPIOJ, &gpio_default_config.PJData); |
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203 | #endif
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204 | #if STM32_HAS_GPIOK
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205 | gpio_init(GPIOK, &gpio_default_config.PKData); |
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206 | #endif
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207 | } |
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208 | |||
209 | /*===========================================================================*/
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210 | /* Driver interrupt handlers. */
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211 | /*===========================================================================*/
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212 | |||
213 | /*===========================================================================*/
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214 | /* Driver exported functions. */
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215 | /*===========================================================================*/
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216 | |||
217 | /**
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218 | * @brief Early initialization code.
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219 | * @details GPIO ports and system clocks are initialized before everything
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220 | * else.
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221 | */
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222 | void __early_init(void) { |
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223 | |||
224 | stm32_gpio_init(); |
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225 | stm32_clock_init(); |
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226 | } |
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227 | |||
228 | #if HAL_USE_SDC || defined(__DOXYGEN__)
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229 | /**
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230 | * @brief SDC card detection.
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231 | */
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232 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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233 | |||
234 | (void)sdcp;
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235 | /* TODO: Fill the implementation.*/
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236 | return true; |
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237 | } |
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238 | |||
239 | /**
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240 | * @brief SDC card write protection detection.
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241 | */
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242 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
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243 | |||
244 | (void)sdcp;
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245 | /* TODO: Fill the implementation.*/
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246 | return false; |
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247 | } |
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248 | #endif /* HAL_USE_SDC */ |
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249 | |||
250 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
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251 | /**
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252 | * @brief MMC_SPI card detection.
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253 | */
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254 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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255 | |||
256 | (void)mmcp;
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257 | /* TODO: Fill the implementation.*/
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258 | return true; |
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259 | } |
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260 | |||
261 | /**
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262 | * @brief MMC_SPI card write protection detection.
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263 | */
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264 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
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265 | |||
266 | (void)mmcp;
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267 | /* TODO: Fill the implementation.*/
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268 | return false; |
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269 | } |
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270 | #endif
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271 | |||
272 | /**
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273 | * @brief Board-specific initialization code.
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274 | * @todo Add your board-specific code, if any.
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275 | */
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276 | void boardInit(void) { |
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277 | |||
278 | } |