Revision 37bacabf modules/DiWheelDrive_1-1/board.h
modules/DiWheelDrive_1-1/board.h | ||
---|---|---|
17 | 17 |
*/ |
18 | 18 |
|
19 | 19 |
/** |
20 |
* @file
|
|
20 |
* @file |
|
21 | 21 |
* @brief DiWheeDrive v1.1 Board specific macros. |
22 | 22 |
* |
23 | 23 |
* @addtogroup diwheeldrive_board |
... | ... | |
252 | 252 |
#define PIN_CR(pin, mode, cnf) (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U)) |
253 | 253 |
#define PIN_ODR_LOW(n) (0U << (n)) |
254 | 254 |
#define PIN_ODR_HIGH(n) (1U << (n)) |
255 |
#define PIN_IGNORE(n) (1U << (n)) |
|
255 | 256 |
|
256 | 257 |
/* |
257 | 258 |
* GPIOA setup: |
... | ... | |
273 | 274 |
* PA14 - SWCLK (input pullup) |
274 | 275 |
* PA15 - DRIVE_PWM2B (alternate pushpull 50MHz) |
275 | 276 |
*/ |
277 |
#define VAL_GPIOAIGN (PIN_IGNORE(GPIOA_LED)) & 0 |
|
276 | 278 |
#define VAL_GPIOACRL (PIN_CR(GPIOA_WKUP, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
277 | 279 |
PIN_CR(GPIOA_LED, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) | \ |
278 | 280 |
PIN_CR(GPIOA_DRIVE_PWM1A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \ |
... | ... | |
326 | 328 |
* PB14 - SYS_UART_UP (output opendrain high 50MHz) |
327 | 329 |
* PB15 - ACCEL_INT_N (input pullup) |
328 | 330 |
*/ |
331 |
#define VAL_GPIOBIGN (PIN_IGNORE(GPIOB_SYS_UART_UP)) & 0 |
|
329 | 332 |
#define VAL_GPIOBCRL (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
330 | 333 |
PIN_CR(GPIOB_DRIVE_SENSE2, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) | \ |
331 | 334 |
PIN_CR(GPIOB_POWER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) | \ |
... | ... | |
379 | 382 |
* PC14 - GYRO_SS_N (output pushpull high 50MHz) |
380 | 383 |
* PC15 - PIN15 (input floating) |
381 | 384 |
*/ |
385 |
#define VAL_GPIOCIGN (PIN_IGNORE(GPIOC_SYS_INT_N) | \ |
|
386 |
PIN_IGNORE(GPIOC_SYS_PD_N)) & 0 |
|
382 | 387 |
#define VAL_GPIOCCRL (PIN_CR(GPIOC_DRIVE_SENSE1, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) | \ |
383 |
PIN_CR(GPIOC_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) | \
|
|
388 |
PIN_CR(GPIOC_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) | \ |
|
384 | 389 |
PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
385 | 390 |
PIN_CR(GPIOC_PATH_DCSTAT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
386 | 391 |
PIN_CR(GPIOC_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
... | ... | |
432 | 437 |
* PD14 - PIN14 (input floating) |
433 | 438 |
* PD15 - PIN15 (input floating) |
434 | 439 |
*/ |
440 |
#define VAL_GPIODIGN 0 |
|
435 | 441 |
#define VAL_GPIODCRL (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
436 | 442 |
PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
437 | 443 |
PIN_CR(GPIOD_SYS_WARMRST_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) | \ |
... | ... | |
485 | 491 |
* PE14 - PIN14 (input floating) |
486 | 492 |
* PE15 - PIN15 (input floating) |
487 | 493 |
*/ |
494 |
#define VAL_GPIOEIGN 0 |
|
488 | 495 |
#define VAL_GPIOECRL (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
489 | 496 |
PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
490 | 497 |
PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
... | ... | |
538 | 545 |
* PF14 - PIN14 (input floating) |
539 | 546 |
* PF15 - PIN15 (input floating) |
540 | 547 |
*/ |
548 |
#define VAL_GPIOFIGN 0 |
|
541 | 549 |
#define VAL_GPIOFCRL (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
542 | 550 |
PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
543 | 551 |
PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
... | ... | |
591 | 599 |
* PG14 - PIN14 (input floating) |
592 | 600 |
* PG15 - PIN15 (input floating) |
593 | 601 |
*/ |
602 |
#define VAL_GPIOGIGN 0 |
|
594 | 603 |
#define VAL_GPIOGCRL (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
595 | 604 |
PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
596 | 605 |
PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
Also available in: Unified diff