Revision 542939ea

View differences:

modules/DiWheelDrive_1-1/board.h
322 322
 * PB9  - COMPASS_SDA               (alternate opendrain 50MHz)
323 323
 * PB10 - IR_SCL                    (alternate opendrain 50MHz)
324 324
 * PB11 - IR_SDA                    (alternate opendrain 50MHz)
325
 * PB12 - IR_INT                    (input pullup)
325
 * PB12 - IR_INT                    (input floating)
326 326
 * PB13 - GYRO_DRDY                 (input pullup)
327 327
 * PB14 - SYS_UART_UP               (output opendrain high 50MHz)
328 328
 * PB15 - ACCEL_INT_N               (input pullup)
periphery-lld/periphAL.h
210 210
#define APAL2CH_EDGE(edge)                                            \
211 211
  ((edge == APAL_GPIO_EDGE_RISING) ? PAL_EVENT_MODE_RISING_EDGE :     \
212 212
    (edge == APAL_GPIO_EDGE_FALLING) ? PAL_EVENT_MODE_FALLING_EDGE :  \
213
     (edge == APAL_GPIO_EDGE_BOTH) ? PAL_EVENT_MODE_BOTH_EDGES : 0)
213
     (edge == APAL_GPIO_EDGE_BOTH) ? PAL_EVENT_MODE_BOTH_EDGES :      \
214
      PAL_EVENT_MODE_DISABLED)
214 215

  
215 216
#endif /* (HAL_USE_PAL == TRUE) */
216 217

  
unittests/periphery-lld/src/ut_alld_VCNL4020_v1.c
79 79
  status |= vcnl4020_lld_writereg(((ut_vcnl4020data_t*)(ut->data))->vcnld, VCNL4020_LLD_REGADDR_CMD, (VCNL4020_LLD_CMDREG_ALSEN | VCNL4020_LLD_CMDREG_PROXEN | VCNL4020_LLD_CMDREG_SELFTIMED), ((ut_vcnl4020data_t*)(ut->data))->timeout);
80 80
  status |= vcnl4020_lld_readreg(((ut_vcnl4020data_t*)(ut->data))->vcnld, VCNL4020_LLD_REGADDR_CMD, &reg_8[0], ((ut_vcnl4020data_t*)(ut->data))->timeout);
81 81
  status |= (reg_8[0] & (VCNL4020_LLD_CMDREG_ALSEN | VCNL4020_LLD_CMDREG_PROXEN | VCNL4020_LLD_CMDREG_SELFTIMED)) ? 0x0000 : 0x0200;
82

  
83 82
  if (status == APAL_STATUS_OK || status == APAL_STATUS_WARNING) {
84 83
    aosUtPassed(stream, &result);
85 84
  } else {

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