amiro-os / modules / NUCLEO-F103RB / board.h @ 55a84503
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1 | f4da707a | Thomas Schöpping | /*
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2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License");
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5 | you may not use this file except in compliance with the License.
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6 | You may obtain a copy of the License at
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7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0
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9 | |||
10 | Unless required by applicable law or agreed to in writing, software
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11 | distributed under the License is distributed on an "AS IS" BASIS,
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12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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13 | See the License for the specific language governing permissions and
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14 | limitations under the License.
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15 | */
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16 | |||
17 | 6ff06bbf | Thomas Schöpping | #ifndef BOARD_H
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18 | #define BOARD_H
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19 | f4da707a | Thomas Schöpping | |
20 | /*
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21 | * Setup for the ST NUCLEO64-F103RB board.
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22 | */
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23 | |||
24 | /*
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25 | * Board identifier.
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26 | */
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27 | #define BOARD_ST_NUCLEO64_F103RB
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28 | #define BOARD_NAME "STMicroelectronics NUCLEO-F103RB" |
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29 | |||
30 | /*
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31 | * Board frequencies.
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32 | */
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33 | #define STM32_LSECLK 0 |
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34 | |||
35 | #if defined(NUCLEO_EXTERNAL_OSCILLATOR)
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36 | #define STM32_HSECLK 8000000 |
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37 | #define STM32_HSE_BYPASS
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38 | |||
39 | #elif defined(NUCLEO_HSE_CRYSTAL)
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40 | #define STM32_HSECLK 8000000 |
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41 | |||
42 | #else
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43 | #define STM32_HSECLK 0 |
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44 | #endif
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45 | |||
46 | /*
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47 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
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48 | */
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49 | #define STM32F103xB
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50 | |||
51 | /*
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52 | * IO pins assignments.
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53 | */
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54 | #define GPIOA_ARD_A0 0U |
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55 | #define GPIOA_ADC1_IN0 0U |
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56 | #define GPIOA_ARD_A1 1U |
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57 | #define GPIOA_ADC1_IN1 1U |
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58 | #define GPIOA_ARD_D1 2U |
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59 | #define GPIOA_USART2_TX 2U |
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60 | #define GPIOA_ARD_D0 3U |
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61 | #define GPIOA_USART2_RX 3U |
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62 | #define GPIOA_ARD_A2 4U |
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63 | #define GPIOA_ADC1_IN4 4U |
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64 | #define GPIOA_LED_GREEN 5U |
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65 | #define GPIOA_ARD_D13 5U |
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66 | #define GPIOA_ARD_D12 6U |
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67 | #define GPIOA_ARD_D11 7U |
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68 | #define GPIOA_ARD_D7 8U |
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69 | #define GPIOA_ARD_D8 9U |
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70 | #define GPIOA_ARD_D2 10U |
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71 | #define GPIOA_PIN11 11U |
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72 | #define GPIOA_PIN12 12U |
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73 | #define GPIOA_SWDIO 13U |
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74 | #define GPIOA_SWCLK 14U |
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75 | #define GPIOA_PIN15 15U |
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76 | |||
77 | #define GPIOB_ARD_A3 0U |
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78 | #define GPIOB_ADC1_IN8 0U |
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79 | #define GPIOB_PIN1 1U |
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80 | #define GPIOB_PIN2 2U |
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81 | #define GPIOB_SWO 3U |
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82 | #define GPIOB_ARD_D3 3U |
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83 | #define GPIOB_ARD_D5 4U |
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84 | #define GPIOB_ARD_D4 5U |
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85 | #define GPIOB_ARD_D10 6U |
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86 | #define GPIOB_PIN7 7U |
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87 | #define GPIOB_ARD_D15 8U |
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88 | #define GPIOB_ARD_D14 9U |
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89 | #define GPIOB_ARD_D6 10U |
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90 | #define GPIOB_PIN11 11U |
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91 | #define GPIOB_PIN12 12U |
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92 | #define GPIOB_PIN13 13U |
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93 | #define GPIOB_PIN14 14U |
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94 | #define GPIOB_PIN15 15U |
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95 | |||
96 | #define GPIOC_ARD_A5 0U |
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97 | #define GPIOC_ADC1_IN11 0U |
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98 | #define GPIOC_ARD_A4 1U |
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99 | #define GPIOC_ADC1_IN10 1U |
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100 | #define GPIOC_PIN2 2U |
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101 | #define GPIOC_PIN3 3U |
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102 | #define GPIOC_PIN4 4U |
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103 | #define GPIOC_PIN5 5U |
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104 | #define GPIOC_PIN6 6U |
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105 | #define GPIOC_ARD_D9 7U |
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106 | #define GPIOC_PIN8 8U |
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107 | #define GPIOC_PIN9 9U |
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108 | #define GPIOC_PIN10 10U |
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109 | #define GPIOC_PIN11 11U |
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110 | #define GPIOC_PIN12 12U |
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111 | #define GPIOC_BUTTON 13U |
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112 | #define GPIOC_PIN14 14U |
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113 | #define GPIOC_PIN15 15U |
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114 | |||
115 | #define GPIOD_OSC_IN 0U |
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116 | #define GPIOD_PIN0 0U |
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117 | #define GPIOD_OSC_OUT 1U |
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118 | #define GPIOD_PIN1 1U |
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119 | #define GPIOD_PIN2 2U |
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120 | #define GPIOD_PIN3 3U |
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121 | #define GPIOD_PIN4 4U |
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122 | #define GPIOD_PIN5 5U |
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123 | #define GPIOD_PIN6 6U |
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124 | #define GPIOD_PIN7 7U |
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125 | #define GPIOD_PIN8 8U |
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126 | #define GPIOD_PIN9 9U |
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127 | #define GPIOD_PIN10 10U |
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128 | #define GPIOD_PIN11 11U |
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129 | #define GPIOD_PIN12 12U |
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130 | #define GPIOD_PIN13 13U |
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131 | #define GPIOD_PIN14 14U |
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132 | #define GPIOD_PIN15 15U |
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133 | |||
134 | #define GPIOE_PIN0 0U |
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135 | #define GPIOE_PIN1 1U |
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136 | #define GPIOE_PIN2 2U |
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137 | #define GPIOE_PIN3 3U |
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138 | #define GPIOE_PIN4 4U |
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139 | #define GPIOE_PIN5 5U |
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140 | #define GPIOE_PIN6 6U |
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141 | #define GPIOE_PIN7 7U |
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142 | #define GPIOE_PIN8 8U |
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143 | #define GPIOE_PIN9 9U |
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144 | #define GPIOE_PIN10 10U |
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145 | #define GPIOE_PIN11 11U |
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146 | #define GPIOE_PIN12 12U |
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147 | #define GPIOE_PIN13 13U |
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148 | #define GPIOE_PIN14 14U |
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149 | #define GPIOE_PIN15 15U |
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150 | |||
151 | #define GPIOF_PIN0 0U |
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152 | #define GPIOF_PIN1 1U |
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153 | #define GPIOF_PIN2 2U |
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154 | #define GPIOF_PIN3 3U |
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155 | #define GPIOF_PIN4 4U |
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156 | #define GPIOF_PIN5 5U |
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157 | #define GPIOF_PIN6 6U |
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158 | #define GPIOF_PIN7 7U |
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159 | #define GPIOF_PIN8 8U |
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160 | #define GPIOF_PIN9 9U |
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161 | #define GPIOF_PIN10 10U |
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162 | #define GPIOF_PIN11 11U |
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163 | #define GPIOF_PIN12 12U |
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164 | #define GPIOF_PIN13 13U |
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165 | #define GPIOF_PIN14 14U |
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166 | #define GPIOF_PIN15 15U |
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167 | /*
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168 | * I/O ports initial setup, this configuration is established soon after reset
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169 | * in the initialization code.
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170 | *
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171 | * The digits have the following meaning:
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172 | * 0 - Analog input.
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173 | * 1 - Push Pull output 10MHz.
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174 | * 2 - Push Pull output 2MHz.
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175 | * 3 - Push Pull output 50MHz.
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176 | * 4 - Digital input.
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177 | * 5 - Open Drain output 10MHz.
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178 | * 6 - Open Drain output 2MHz.
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179 | * 7 - Open Drain output 50MHz.
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180 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR.
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181 | * 9 - Alternate Push Pull output 10MHz.
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182 | * A - Alternate Push Pull output 2MHz.
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183 | * B - Alternate Push Pull output 50MHz.
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184 | * C - Reserved.
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185 | * D - Alternate Open Drain output 10MHz.
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186 | * E - Alternate Open Drain output 2MHz.
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187 | * F - Alternate Open Drain output 50MHz.
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188 | * Please refer to the STM32 Reference Manual for details.
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189 | */
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190 | |||
191 | /*
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192 | * Port A setup.
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193 | * Everything input with pull-up except:
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194 | * PA2 - Alternate output (GPIOA_ARD_D1, GPIOA_USART2_TX).
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195 | * PA3 - Normal input (GPIOA_ARD_D0, GPIOA_USART2_RX).
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196 | * PA5 - Push Pull output (GPIOA_LED_GREEN).
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197 | * PA13 - Pull-up input (GPIOA_SWDIO).
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198 | * PA14 - Pull-down input (GPIOA_SWCLK).
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199 | */
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200 | #define VAL_GPIOACRL 0x88384B88 /* PA7...PA0 */ |
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201 | #define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */ |
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202 | #define VAL_GPIOAODR 0xFFFFBFDF |
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203 | |||
204 | /*
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205 | * Port B setup.
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206 | * Everything input with pull-up except:
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207 | * PB3 - Pull-up input (GPIOA_SWO).
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208 | */
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209 | #define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */ |
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210 | #define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */ |
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211 | #define VAL_GPIOBODR 0xFFFFFFFF |
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212 | |||
213 | /*
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214 | * Port C setup.
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215 | * Everything input with pull-up except:
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216 | * PC13 - Normal input (GPIOC_BUTTON).
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217 | */
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218 | #define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ |
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219 | #define VAL_GPIOCCRH 0x88488888 /* PC15...PC8 */ |
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220 | #define VAL_GPIOCODR 0xFFFFFFFF |
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221 | |||
222 | /*
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223 | * Port D setup.
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224 | * Everything input with pull-up except:
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225 | * PD0 - Normal input (GPIOD_OSC_IN).
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226 | * PD1 - Normal input (GPIOD_OSC_OUT).
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227 | */
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228 | #define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ |
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229 | #define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ |
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230 | #define VAL_GPIODODR 0xFFFFFFFF |
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231 | |||
232 | /*
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233 | * Port E setup.
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234 | * Everything input with pull-up except:
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235 | */
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236 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ |
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237 | #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ |
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238 | #define VAL_GPIOEODR 0xFFFFFFFF |
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239 | |||
240 | /*
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241 | * USB bus activation macro, required by the USB driver.
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242 | */
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243 | #define usb_lld_connect_bus(usbp)
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244 | |||
245 | /*
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246 | * USB bus de-activation macro, required by the USB driver.
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247 | */
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248 | #define usb_lld_disconnect_bus(usbp)
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249 | |||
250 | #if !defined(_FROM_ASM_)
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251 | #ifdef __cplusplus
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252 | extern "C" { |
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253 | #endif
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254 | void boardInit(void); |
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255 | #ifdef __cplusplus
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256 | } |
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257 | #endif
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258 | #endif /* _FROM_ASM_ */ |
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259 | |||
260 | 6ff06bbf | Thomas Schöpping | #endif /* BOARD_H */ |