AMiRo-OS

doc

build

.dep

*.tmp

*.backup

# Eclipse files

*eclipse*

# QtCreator files

*.includes

*.files

*.config

*.creator

*.creator.user

# Shadow files

*kate-swp

*~

# Backup files

*backup*

*Backup*

AMiRo-OS is the operating system for the base version of the

Autonomous Mini Robot (AMiRo) [1,2]. It utilizes ChibiOS (a real-time

operating system for embedded devices developed by Giovanni di Sirio;

see <http://chibios.org>) as system kernel and extends it with

platform specific functionalities.

Copyright (C) 2016  Thomas Schöpping et al.

(a complete list of all authors is given below)

This program is free software: you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation, either version 3 of the License, or (at

your option) any later version.

This program is distributed in the hope that it will be useful, but

WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU

General Public License for more details.

You should have received a copy of the GNU General Public License

along with this program.  If not, see <http://www.gnu.org/licenses/>.

The development of this software was supported by the Excellence

Cluster EXC 227 Cognitive Interaction Technology. The Excellence

Cluster EXC 227 is a grant of the Deutsche Forschungsgemeinschaft

(DFG) in the context of the German Excellence Initiative.

Authors:

 - Thomas Schöpping        <tschoepp[at]cit-ec.uni-bielefeld.de>

 - Timo Korthals           <tkorthals[at]cit-ec.uni-bielefeld.de>

 - Stefan Herbechtsmeier   <sherbrec[at]cit-ec.uni-bielefeld.de>

 - Teerapat Chinapirom     <tchinapirom[at]cit-ec.uni-bielefeld.de>

 - Robert Abel

 - Marvin Barther

 - Claas Braun

 - Tristan Kenneweg

References:

 [1] Herbrechtsmeier S., Rückert U., & Sitte J. (2012). "AMiRo -

     Autonomous Mini Robot for Research and Education". In Advances in

     Autonomous Mini Robots (pp. 101-112). Springer Berlin

     Heidelberg.

 [2] Schöpping T., Korthals T., Herbrechtsmeier S., & Rückert U.

     (2015). "AMiRo: A Mini Robot for Scientific Applications" In

     Advances in Computational Intelligence (pp. 199-205). Springer

     International Publishing.

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This file will help you to setup all required software on your system,

compile the source code, and flash it to the AMiRo modules.

=====================================================================

CONTENTS:

 1  Required software

   1.1  gcc-arm-none-eabi

   1.2  ChibiOS

   1.3  AMiRo-BLT

 2  Recommended software

   2.1  gtkterm and hterm

   2.2  QtCreator

 3  Building and flashing

=====================================================================

1 - REQUIRED SOFTWARE

---------------------

In order to compile the source code, you need to install the GCC for

ARM embedded devices. Since AMiRo-OS requires ChibiOS as system

kernel, you need a copy of that project as well. Furthermore, AMiRo-OS

requires a compatible bootloader, such as provided by the AMiRo-BLT

project.

1.1 gcc-arm-none-eabi

Various versions of the GCC for ARM embedded devices can be found at

<https://launchpad.net/gcc-arm-embedded>. It is highly recommended to

use the version 4.8 with update 2014-q1 since some others will cause

issues. For installation of the compiler toolchain, please follow the

instructions that can be found on the web page.

1.2 ChibiOS

Since AMiRo-OS uses ChibiOS as underlying system kernel, you need to

acquire a copy of it as well. First, go to the directory which

contains the AMiRo-OS folder (but do not go into the AMiRo-OS

directory itself!). Now clone the GIT repository of ChibiOS and

checkout version 2.6.x:

  >$ git clone https://github.com/ChibiOS/ChibiOS.git ChibiOS

  >$ cd ChibiOS

  >$ git checkout 2e6dfc7364e7551483922ea6afbaea8f3501ab0e

It is highly recommended to use exactly this commit. Although newer

commits in the 2.6.x branch might work fine, AMiRo-OS is not

compatible with ChibiOS version 3 or newer.

AMiRo-OS comes with some patches to ChibiOS, which must be applied as

well before compiling the project. Therefore you need to copy all

files from the ./patches directory of AMiRo-OS to the root directory

of ChibiOS. You can then apply the patches via the following command:

  >$ for i in `ls | grep patch`; do git am --ignore-space-change --ignore-whitespace < ${i}; done

If the files could not be patched successfully, you are probably using

an incompatible version of ChibiOS (try to checkout the correct commit

as denoted above).

1.3 AMiRo-BLT

AMiRo-BLT is an additional software project, which is developed in

parallel with AMiRo-OS. If you did not receive a copy of AMiRo-BLT

with AMiRo-OS, you can find all code and documentation at

<https://opensource.cit-ec.de/projects/amiro-os>. Instructions for

installation and how to use the software provided by AMiRo-BLT can be

found on the web page or in the project's readme file.

2 - RECOMMENDED SOFTWARE

------------------------

In order to fully use all features of AMiRo-OS it is recommended to

install the 'hterm' or 'gtkterm' application for accessing the robot.

To ease further development, this project offers support for the 

QtCreator IDE.

2.1 - gtkterm and hterm

Depending on your operating system, it is recommended to install

'gtkterm' for Linux (available in the Ubuntu repositories), or 'hterm'

for Windows.

For gtkterm you need to modify the configuration file ~/.gtktermrc (it

is generated automatically when you start the application for the

first time) as follows:

  port	= /dev/ttyUSB0

  speed	= 115200

  bits	= 8

  stopbits	= 1

  parity	= none

  flow	= none

  wait_delay	= 0

  wait_char	= -1

  rs485_rts_time_before_tx	= 30

  rs485_rts_time_after_tx	= 30

  echo	= False

  crlfauto	= True

For hterm you must need to configure the tool analogously.

2.2 - QtCreator

In order to setup QtCreator projects for the three AMiRo base modules,

a script is provided in the directory ./ide/qtcreator/. It is

accompanied by an additional README.txt file, which contains further

information.

3 - BUILDING AND FLASHING

-------------------------

Each time you modify any part of AMiRo-OS, you need to recompile the

whole project for the according AMiRo module. Therefore you have to

use the makefiles provided in ./devices/<DeviceToRecompile>/ by simply

executing 'make' in the according directory. If you want to compile

all modules at once, you can also use the makefile in the ./devices/

folder.

After compilation, you always have to flash the generated program to

the robot. Therefore you need to install the SerialBoot tool provided

by the AMiRo-BLT project. Furthermore the tool must be accessible

globally under the environment variable 'SERIALBOOT'. You can do this

by appending the following line to your ~/.bashrc file:

  export SERIALBOOT=</absolute/path/to/the/SerialBoot/binary>

You can test the tool by calling it via the variable:

  >$ ${SERIALBOOT}

This should print some information about the tool.

Similar to the compilation procedure as described above, you can flash

either each module separately, or all modules at once by executing

'make flash' from the according directory.

Note that you must connect the programming cable either to the

DiWheelDrive or the PowerManagement module for flashing the operating

system. All other modules are powered off after reset so that only

these two offer a bootloader that is required for flashing.

=====================================================================

#include "ch.h"

#include "hal.h"

/**

 * @brief   PAL setup.

 * @details Digital I/O ports static configuration as defined in @p board.h.

 *          This variable is used by the HAL when initializing the PAL driver.

 */

#if HAL_USE_PAL || defined(__DOXYGEN__)

const PALConfig pal_default_config =

{

  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},

  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},

  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},

  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},

  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},

  {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},

  {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},

};

#endif

/*

 * Early initialization code.

 * This initialization must be performed just after stack setup and before

 * any other initialization.

 */

void __early_init(void) {

  stm32_clock_init();

}

/*

 * Board-specific initialization code.

 */

void boardInit(void) {

  /*

   * Several I/O pins are re-mapped:

   *   JTAG disabled and SWJ enabled

   *   TIM2 to the PA15/PB3/PA2/PA3 pins.

   *   TIM3 to PC6/PC7 pins.

   *   USART3 to the PC10/PC11 pins.

   *   I2C1 to the PB8/PB9 pins.

   */

  AFIO->MAPR = AFIO_MAPR_SWJ_CFG_DISABLE |

               AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 |

               AFIO_MAPR_TIM3_REMAP_FULLREMAP |

               AFIO_MAPR_USART3_REMAP_PARTIALREMAP |

               AFIO_MAPR_I2C1_REMAP;

}

inline void boardWriteIoPower(const uint8_t value)

{

    if (value) {

        // drive pins

        palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_STM32_ALTERNATE_PUSHPULL);

    } else {

        // float pins

        palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_INPUT);

    }

}

inline void boardWriteLed(int value)

{

    palWritePad(GPIOA, GPIOA_LED, !value);

}

inline void boardRequestShutdown(void)

{

  palClearPad(GPIOC, GPIOC_SYS_PD_N);

}

inline void boardStandby(void)

{

  palSetPad(GPIOC, GPIOC_SYS_PD_N);

  chSysLock();

  // Standby

  // set deepsleep bit

  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;

  // enable wakeup pin

  //PWR->CSR |= PWR_CSR_EWUP;

  // set PDDS, clear WUF, clear SBF

  PWR->CR |= (PWR_CR_CWUF | PWR_CR_PDDS | PWR_CR_CSBF);

  // clear RTC wakeup source flags

  RTC->CRL &= ~(RTC_CRL_ALRF);

  // Wait for Interrupt

  __WFI();

}

inline void boardWakeup(void) {

  palClearPad(GPIOC, GPIOC_SYS_PD_N);

  chThdSleepMicroseconds(10);

  palSetPad(GPIOC, GPIOC_SYS_PD_N);

}

inline void boardClearI2CBus(const uint8_t scl_pad) {

  uint8_t i;

  // configure I²C SCL open drain

  palSetPadMode(GPIOB, scl_pad, PAL_MODE_OUTPUT_OPENDRAIN);

  // perform bus clear as per I²C Specification v5 3.1.16

  for (i = 0x00u; i < 0x09u; i++) {

    palClearPad(GPIOB, scl_pad);

    chThdSleepMicroseconds(5);

    palSetPad(GPIOB, scl_pad);

    chThdSleepMicroseconds(5);

  }

  // reconfigure I²C SCL

  palSetPadMode(GPIOB, scl_pad, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);

}

#ifndef _BOARD_H_

#define _BOARD_H_

/*

 * Setup for AMiRo DiWheelDrive board.

 */

/*

 * Board identifier.

 */

#define BOARD_DI_WHEEL_DRIVE

#define BOARD_NAME              "AMiRo DiWheelDrive"

#define BOARD_VERSION           "1.1"

/*

 * Board frequencies.

 */

#define STM32_LSECLK            0

#define STM32_HSECLK            8000000

/*

 * MCU type as defined in the ST header file stm32f1xx.h.

 */

#define STM32F10X_HD

/*

 * IO pins assignments.

 */

#define GPIOA_WKUP              0

#define GPIOA_LED               1

#define GPIOA_DRIVE_PWM1A       2

#define GPIOA_DRIVE_PWM1B       3

#define GPIOA_MOTION_SCLK       5

#define GPIOA_MOTION_MISO       6

#define GPIOA_MOTION_MOSI       7

#define GPIOA_PROG_RX           9

#define GPIOA_PROG_TX           10

#define GPIOA_CAN_RX            11

#define GPIOA_CAN_TX            12

#define GPIOA_SWDIO             13

#define GPIOA_SWCLK             14

#define GPIOA_DRIVE_PWM2B       15

#define GPIOB_DRIVE_SENSE2      1

#define GPIOB_POWER_EN          2

#define GPIOB_DRIVE_PWM2A       3

#define GPIOB_COMPASS_DRDY      5

#define GPIOB_DRIVE_ENC1A       6

#define GPIOB_DRIVE_ENC1B       7

#define GPIOB_COMPASS_SCL       8

#define GPIOB_COMPASS_SDA       9

#define GPIOB_IR_SCL            10

#define GPIOB_IR_SDA            11

#define GPIOB_IR_INT            12

#define GPIOB_GYRO_DRDY         13

#define GPIOB_SYS_UART_UP       14

#define GPIOB_ACCEL_INT_N       15

#define GPIOC_DRIVE_SENSE1      0

#define GPIOC_SYS_INT_N         1

#define GPIOC_PATH_DCSTAT       3

#define GPIOC_PATH_DCEN         5

#define GPIOC_DRIVE_ENC2B       6

#define GPIOC_DRIVE_ENC2A       7

#define GPIOC_SYS_PD_N          8

#define GPIOC_SYS_REG_EN        9

#define GPIOC_SYS_UART_RX       10

#define GPIOC_SYS_UART_TX       11

#define GPIOC_ACCEL_SS_N        13

#define GPIOC_GYRO_SS_N         14

#define GPIOD_OSC_IN            0

#define GPIOD_OSC_OUT           1

#define GPIOD_SYS_WARMRST_N     2

/*

 * I/O ports initial setup, this configuration is established soon after reset

 * in the initialization code.

 */

#define PIN_MODE_INPUT(n)               (0x4U << (((n) % 8) * 4))

#define PIN_MODE_INPUT_PULLX(n)         (0x8U << (((n) % 8) * 4))

#define PIN_MODE_INPUT_ANALOG(n)        (0x0U << (((n) % 8) * 4))

/* Push Pull output 50MHz */

#define PIN_MODE_OUTPUT_PUSHPULL(n)     (0x3U << (((n) % 8) * 4))

/* Open Drain output 50MHz */

#define PIN_MODE_OUTPUT_OPENDRAIN(n)    (0x7U << (((n) % 8) * 4))

/* Alternate Push Pull output 50MHz */

#define PIN_MODE_ALTERNATE_PUSHPULL(n)  (0xbU << (((n) % 8) * 4))

/* Alternate Open Drain output 50MHz */

#define PIN_MODE_ALTERNATE_OPENDRAIN(n) (0xfU << (((n) % 8) * 4))

/*

 * Port A setup.

 */

#define VAL_GPIOACRL            (PIN_MODE_INPUT(GPIOA_WKUP) | \

                                 PIN_MODE_OUTPUT_OPENDRAIN(GPIOA_LED) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_DRIVE_PWM1A) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_DRIVE_PWM1B) | \

                                 PIN_MODE_INPUT_PULLX(4) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_MOTION_SCLK) | \

                                 PIN_MODE_INPUT_PULLX(GPIOA_MOTION_MISO) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_MOTION_MOSI))

#define VAL_GPIOACRH            (PIN_MODE_INPUT_PULLX(8) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_PROG_RX) | \

                                 PIN_MODE_INPUT_PULLX(GPIOA_PROG_TX) | \

                                 PIN_MODE_INPUT_PULLX(GPIOA_CAN_RX) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_CAN_TX) | \

                                 PIN_MODE_INPUT_PULLX(GPIOA_SWDIO) | \

                                 PIN_MODE_INPUT_PULLX(GPIOA_SWCLK) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_DRIVE_PWM2B))

#define VAL_GPIOAODR            0xF7FF /* prevent power over CAN bug */

/*

 * Port B setup.

 */

#define VAL_GPIOBCRL            (PIN_MODE_INPUT_PULLX(0) | \

                                 PIN_MODE_INPUT_ANALOG(GPIOB_DRIVE_SENSE2) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOB_POWER_EN) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOB_DRIVE_PWM2A) | \

                                 PIN_MODE_INPUT_PULLX(4) | \

                                 PIN_MODE_INPUT_PULLX(GPIOB_COMPASS_DRDY) | \

                                 PIN_MODE_INPUT(GPIOB_DRIVE_ENC1A) | \

                                 PIN_MODE_INPUT(GPIOB_DRIVE_ENC1B))

#define VAL_GPIOBCRH            (PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_COMPASS_SCL) | \

                                 PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_COMPASS_SDA) | \

                                 PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_IR_SCL) | \

                                 PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_IR_SDA) | \

                                 PIN_MODE_INPUT(GPIOB_IR_INT) | \

                                 PIN_MODE_INPUT_PULLX(GPIOB_GYRO_DRDY) | \

                                 PIN_MODE_OUTPUT_OPENDRAIN(GPIOB_SYS_UART_UP) | \

                                 PIN_MODE_INPUT_PULLX(GPIOB_ACCEL_INT_N))

#define VAL_GPIOBODR            0xFFFB /* initially the motors are not powered */

/*

 * Port C setup.

 */

#define VAL_GPIOCCRL            (PIN_MODE_INPUT_ANALOG(GPIOC_DRIVE_SENSE1) | \

                                 PIN_MODE_OUTPUT_OPENDRAIN(GPIOC_SYS_INT_N) | \

                                 PIN_MODE_INPUT_PULLX(2) | \

                                 PIN_MODE_INPUT(GPIOC_PATH_DCSTAT) | \

                                 PIN_MODE_INPUT_PULLX(4) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOC_PATH_DCEN) | \

                                 PIN_MODE_INPUT(GPIOC_DRIVE_ENC2B) | \

                                 PIN_MODE_INPUT(GPIOC_DRIVE_ENC2A))

#define VAL_GPIOCCRH            (PIN_MODE_OUTPUT_OPENDRAIN(GPIOC_SYS_PD_N) | \

                                 PIN_MODE_INPUT(GPIOC_SYS_REG_EN) | \

                                 PIN_MODE_INPUT(GPIOC_SYS_UART_RX) | \

                                 PIN_MODE_INPUT(GPIOC_SYS_UART_TX) | \

                                 PIN_MODE_INPUT_PULLX(12) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOC_ACCEL_SS_N) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOC_GYRO_SS_N) | \

                                 PIN_MODE_INPUT_PULLX(15))

#define VAL_GPIOCODR            0xFFDD /* initially charging via the pins is disabled and SYSNIN_N indicates that the OS is busy */

/*

 * Port D setup.

 */

#define VAL_GPIODCRL            (PIN_MODE_INPUT(GPIOD_OSC_IN) | \

                                 PIN_MODE_INPUT(GPIOD_OSC_OUT) | \

                                 PIN_MODE_OUTPUT_OPENDRAIN(GPIOD_SYS_WARMRST_N) | \

                                 PIN_MODE_INPUT_PULLX(3) | \

                                 PIN_MODE_INPUT_PULLX(4) | \

                                 PIN_MODE_INPUT_PULLX(5) | \

                                 PIN_MODE_INPUT_PULLX(6) | \

                                 PIN_MODE_INPUT_PULLX(7))

#define VAL_GPIODCRH            0x88888888

#define VAL_GPIODODR            0xFFFF

/*

 * Port E setup.

 */

#define VAL_GPIOECRL            0x88888888 /*  PE7...PE0 */

#define VAL_GPIOECRH            0x88888888 /* PE15...PE8 */

#define VAL_GPIOEODR            0xFFFF

/*

 * Port F setup.

 */

#define VAL_GPIOFCRL            0x88888888 /*  PF7...PF0 */

#define VAL_GPIOFCRH            0x88888888 /* PF15...PF8 */

#define VAL_GPIOFODR            0xFFFF

/*

 * Port G setup.

 */

#define VAL_GPIOGCRL            0x88888888 /*  PG7...PG0 */

#define VAL_GPIOGCRH            0x88888888 /* PG15...PG8 */

#define VAL_GPIOGODR            0xFFFF

#if !defined(_FROM_ASM_)

#ifdef __cplusplus

extern "C" {

#endif

  void boardInit(void);

  void boardWriteIoPower(const uint8_t value);

  void boardWriteLed(int value);

  void boardRequestShutdown(void);

  void boardStandby(void);

  void boardWakeup(void);

  void boardClearI2CBus(const uint8_t scl_pad);

#ifdef __cplusplus

}

#endif

#endif /* _FROM_ASM_ */

#endif /* _BOARD_H_ */

# List of all the board related files.

BOARDSRC = ${AMIRO}/boards/DiWheelDrive/board.c

# Required include directories

BOARDINC = ${AMIRO}/boards/DiWheelDrive

# Required linker directory

BOARDLD = ${AMIRO}/ports

#include "ch.h"

#include "hal.h"

/**

 * @brief   PAL setup.

 * @details Digital I/O ports static configuration as defined in @p board.h.

 *          This variable is used by the HAL when initializing the PAL driver.

 */

#if HAL_USE_PAL || defined(__DOXYGEN__)

const PALConfig pal_default_config =

{

  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},

  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},

  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},

  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},

  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},

  {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},

  {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},

};

#endif

/*

 * Early initialization code.

 * This initialization must be performed just after stack setup and before

 * any other initialization.

 */

void __early_init(void) {

  stm32_clock_init();

}

/*

 * Board-specific initialization code.

 */

void boardInit(void) {

  /*

   * Several I/O pins are re-mapped:

   *   JTAG disabled and SWD enabled

   */

  AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE |

               AFIO_MAPR_USART3_REMAP_PARTIALREMAP;

}

inline void boardRequestShutdown(void)

{

  palClearPad(GPIOC, GPIOC_SYS_PD_N);

}

inline void boardStandby(void)

{

  palSetPad(GPIOC, GPIOC_SYS_PD_N);

  chSysLock();

  // Standby

  // set deepsleep bit

  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;

  // set PDDS, clear WUF, clear SBF

  PWR->CR |= (PWR_CR_CWUF | PWR_CR_PDDS | PWR_CR_CSBF);

  // clear RTC wakeup source flags

  RTC->CRL &= ~(RTC_CRL_ALRF);

  // Wait for Interrupt

  __WFI();

}

inline void boardClearI2CBus(const uint8_t scl_pad) {

  uint8_t i;

  // configure I²C SCL open drain

  palSetPadMode(GPIOB, scl_pad, PAL_MODE_OUTPUT_OPENDRAIN);

  // perform bus clear as per I²C Specification v5 3.1.16

  for (i = 0x00u; i < 0x09u; i++) {

    palClearPad(GPIOB, scl_pad);

    chThdSleepMicroseconds(5);

    palSetPad(GPIOB, scl_pad);

    chThdSleepMicroseconds(5);

  }

  // reconfigure I²C SCL

  palSetPadMode(GPIOB, scl_pad, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);

}

#ifndef _BOARD_H_

#define _BOARD_H_

/*

 * Setup for AMiRo LightRing board.

 */

/*

 * Board identifier.

 */

#define BOARD_LIGHT_RING

#define BOARD_NAME              "AMiRo LightRing"

#define BOARD_VERSION           "1.0"

/*

 * Board frequencies.

 */

#define STM32_LSECLK            0

#define STM32_HSECLK            8000000

/*

 * MCU type as defined in the ST header file stm32f1xx.h.

 */

#define STM32F10X_HD

/*

 * IO pins assignments.

 */

#define GPIOA_LASER_RX          2

#define GPIOA_LASER_TX          3

#define GPIOA_LIGHT_BLANK       4

#define GPIOA_LIGHT_SCLK        5

#define GPIOA_LIGHT_MOSI        7

#define GPIOA_PROG_RX           9

#define GPIOA_PROG_TX           10

#define GPIOA_CAN_RX            11

#define GPIOA_CAN_TX            12

#define GPIOB_LASER_EN          2

#define GPIOB_LASER_OC_N        5

#define GPIOB_SYS_UART_DN       6

#define GPIOB_WL_GDO2           8

#define GPIOB_WL_GDO0           9

#define GPIOB_MEM_SCL           10

#define GPIOB_MEM_SDA           11

#define GPIOB_WL_SS_N           12

#define GPIOB_WL_SCLK           13

#define GPIOB_WL_MISO           14

#define GPIOB_WL_MOSI           15

#define GPIOC_LIGHT_XLAT        4

#define GPIOC_SYS_UART_RX       10

#define GPIOC_SYS_UART_TX       11

#define GPIOC_SYS_PD_N          14

#define GPIOD_OSC_IN            0

#define GPIOD_OSC_OUT           1

#define GPIOD_SYS_INT_N         2

/*

 * I/O ports initial setup, this configuration is established soon after reset

 * in the initialization code.

 */

#define PIN_MODE_INPUT(n)               (0x4U << (((n) % 8) * 4))

#define PIN_MODE_INPUT_PULLX(n)         (0x8U << (((n) % 8) * 4))

#define PIN_MODE_INPUT_ANALOG(n)        (0x0U << (((n) % 8) * 4))

/* Push Pull output 50MHz */

#define PIN_MODE_OUTPUT_PUSHPULL(n)     (0x3U << (((n) % 8) * 4))

/* Open Drain output 50MHz */

#define PIN_MODE_OUTPUT_OPENDRAIN(n)    (0x7U << (((n) % 8) * 4))

/* Alternate Push Pull output 50MHz */

#define PIN_MODE_ALTERNATE_PUSHPULL(n)  (0xbU << (((n) % 8) * 4))

/* Alternate Open Drain output 50MHz */

#define PIN_MODE_ALTERNATE_OPENDRAIN(n) (0xfU << (((n) % 8) * 4))

/*

 * Port A setup.

 */

#define VAL_GPIOACRL            (PIN_MODE_INPUT_PULLX(0) | \

                                 PIN_MODE_INPUT_PULLX(1) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_LASER_RX) | \

                                 PIN_MODE_INPUT_PULLX(GPIOA_LASER_TX) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOA_LIGHT_BLANK) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_LIGHT_SCLK) | \

                                 PIN_MODE_INPUT_PULLX(6) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_LIGHT_MOSI))

#define VAL_GPIOACRH            (PIN_MODE_INPUT_PULLX(8) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_PROG_RX) | \

                                 PIN_MODE_INPUT_PULLX(GPIOA_PROG_TX) | \

                                 PIN_MODE_INPUT(GPIOA_CAN_RX) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_CAN_TX) | \

                                 PIN_MODE_INPUT_PULLX(13) | \

                                 PIN_MODE_INPUT_PULLX(14) | \

                                 PIN_MODE_INPUT_PULLX(15))

#define VAL_GPIOAODR            0xFFFF

/*

 * Port B setup.

 */

#define VAL_GPIOBCRL            (PIN_MODE_INPUT_PULLX(0) | \

                                 PIN_MODE_INPUT_PULLX(1) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOB_LASER_EN) | \

                                 PIN_MODE_INPUT_PULLX(3) | \

                                 PIN_MODE_INPUT_PULLX(4) | \

                                 PIN_MODE_INPUT(GPIOB_LASER_OC_N) | \

                                 PIN_MODE_OUTPUT_OPENDRAIN(GPIOB_SYS_UART_DN) | \

                                 PIN_MODE_INPUT_PULLX(7))

#define VAL_GPIOBCRH            (PIN_MODE_INPUT_PULLX(GPIOB_WL_GDO2) | \

                                 PIN_MODE_INPUT_PULLX(GPIOB_WL_GDO0) | \

                                 PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_MEM_SCL) | \

                                 PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_MEM_SDA) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOB_WL_SS_N) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOB_WL_SCLK) | \

                                 PIN_MODE_INPUT(GPIOB_WL_MISO) | \

                                 PIN_MODE_ALTERNATE_PUSHPULL(GPIOB_WL_MOSI))

#define VAL_GPIOBODR            0xFFFB /* initially LASER_EN is deactivated */

/*

 * Port C setup.

 */

#define VAL_GPIOCCRL            (PIN_MODE_INPUT_PULLX(0) | \

                                 PIN_MODE_INPUT_PULLX(1) | \

                                 PIN_MODE_INPUT_PULLX(2) | \

                                 PIN_MODE_INPUT_PULLX(3) | \

                                 PIN_MODE_OUTPUT_PUSHPULL(GPIOC_LIGHT_XLAT) | \

                                 PIN_MODE_INPUT_PULLX(5) | \

                                 PIN_MODE_INPUT_PULLX(6) | \

                                 PIN_MODE_INPUT_PULLX(7))

#define VAL_GPIOCCRH            (PIN_MODE_INPUT_PULLX(8) | \

                                 PIN_MODE_INPUT_PULLX(9) | \

                                 PIN_MODE_INPUT(GPIOC_SYS_UART_RX) | \

                                 PIN_MODE_INPUT(GPIOC_SYS_UART_TX) | \

                                 PIN_MODE_INPUT_PULLX(12) | \

                                 PIN_MODE_INPUT_PULLX(13) | \

                                 PIN_MODE_OUTPUT_OPENDRAIN(GPIOC_SYS_PD_N) | \

                                 PIN_MODE_INPUT_PULLX(15))

#define VAL_GPIOCODR            0xFFFF

/*

 * Port D setup.

 */

#define VAL_GPIODCRL            (PIN_MODE_INPUT(GPIOD_OSC_IN) | \

                                 PIN_MODE_INPUT(GPIOD_OSC_OUT) | \

                                 PIN_MODE_OUTPUT_OPENDRAIN(GPIOD_SYS_INT_N) | \

                                 PIN_MODE_INPUT_PULLX(3) | \

                                 PIN_MODE_INPUT_PULLX(4) | \

                                 PIN_MODE_INPUT_PULLX(5) | \

                                 PIN_MODE_INPUT_PULLX(6) | \

                                 PIN_MODE_INPUT_PULLX(7))

#define VAL_GPIODCRH            0x88888888

#define VAL_GPIODODR            0xFFFB /* initially SYS_INT_N indicates that the OS is busy */

/*

 * Port E setup.

 */

#define VAL_GPIOECRL            0x88888888 /*  PE7...PE0 */

#define VAL_GPIOECRH            0x88888888 /* PE15...PE8 */

#define VAL_GPIOEODR            0xFFFF

/*

 * Port F setup.

 */

#define VAL_GPIOFCRL            0x88888888 /*  PF7...PF0 */

#define VAL_GPIOFCRH            0x88888888 /* PF15...PF8 */

#define VAL_GPIOFODR            0xFFFF

/*

 * Port G setup.

 */

#define VAL_GPIOGCRL            0x88888888 /*  PG7...PG0 */

#define VAL_GPIOGCRH            0x88888888 /* PG15...PG8 */

#define VAL_GPIOGODR            0xFFFF

#if !defined(_FROM_ASM_)

#ifdef __cplusplus

extern "C" {

#endif

  void boardInit(void);

  void boardRequestShutdown(void);

  void boardStandby(void);

  void boardClearI2CBus(const uint8_t scl_pad);

#ifdef __cplusplus

}

#endif

#endif /* _FROM_ASM_ */

#endif /* _BOARD_H_ */

# List of all the board related files.

BOARDSRC = ${AMIRO}/boards/LightRing/board.c

# Required include directories

BOARDINC = ${AMIRO}/boards/LightRing

# Required linker directory

BOARDLD = ${AMIRO}/ports

#include "ch.h"

#include "hal.h"

#include "board.h"

/**

 * @brief   PAL setup.

 * @details Digital I/O ports static configuration as defined in @p board.h.

 *          This variable is used by the HAL when initializing the PAL driver.

 */

#if HAL_USE_PAL || defined(__DOXYGEN__)

const PALConfig pal_default_config =

{

  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},

  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},

  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},

  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},

  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},

  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},

  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},

  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},

  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}

};

#endif

/*

 * Early initialization code.

 * This initialization must be performed just after stack setup and before

 * any other initialization.

 */

void __early_init(void) {

  stm32_clock_init();

}

/*

 * Board-specific initialization code.

 */

void boardInit(void) {

}

inline void boardWriteIoPower(int value)

{

    palWritePad(GPIOA, GPIOA_SYS_REG_EN, value);

    if (value) {

        // drive pins

        palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_ALTERNATE(9));

        palSetPadMode(GPIOA, GPIOA_SYS_UART_TX, PAL_MODE_ALTERNATE(7));

        palSetPadMode(GPIOB, GPIOB_BT_CTS, PAL_MODE_ALTERNATE(7));

    } else {

        // float pins

        palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_INPUT);

        palSetPadMode(GPIOA, GPIOA_SYS_UART_TX, PAL_MODE_INPUT);

        palSetPadMode(GPIOB, GPIOB_BT_CTS, PAL_MODE_INPUT);

    }

    chThdSleepMilliseconds(50);

}

inline void boardWriteLed(int value)

{

    palWritePad(GPIOB, GPIOB_LED, !value);

}

inline void boardWriteSystemPower(int value)

{

    palWritePad(GPIOB, GPIOB_POWER_EN, value);

    chThdSleepMilliseconds(50);

}

inline void boardWriteWarmRestart(const uint8_t value)

{

    palWritePad(GPIOC, GPIOC_SYS_WARMRST_N, ~value);

    chThdSleepMilliseconds(50);

}

inline void boardChargerSetState(uint8_t chrg_mask, uint8_t state)

{

  if (chrg_mask & (1u << 0))

    palWritePad(GPIOC, GPIOC_CHARGE_EN1_N, ~state);

  if (chrg_mask & (1u << 1))

    palWritePad(GPIOD, GPIOD_CHARGE_EN2_N, ~state);

}

inline void boardBluetoothSetState(uint8_t state)

{

    palWritePad(GPIOC, GPIOC_BT_RST, ~state);

}

inline void boardRequestShutdown(void)

{

  palClearPad(GPIOC, GPIOC_SYS_PD_N);

}

#define RTC_ISR_TAMP2F ((uint32_t)0x00004000)

inline void boardStandby(void)

{

  chSysLock();

  // set deepsleep bit

  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;

  // enable wakeup pin

  PWR->CSR |= PWR_CSR_EWUP;

  // set PDDS, clear WUF, clear SBF

  PWR->CR |= (PWR_CR_CWUF | PWR_CR_PDDS | PWR_CR_CSBF);

  // clear RTC wakeup source flags

  RTC->ISR &= ~(RTC_ISR_ALRBF | RTC_ISR_ALRAF | RTC_ISR_WUTF | RTC_ISR_TAMP1F | RTC_ISR_TAMP2F |

                RTC_ISR_TSOVF | RTC_ISR_TSF);

  // Wait for Interrupt

  __WFI();

}

inline void boardStop(const uint8_t lpds, const uint8_t fpds)

{

  chSysLock();

  // set deepsleep bit

  SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;

  // enable wakeup pin

  //PWR->CSR |= PWR_CSR_EWUP;

  // clear PDDS, clear LPDS, clear FPDS

  PWR->CR &= ~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS);

  // clear WUF, clear SBF

  PWR->CR |= (PWR_CR_CWUF | PWR_CR_CSBF);

  if (lpds)

    PWR->CR |= (PWR_CR_LPDS);

  if (fpds)

    PWR->CR |= (PWR_CR_FPDS);

  // clear RTC wakeup source flags

  RTC->ISR &= ~(RTC_ISR_ALRBF | RTC_ISR_ALRAF | RTC_ISR_WUTF | RTC_ISR_TAMP1F | RTC_ISR_TAMP2F |

                RTC_ISR_TSOVF | RTC_ISR_TSF);

  // clear pending interrupts

  EXTI->PR = ~0;

  // Wait for Interrupt

  __WFI();

}

#undef RTC_ISR_TAMP2F

inline void boardWakeup(void) {

  palClearPad(GPIOC, GPIOC_SYS_PD_N);

  chThdSleepMicroseconds(10);

  palSetPad(GPIOC, GPIOC_SYS_PD_N);

}

inline void boardClearI2CBus(const uint8_t scl_pad) {

  uint8_t i;

  // configure I²C SCL open drain

  palSetPadMode(GPIOB, scl_pad, PAL_MODE_OUTPUT_OPENDRAIN);

  // perform bus clear as per I²C Specification v5 3.1.16

  for (i = 0x00u; i < 0x09u; i++) {

    palClearPad(GPIOB, scl_pad);

    chThdSleepMicroseconds(5);

    palSetPad(GPIOB, scl_pad);

    chThdSleepMicroseconds(5);

  }

  // reconfigure I²C SCL

  palSetPadMode(GPIOB, scl_pad, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN);

}

#ifndef _BOARD_H_

#define _BOARD_H_

/*

 * Setup for AMiRo PowerManagement board.

 */

/*

 * Board identifier.

 */

#define BOARD_POWER_MANAGEMENT

#define BOARD_NAME              "AMiRo PowerManagement"

#define BOARD_VERSION           "1.1"

/*

 * Board frequencies.

 */

#define STM32_LSECLK            0

#define STM32_HSECLK            8000000

/*

 * Board voltages.

 * Required for performance limits calculation.

 */

#define STM32_VDD               330

/*

 * MCU type as defined in the ST header file stm32f4xx.h.

 */

#define STM32F40_41xxx

/*

 * IO pins assignments.

 */

#define GPIOA_WKUP              0

#define GPIOA_SYS_UART_TX       2

#define GPIOA_SYS_UART_RX       3

#define GPIOA_SYS_SPI_SS0_N     4

#define GPIOA_SYS_SPI_SCLK      5

#define GPIOA_SYS_SPI_MISO      6

#define GPIOA_SYS_SPI_MOSI      7

#define GPIOA_SYS_REG_EN        8

#define GPIOA_PROG_RX           9

#define GPIOA_PROG_TX           10

#define GPIOA_CAN_RX            11

#define GPIOA_CAN_TX            12

#define GPIOA_SYS_SPI_SS1_N     15

#define GPIOB_IR_INT1_N         0

#define GPIOB_VSYS_SENSE        1

#define GPIOB_POWER_EN          2

#define GPIOB_SYS_UART_DN       3

#define GPIOB_CHARGE_STAT2A     4

#define GPIOB_BUZZER            5

#define GPIOB_GAUGE_BATLOW2     6

#define GPIOB_GAUGE_BATGD2_N    7

#define GPIOB_GAUGE_SCL2        8

#define GPIOB_GAUGE_SDA2        9

#define GPIOB_GAUGE_SCL1        10

#define GPIOB_GAUGE_SDA1        11

#define GPIOB_LED               12

#define GPIOB_BT_RTS            13

#define GPIOB_BT_CTS            14

#define GPIOB_SYS_UART_UP       15

#define GPIOC_CHARGE_STAT1A     0

#define GPIOC_GAUGE_BATLOW1     1

#define GPIOC_GAUGE_BATGD1_N    2

#define GPIOC_CHARGE_EN1_N      3

#define GPIOC_IR_INT2_N         4

#define GPIOC_TOUCH_INT_N       5

#define GPIOC_SYS_DONE          6

#define GPIOC_SYS_PROG_N        7

#define GPIOC_PATH_DC           8

#define GPIOC_SYS_SPI_DIR       9

#define GPIOC_BT_RX             10

#define GPIOC_BT_TX             11

#define GPIOC_SYS_INT_N         12

#define GPIOC_SYS_PD_N          13

#define GPIOC_SYS_WARMRST_N     14

#define GPIOC_BT_RST            15

#define GPIOD_CHARGE_EN2_N      2

#define GPIOH_OSC_IN            0

#define GPIOH_OSC_OUT           1

/*

 * I/O ports initial setup, this configuration is established soon after reset

 * in the initialization code.

 */

#define PIN_MODE_INPUT(n)       (0U << ((n) * 2))

#define PIN_MODE_OUTPUT(n)      (1U << ((n) * 2))

#define PIN_MODE_ALTERNATE(n)   (2U << ((n) * 2))

#define PIN_MODE_ANALOG(n)      (3U << ((n) * 2))

#define PIN_OTYPE_PUSHPULL(n)   (0U << (n))

#define PIN_OTYPE_OPENDRAIN(n)  (1U << (n))

#define PIN_OSPEED_2M(n)        (0U << ((n) * 2))

#define PIN_OSPEED_25M(n)       (1U << ((n) * 2))

#define PIN_OSPEED_50M(n)       (2U << ((n) * 2))

#define PIN_OSPEED_100M(n)      (3U << ((n) * 2))

#define PIN_PUDR_FLOATING(n)    (0U << ((n) * 2))

#define PIN_PUDR_PULLUP(n)      (1U << ((n) * 2))

#define PIN_PUDR_PULLDOWN(n)    (2U << ((n) * 2))

#define PIN_AFIO_AF(n, v)       ((v##U) << ((n % 8) * 4))

/*

 * Port A setup.

 */

#define VAL_GPIOA_MODER         (PIN_MODE_INPUT(GPIOA_WKUP) | \

                                 PIN_MODE_INPUT(1) | \

                                 PIN_MODE_ALTERNATE(GPIOA_SYS_UART_TX) | \

                                 PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) | \

                                 PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) | \

                                 PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) | \

                                 PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) | \

                                 PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) | \

                                 PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N) | \

                                 PIN_MODE_ALTERNATE(GPIOA_PROG_RX) | \

                                 PIN_MODE_ALTERNATE(GPIOA_PROG_TX) | \

                                 PIN_MODE_ALTERNATE(GPIOA_CAN_RX) | \

                                 PIN_MODE_ALTERNATE(GPIOA_CAN_TX) | \

                                 PIN_MODE_INPUT(13) | \

                                 PIN_MODE_INPUT(14) | \

                                 PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN))

#define VAL_GPIOA_OTYPER        (PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) | \

                                 PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) | \

                                 PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) | \

                                 PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) | \

                                 PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN))

#define VAL_GPIOA_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOA_PUPDR         (PIN_PUDR_FLOATING(GPIOA_WKUP) | \

                                 PIN_PUDR_PULLUP(1) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_UART_TX) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_UART_RX) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_SS0_N) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_SCLK) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_MOSI) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_MISO) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_SS1_N) | \

                                 PIN_PUDR_FLOATING(GPIOA_PROG_RX) | \

                                 PIN_PUDR_PULLUP(GPIOA_PROG_TX) | \

                                 PIN_PUDR_FLOATING(GPIOA_CAN_RX) | \

                                 PIN_PUDR_FLOATING(GPIOA_CAN_TX) | \

                                 PIN_PUDR_PULLUP(13) | \

                                 PIN_PUDR_PULLUP(14) | \

                                 PIN_PUDR_FLOATING(GPIOA_SYS_REG_EN))

#define VAL_GPIOA_ODR           0xFFFF

#define VAL_GPIOA_AFRL          (PIN_AFIO_AF(GPIOA_SYS_UART_TX, 7) | \

                                 PIN_AFIO_AF(GPIOA_SYS_UART_RX, 7) | \

                                 PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, 5) | \

                                 PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, 5) | \

                                 PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, 5))

#define VAL_GPIOA_AFRH          (PIN_AFIO_AF(GPIOA_PROG_RX, 7) | \

                                 PIN_AFIO_AF(GPIOA_PROG_TX, 7) | \

                                 PIN_AFIO_AF(GPIOA_CAN_RX, 9) | \

                                 PIN_AFIO_AF(GPIOA_CAN_TX, 9))

/*

 * Port B setup.

 */

#define VAL_GPIOB_MODER         (PIN_MODE_INPUT(GPIOB_IR_INT1_N) | \

                                 PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) | \

                                 PIN_MODE_OUTPUT(GPIOB_POWER_EN) | \

                                 PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) | \

                                 PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) | \

                                 PIN_MODE_ALTERNATE(GPIOB_BUZZER) | \

                                 PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) | \

                                 PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) | \

                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) | \

                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) | \

                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) | \

                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) | \

                                 PIN_MODE_OUTPUT(GPIOB_LED) | \

                                 PIN_MODE_ALTERNATE(GPIOB_BT_RTS) | \

                                 PIN_MODE_ALTERNATE(GPIOB_BT_CTS) | \

                                 PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP))

#define VAL_GPIOB_OTYPER        (PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) | \

                                 PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOB_LED) | \

                                 PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP))

#define VAL_GPIOB_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOB_PUPDR         0x00000000

#define VAL_GPIOB_ODR           0xFFFF

#define VAL_GPIOB_AFRL          (PIN_AFIO_AF(GPIOB_BUZZER, 2))

#define VAL_GPIOB_AFRH          (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, 4) | \

                                 PIN_AFIO_AF(GPIOB_GAUGE_SDA2, 4) | \

                                 PIN_AFIO_AF(GPIOB_GAUGE_SCL1, 4) | \

                                 PIN_AFIO_AF(GPIOB_GAUGE_SDA1, 4) | \

                                 PIN_AFIO_AF(GPIOB_BT_RTS, 7) | \

                                 PIN_AFIO_AF(GPIOB_BT_CTS, 7))

/*

 * Port C setup.

 */

#define VAL_GPIOC_MODER         (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) | \

                                 PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) | \

                                 PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) | \

                                 PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) | \

                                 PIN_MODE_INPUT(GPIOC_IR_INT2_N) | \

                                 PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) | \

                                 PIN_MODE_INPUT(GPIOC_SYS_DONE) | \

                                 PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) | \

                                 PIN_MODE_INPUT(GPIOC_PATH_DC) | \

                                 PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) | \

                                 PIN_MODE_ALTERNATE(GPIOC_BT_RX) | \

                                 PIN_MODE_ALTERNATE(GPIOC_BT_TX) | \

                                 PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) | \

                                 PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) | \

                                 PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) | \

                                 PIN_MODE_OUTPUT(GPIOC_BT_RST))

#define VAL_GPIOC_OTYPER        (PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) | \

                                 PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) | \

                                 PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST))

#define VAL_GPIOC_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOC_PUPDR         0x00000000

#define VAL_GPIOC_ODR           0xEEFF /* emulate open drain for PATH_DC. This is required to prevent accidental shortcuts. Furthermore, pull down SYS_INT_N to indicate the OS is starting */

#define VAL_GPIOC_AFRL          0x00000000

#define VAL_GPIOC_AFRH          (PIN_AFIO_AF(GPIOC_BT_RX, 7) | \

                                 PIN_AFIO_AF(GPIOC_BT_TX, 7))

/*

 * Port D setup.

 */

#define VAL_GPIOD_MODER         (PIN_MODE_INPUT(0) | \

                                 PIN_MODE_INPUT(1) | \

                                 PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) | \

                                 PIN_MODE_INPUT(3) | \

                                 PIN_MODE_INPUT(4) | \

                                 PIN_MODE_INPUT(5) | \

                                 PIN_MODE_INPUT(6) | \

                                 PIN_MODE_INPUT(7) | \

                                 PIN_MODE_INPUT(8) | \

                                 PIN_MODE_INPUT(9) | \

                                 PIN_MODE_INPUT(10) | \

                                 PIN_MODE_INPUT(11) | \

                                 PIN_MODE_INPUT(12) | \

                                 PIN_MODE_INPUT(13) | \

                                 PIN_MODE_INPUT(14) | \

                                 PIN_MODE_INPUT(15))

#define VAL_GPIOD_OTYPER        (PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N))

#define VAL_GPIOD_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOD_PUPDR         (PIN_PUDR_PULLUP(0) | \

                                 PIN_PUDR_PULLUP(1) | \

                                 PIN_PUDR_FLOATING(GPIOD_CHARGE_EN2_N) | \

                                 PIN_PUDR_PULLUP(3) | \

                                 PIN_PUDR_PULLUP(4) | \

                                 PIN_PUDR_PULLUP(5) | \

                                 PIN_PUDR_PULLUP(6) | \

                                 PIN_PUDR_PULLUP(7) | \

                                 PIN_PUDR_PULLUP(8) | \

                                 PIN_PUDR_PULLUP(9) | \

                                 PIN_PUDR_PULLUP(10) | \

                                 PIN_PUDR_PULLUP(11) | \

                                 PIN_PUDR_PULLUP(12) | \

                                 PIN_PUDR_PULLUP(13) | \

                                 PIN_PUDR_PULLUP(14) | \

                                 PIN_PUDR_PULLUP(15))

#define VAL_GPIOD_ODR           0x0FFF

#define VAL_GPIOD_AFRL          0x00000000

#define VAL_GPIOD_AFRH          0x00000000

/*

 * Port E setup.

 */

#define VAL_GPIOE_MODER         0x00000000

#define VAL_GPIOE_OTYPER        0x00000000

#define VAL_GPIOE_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOE_PUPDR         0xFFFFFFFF

#define VAL_GPIOE_ODR           0xFFFF

#define VAL_GPIOE_AFRL          0x00000000

#define VAL_GPIOE_AFRH          0x00000000

/*

 * Port F setup.

 * All input with pull-up.

 */

#define VAL_GPIOF_MODER         0x00000000

#define VAL_GPIOF_OTYPER        0x00000000

#define VAL_GPIOF_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOF_PUPDR         0xFFFFFFFF

#define VAL_GPIOF_ODR           0xFFFF

#define VAL_GPIOF_AFRL          0x00000000

#define VAL_GPIOF_AFRH          0x00000000

/*

 * Port G setup.

 * All input with pull-up.

 */

#define VAL_GPIOG_MODER         0x00000000

#define VAL_GPIOG_OTYPER        0x00000000

#define VAL_GPIOG_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOG_PUPDR         0xFFFFFFFF

#define VAL_GPIOG_ODR           0xFFFF

#define VAL_GPIOG_AFRL          0x00000000

#define VAL_GPIOG_AFRH          0x00000000

/*

 * Port H setup.

 */

#define VAL_GPIOH_MODER         (PIN_MODE_INPUT(GPIOH_OSC_IN) | \

                                 PIN_MODE_INPUT(GPIOH_OSC_OUT) | \

                                 PIN_MODE_INPUT(2) | \

                                 PIN_MODE_INPUT(3) | \

                                 PIN_MODE_INPUT(4) | \

                                 PIN_MODE_INPUT(5) | \

                                 PIN_MODE_INPUT(6) | \

                                 PIN_MODE_INPUT(7) | \

                                 PIN_MODE_INPUT(8) | \

                                 PIN_MODE_INPUT(9) | \

                                 PIN_MODE_INPUT(10) | \

                                 PIN_MODE_INPUT(11) | \

                                 PIN_MODE_INPUT(12) | \

                                 PIN_MODE_INPUT(13) | \

                                 PIN_MODE_INPUT(14) | \

                                 PIN_MODE_INPUT(15))

#define VAL_GPIOH_OTYPER        0x00000000

#define VAL_GPIOH_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOH_PUPDR         (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \

                                 PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \

                                 PIN_PUDR_PULLUP(2) | \

                                 PIN_PUDR_PULLUP(3) | \

                                 PIN_PUDR_PULLUP(4) | \

                                 PIN_PUDR_PULLUP(5) | \

                                 PIN_PUDR_PULLUP(6) | \

                                 PIN_PUDR_PULLUP(7) | \

                                 PIN_PUDR_PULLUP(8) | \

                                 PIN_PUDR_PULLUP(9) | \

                                 PIN_PUDR_PULLUP(10) | \

                                 PIN_PUDR_PULLUP(11) | \

                                 PIN_PUDR_PULLUP(12) | \

                                 PIN_PUDR_PULLUP(13) | \

                                 PIN_PUDR_PULLUP(14) | \

                                 PIN_PUDR_PULLUP(15))

#define VAL_GPIOH_ODR           0xFFFF

#define VAL_GPIOH_AFRL          0x00000000

#define VAL_GPIOH_AFRH          0x00000000

/*

 * Port I setup.

 * All input with pull-up.

 */

#define VAL_GPIOI_MODER         0x00000000

#define VAL_GPIOI_OTYPER        0x00000000

#define VAL_GPIOI_OSPEEDR       0xFFFFFFFF

#define VAL_GPIOI_PUPDR         0xFFFFFFFF

#define VAL_GPIOI_ODR           0xFFFF

#define VAL_GPIOI_AFRL          0x00000000

#define VAL_GPIOI_AFRH          0x00000000

#if !defined(_FROM_ASM_)

#ifdef __cplusplus

extern "C" {

#endif

  void boardInit(void);

  void boardWriteIoPower(int value);

  void boardWriteLed(int value);

  void boardWriteSystemPower(int value);

  void boardWriteWarmRestart(const uint8_t value);

  void boardChargerSetState(uint8_t chrg_mask, uint8_t state);

  void boardBluetoothSetState(uint8_t state);

  void boardRequestShutdown(void);

  void boardStandby(void);

  void boardStop(const uint8_t lpds, const uint8_t fpds);

  void boardWakeup(void);

  void boardClearI2CBus(const uint8_t scl_pad);

#ifdef __cplusplus

}

#endif

#endif /* _FROM_ASM_ */

#endif /* _BOARD_H_ */

# List of all the board related files.

BOARDSRC = ${AMIRO}/boards/PowerManagement/board.c \

           ${AMIRO}/boards/PowerManagement/wakeup.c

# Required include directories

BOARDINC = ${AMIRO}/boards/PowerManagement

# Required linker directory

BOARDLD = ${AMIRO}/ports

#include <ch.h>

#include <hal.h>

#include <board.h>

#include "wakeup.h"

enum wakeup_mode   wakeup_mode;

enum wakeup_source wakeup_source;

void standby_wakeup_source(void) {

  uint32_t csr = PWR->CSR;

  uint32_t gpioc_val = palReadPort(GPIOC);

  // default to POR

  wakeup_mode = WAKE_MODE_POR;

  wakeup_source = WAKE_SRC_UNKN;

  // make sure reset while powered on looks like POR

  PWR->CR |= (PWR_CR_CSBF);

  if ((csr & (PWR_CSR_SBF | PWR_CSR_WUF)) == (PWR_CSR_SBF | PWR_CSR_WUF)) {

    // wakeup or RTC event from standby mode

    // default to WKUP

    wakeup_mode = WAKE_MODE_STDBY;

    wakeup_source = WAKE_SRC_WKUP;