amiro-os / boards / DiWheelDrive / board.c @ 58fe0e0b
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#include "ch.h" |
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#include "hal.h" |
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{ |
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{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, |
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{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, |
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{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, |
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{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, |
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{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, |
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{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH}, |
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{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH}, |
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}; |
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#endif
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) { |
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stm32_clock_init(); |
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} |
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) { |
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/*
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* Several I/O pins are re-mapped:
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* JTAG disabled and SWJ enabled
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* TIM2 to the PA15/PB3/PA2/PA3 pins.
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* TIM3 to PC6/PC7 pins.
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* USART3 to the PC10/PC11 pins.
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* I2C1 to the PB8/PB9 pins.
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*/
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AFIO->MAPR = AFIO_MAPR_SWJ_CFG_DISABLE | |
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AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 | |
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AFIO_MAPR_TIM3_REMAP_FULLREMAP | |
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AFIO_MAPR_USART3_REMAP_PARTIALREMAP | |
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AFIO_MAPR_I2C1_REMAP; |
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} |
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inline void boardWriteIoPower(const uint8_t value) |
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{ |
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if (value) {
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// drive pins
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palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_STM32_ALTERNATE_PUSHPULL); |
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} else {
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// float pins
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palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_INPUT); |
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} |
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} |
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inline void boardWriteLed(int value) |
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{ |
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palWritePad(GPIOA, GPIOA_LED, !value); |
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} |
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inline void boardRequestShutdown(void) |
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{ |
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palClearPad(GPIOC, GPIOC_SYS_PD_N); |
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} |
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inline void boardStandby(void) |
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{ |
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palSetPad(GPIOC, GPIOC_SYS_PD_N); |
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chSysLock(); |
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// Standby
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// set deepsleep bit
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
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// enable wakeup pin
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//PWR->CSR |= PWR_CSR_EWUP;
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// set PDDS, clear WUF, clear SBF
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PWR->CR |= (PWR_CR_CWUF | PWR_CR_PDDS | PWR_CR_CSBF); |
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// clear RTC wakeup source flags
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RTC->CRL &= ~(RTC_CRL_ALRF); |
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// Wait for Interrupt
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__WFI(); |
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} |
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inline void boardWakeup(void) { |
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palClearPad(GPIOC, GPIOC_SYS_PD_N); |
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chThdSleepMicroseconds(10);
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palSetPad(GPIOC, GPIOC_SYS_PD_N); |
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} |
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inline void boardClearI2CBus(const uint8_t scl_pad) { |
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uint8_t i; |
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// configure I²C SCL open drain
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palSetPadMode(GPIOB, scl_pad, PAL_MODE_OUTPUT_OPENDRAIN); |
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// perform bus clear as per I²C Specification v5 3.1.16
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for (i = 0x00u; i < 0x09u; i++) { |
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palClearPad(GPIOB, scl_pad); |
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chThdSleepMicroseconds(5);
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palSetPad(GPIOB, scl_pad); |
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chThdSleepMicroseconds(5);
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} |
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// reconfigure I²C SCL
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palSetPadMode(GPIOB, scl_pad, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); |
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} |