amiro-os / boards / PowerManagement / board.c @ 58fe0e0b
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#include "ch.h" |
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#include "hal.h" |
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#include "board.h" |
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
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}; |
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#endif
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) { |
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stm32_clock_init(); |
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} |
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) { |
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} |
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inline void boardWriteIoPower(int value) |
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{
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palWritePad(GPIOA, GPIOA_SYS_REG_EN, value); |
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if (value) {
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// drive pins
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palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_ALTERNATE(9));
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palSetPadMode(GPIOA, GPIOA_SYS_UART_TX, PAL_MODE_ALTERNATE(7));
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palSetPadMode(GPIOB, GPIOB_BT_CTS, PAL_MODE_ALTERNATE(7));
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} else {
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// float pins
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palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_INPUT); |
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palSetPadMode(GPIOA, GPIOA_SYS_UART_TX, PAL_MODE_INPUT); |
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palSetPadMode(GPIOB, GPIOB_BT_CTS, PAL_MODE_INPUT); |
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} |
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chThdSleepMilliseconds(50);
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} |
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inline void boardWriteLed(int value) |
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{
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palWritePad(GPIOB, GPIOB_LED, !value); |
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} |
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inline void boardWriteSystemPower(int value) |
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{
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palWritePad(GPIOB, GPIOB_POWER_EN, value); |
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chThdSleepMilliseconds(50);
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} |
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inline void boardWriteWarmRestart(const uint8_t value) |
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{
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palWritePad(GPIOC, GPIOC_SYS_WARMRST_N, ~value); |
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chThdSleepMilliseconds(50);
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} |
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inline void boardChargerSetState(uint8_t chrg_mask, uint8_t state) |
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{
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if (chrg_mask & (1u << 0)) |
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palWritePad(GPIOC, GPIOC_CHARGE_EN1_N, ~state); |
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if (chrg_mask & (1u << 1)) |
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palWritePad(GPIOD, GPIOD_CHARGE_EN2_N, ~state); |
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} |
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inline void boardBluetoothSetState(uint8_t state) |
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{
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palWritePad(GPIOC, GPIOC_BT_RST, ~state); |
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} |
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inline void boardRequestShutdown(void) |
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{
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palClearPad(GPIOC, GPIOC_SYS_PD_N); |
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} |
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#define RTC_ISR_TAMP2F ((uint32_t)0x00004000) |
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inline void boardStandby(void) |
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{
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chSysLock(); |
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// set deepsleep bit
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
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// enable wakeup pin
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PWR->CSR |= PWR_CSR_EWUP; |
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// set PDDS, clear WUF, clear SBF
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PWR->CR |= (PWR_CR_CWUF | PWR_CR_PDDS | PWR_CR_CSBF); |
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// clear RTC wakeup source flags
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RTC->ISR &= ~(RTC_ISR_ALRBF | RTC_ISR_ALRAF | RTC_ISR_WUTF | RTC_ISR_TAMP1F | RTC_ISR_TAMP2F | |
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RTC_ISR_TSOVF | RTC_ISR_TSF); |
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// Wait for Interrupt
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__WFI(); |
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} |
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inline void boardStop(const uint8_t lpds, const uint8_t fpds) |
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{
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chSysLock(); |
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// set deepsleep bit
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
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// enable wakeup pin
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//PWR->CSR |= PWR_CSR_EWUP;
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// clear PDDS, clear LPDS, clear FPDS
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PWR->CR &= ~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_FPDS); |
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// clear WUF, clear SBF
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PWR->CR |= (PWR_CR_CWUF | PWR_CR_CSBF); |
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if (lpds)
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PWR->CR |= (PWR_CR_LPDS); |
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if (fpds)
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PWR->CR |= (PWR_CR_FPDS); |
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// clear RTC wakeup source flags
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RTC->ISR &= ~(RTC_ISR_ALRBF | RTC_ISR_ALRAF | RTC_ISR_WUTF | RTC_ISR_TAMP1F | RTC_ISR_TAMP2F | |
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RTC_ISR_TSOVF | RTC_ISR_TSF); |
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// clear pending interrupts
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EXTI->PR = ~0;
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// Wait for Interrupt
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__WFI(); |
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} |
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#undef RTC_ISR_TAMP2F
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inline void boardWakeup(void) { |
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palClearPad(GPIOC, GPIOC_SYS_PD_N); |
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chThdSleepMicroseconds(10);
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palSetPad(GPIOC, GPIOC_SYS_PD_N); |
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} |
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inline void boardClearI2CBus(const uint8_t scl_pad) { |
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uint8_t i; |
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// configure I²C SCL open drain
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palSetPadMode(GPIOB, scl_pad, PAL_MODE_OUTPUT_OPENDRAIN); |
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// perform bus clear as per I²C Specification v5 3.1.16
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for (i = 0x00u; i < 0x09u; i++) { |
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palClearPad(GPIOB, scl_pad); |
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chThdSleepMicroseconds(5);
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palSetPad(GPIOB, scl_pad); |
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chThdSleepMicroseconds(5);
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} |
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// reconfigure I²C SCL
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palSetPadMode(GPIOB, scl_pad, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN);
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} |