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amiro-os / ports / STM32F405xG.ld @ 58fe0e0b

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/*
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 * ST32F405xG memory setup.
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 */
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__main_stack_size__     = 0x0400;
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__process_stack_size__  = 0x0400;
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MEMORY
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{
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    flash : org = 0x08008000, len = 1M-32k
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    ram : org = 0x20000000, len = 112k
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    ethram : org = 0x2001C000, len = 16k
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    ccmram : org = 0x10000000, len = 64k
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}
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__ram_start__           = ORIGIN(ram);
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__ram_size__            = LENGTH(ram);
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__ram_end__             = __ram_start__ + __ram_size__;
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__crc_start__		= ORIGIN(flash) + 0x1AC;
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ENTRY(ResetHandler)
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SECTIONS
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{
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    . = 0;
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    _text = .;
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    startup : ALIGN(16) SUBALIGN(16)
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    {
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        KEEP(*(vectors))
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    } > flash
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    crc __crc_start__ :
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    {
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        LONG(0x55AA11EE);
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    } > flash
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    constructors : ALIGN(4) SUBALIGN(4)
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    {
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        PROVIDE(__init_array_start = .);
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        KEEP(*(SORT(.init_array.*)))
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        KEEP(*(.init_array))
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        PROVIDE(__init_array_end = .);
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    } > flash
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    destructors : ALIGN(4) SUBALIGN(4)
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    {
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        PROVIDE(__fini_array_start = .);
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        KEEP(*(.fini_array))
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        KEEP(*(SORT(.fini_array.*)))
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        PROVIDE(__fini_array_end = .);
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    } > flash
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    .text : ALIGN(16) SUBALIGN(16)
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    {
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        *(.text.startup.*)
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        *(.text)
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        *(.text.*)
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        *(.rodata)
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        *(.rodata.*)
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        *(.glue_7t)
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        *(.glue_7)
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        *(.gcc*)
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    } > flash
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    .ARM.extab :
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    {
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        *(.ARM.extab* .gnu.linkonce.armextab.*)
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    } > flash
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    .ARM.exidx : {
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        PROVIDE(__exidx_start = .);
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        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
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        PROVIDE(__exidx_end = .);
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     } > flash
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    .eh_frame_hdr :
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    {
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        *(.eh_frame_hdr)
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    } > flash
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    .eh_frame : ONLY_IF_RO
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    {
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        *(.eh_frame)
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    } > flash
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    .textalign : ONLY_IF_RO
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    {
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        . = ALIGN(8);
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    } > flash
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    . = ALIGN(4);
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    _etext = .;
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    _textdata = _etext;
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    .ccm (NOLOAD):
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    {
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        PROVIDE(_ccm_start = .);
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        . = ALIGN(4);
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        *(.ccm)
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        . = ALIGN(4);
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        *(.ccm.*)
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        . = ALIGN(4);
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        PROVIDE(_ccm_end = .);
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    } > ccmram
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    .stacks :
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    {
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        . = ALIGN(8);
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        __main_stack_base__ = .;
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        . += __main_stack_size__;
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        . = ALIGN(8);
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        __main_stack_end__ = .;
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        __process_stack_base__ = .;
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        __main_thread_stack_base__ = .;
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        . += __process_stack_size__;
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        . = ALIGN(8);
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        __process_stack_end__ = .;
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        __main_thread_stack_end__ = .;
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    } > ram
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    .data ALIGN(4) : ALIGN(4)
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    {
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        . = ALIGN(4);
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        PROVIDE(_data = .);
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        *(.data)
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        *(.data.*)
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        *(.ramtext)
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        . = ALIGN(4);
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        PROVIDE(_edata = .);
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    } > ram AT > flash
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    .bss ALIGN(4) : ALIGN(4)
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    {
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        . = ALIGN(4);
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        PROVIDE(_bss_start = .);
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        *(.bss)
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        *(.bss.*)
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        *(COMMON)
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        . = ALIGN(4);
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        PROVIDE(_bss_end = .);
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    } > ram
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    .eth (NOLOAD):
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    {
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        PROVIDE(_dma_start = .);
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        . = ALIGN(4);
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        *(.eth)
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        . = ALIGN(4);
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        *(.eth.*)
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        . = ALIGN(4);
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        PROVIDE(_dma_end = .);
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    } > ethram
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}
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PROVIDE(end = .);
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_end            = .;
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__heap_base__   = _end;
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__heap_end__    = __ram_end__;