amiro-os / kernel / patches / QEI-driver.patch @ 69b23c6c
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commit a23878ddb85bb8fd069f02042f15ad4be2a0d709
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Author: Marc Rothmann <mrothmann@techfak.uni-bielefeld.de>
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Date: Mon Sep 17 11:40:39 2018 +0200
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Added QEI driver to HAL. |
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diff --git a/os/hal/hal.mk b/os/hal/hal.mk
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index f177a3f..64d96d9 100644
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--- a/os/hal/hal.mk
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+++ b/os/hal/hal.mk
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@@ -41,6 +41,9 @@ endif
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ifneq ($(findstring HAL_USE_ICU TRUE,$(HALCONF)),) |
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HALSRC += $(CHIBIOS)/os/hal/src/hal_icu.c |
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endif |
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+ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),)
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+HALSRC += $(CHIBIOS)/os/hal/src/hal_qei.c
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+endif
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ifneq ($(findstring HAL_USE_MAC TRUE,$(HALCONF)),) |
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HALSRC += $(CHIBIOS)/os/hal/src/hal_mac.c |
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endif |
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@@ -94,6 +97,7 @@ HALSRC = $(CHIBIOS)/os/hal/src/hal.c \
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$(CHIBIOS)/os/hal/src/hal_i2c.c \ |
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$(CHIBIOS)/os/hal/src/hal_i2s.c \ |
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$(CHIBIOS)/os/hal/src/hal_icu.c \ |
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+ $(CHIBIOS)/os/hal/src/hal_qei.c \
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$(CHIBIOS)/os/hal/src/hal_mac.c \ |
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$(CHIBIOS)/os/hal/src/hal_mmc_spi.c \ |
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$(CHIBIOS)/os/hal/src/hal_pal.c \ |
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diff --git a/os/hal/include/hal_qei.h b/os/hal/include/hal_qei.h
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new file mode 100644
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index 0000000..aef5e62
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--- /dev/null
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+++ b/os/hal/include/hal_qei.h
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@@ -0,0 +1,148 @@
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+/*
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+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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+Copyright (C) 2016..2018 Thomas Schรถpping et al.
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+
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+This program is free software: you can redistribute it and/or modify
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+it under the terms of the GNU General Public License as published by
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+the Free Software Foundation, either version 3 of the License, or
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+(at your option) any later version.
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+
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+This program is distributed in the hope that it will be useful,
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+but WITHOUT ANY WARRANTY; without even the implied warranty of
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+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+GNU General Public License for more details.
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+
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+You should have received a copy of the GNU General Public License
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+along with this program. If not, see <http://www.gnu.org/licenses/>.
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+*/
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+
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+/**
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+ * @file hal_qei.h
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+ * @brief QEI Driver macros and structures.
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+ *
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+ * @addtogroup QEI
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+ * @{
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+ */
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+
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+#ifndef _HAL_QEI_H_
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+#define _HAL_QEI_H_
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+
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+#if HAL_USE_QEI || defined(__DOXYGEN__)
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+
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+/*===========================================================================*/
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+/* Driver constants. */
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+/*===========================================================================*/
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+
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+/*===========================================================================*/
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+/* Driver pre-compile time settings. */
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+/*===========================================================================*/
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+
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+/*===========================================================================*/
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+/* Derived constants and error checks. */
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+/*===========================================================================*/
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+
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+/*===========================================================================*/
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+/* Driver data structures and types. */
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+/*===========================================================================*/
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+
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+/**
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+ * @brief Driver state machine possible states.
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+ */
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+typedef enum {
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+ QEI_UNINIT = 0, /**< Not initialized. */
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+ QEI_STOP = 1, /**< Stopped. */
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+ QEI_READY = 2, /**< Ready. */
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+ QEI_ACTIVE = 4, /**< Active. */
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+} qeistate_t;
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+
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+/**
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+ * @brief Type of a structure representing an QEI driver.
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+ */
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+typedef struct QEIDriver QEIDriver;
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+
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+#include "hal_qei_lld.h"
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+
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+/*===========================================================================*/
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+/* Driver macros. */
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+/*===========================================================================*/
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+
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+/**
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+ * @name Macro Functions
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+ * @{
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+ */
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+/**
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+ * @brief Enables the quadrature encoder.
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+ *
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+ * @param[in] qeip pointer to the @p QEIDriver object
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+ *
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+ * @iclass
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+ */
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+#define qeiEnableI(qeip) qei_lld_enable(qeip)
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+
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+/**
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+ * @brief Disables the quadrature encoder.
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+ *
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+ * @param[in] qeip pointer to the @p QEIDriver object
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+ *
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+ * @iclass
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+ */
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+#define qeiDisableI(qeip) qei_lld_disable(qeip)
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+
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+/**
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+ * @brief Returns the direction of the last transition.
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+ * @details The direction is defined as boolean and is
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+ * calculated at each transition on any input.
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+ *
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+ * @param[in] qeip pointer to the @p QEIDriver object
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+ * @return The request direction.
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+ * @retval FALSE Position counted up.
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+ * @retval TRUE Position counted down.
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+ * @iclass
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+ */
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+#define qeiGetDirectionI(qeip) qei_lld_get_direction(qeip)
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+
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+/**
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+ * @brief Returns the position of the encoder.
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+ * @details The position is defined as number of pulses since last reset.
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+ *
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+ * @param[in] qeip pointer to the @p QEIDriver object
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+ * @return The number of pulses.
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+ *
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+ * @iclass
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+ */
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+#define qeiGetPositionI(qeip) qei_lld_get_position(qeip)
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+
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+/**
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+ * @brief Returns the range of the encoder.
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+ * @details The range is defined as number of maximum pulse count.
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+ *
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+ * @param[in] qeip pointer to the @p QEIDriver object
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+ * @return The number of pulses.
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+ *
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+ * @iclass
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+ */
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+#define qeiGetRangeI(qeip) qei_lld_get_range(qeip)
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+/** @} */
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+
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+/*===========================================================================*/
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+/* External declarations. */
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+/*===========================================================================*/
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+
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+#ifdef __cplusplus
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+extern "C" {
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+#endif
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+ void qeiInit(void);
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+ void qeiObjectInit(QEIDriver *qeip);
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+ void qeiStart(QEIDriver *qeip, const QEIConfig *config);
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+ void qeiStop(QEIDriver *qeip);
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+ void qeiEnable(QEIDriver *qeip);
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+ void qeiDisable(QEIDriver *qeip);
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+#ifdef __cplusplus
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+}
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+#endif
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+
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+#endif /* HAL_USE_QEI */
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+
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+#endif /* _HAL_QEI_H_ */
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+
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+/** @} */
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diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c
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index 6ade226..96c9da0 100644
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--- a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c
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+++ b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c
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@@ -34,6 +34,7 @@
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/* Driver local definitions. */
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/*===========================================================================*/
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+#if STM32_I2C_I2C1_USE_DMA
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#define I2C1_RX_DMA_CHANNEL \ |
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STM32_DMA_GETCHANNEL(STM32_I2C_I2C1_RX_DMA_STREAM, \
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STM32_I2C1_RX_DMA_CHN) |
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@@ -41,7 +42,9 @@
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#define I2C1_TX_DMA_CHANNEL \ |
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STM32_DMA_GETCHANNEL(STM32_I2C_I2C1_TX_DMA_STREAM, \
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STM32_I2C1_TX_DMA_CHN) |
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+#endif
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+#if STM32_I2C_I2C2_USE_DMA
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#define I2C2_RX_DMA_CHANNEL \ |
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STM32_DMA_GETCHANNEL(STM32_I2C_I2C2_RX_DMA_STREAM, \
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STM32_I2C2_RX_DMA_CHN) |
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@@ -49,7 +52,9 @@
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#define I2C2_TX_DMA_CHANNEL \ |
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STM32_DMA_GETCHANNEL(STM32_I2C_I2C2_TX_DMA_STREAM, \
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STM32_I2C2_TX_DMA_CHN) |
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+#endif
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+#if STM32_I2C_I2C3_USE_DMA
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#define I2C3_RX_DMA_CHANNEL \ |
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STM32_DMA_GETCHANNEL(STM32_I2C_I2C3_RX_DMA_STREAM, \
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STM32_I2C3_RX_DMA_CHN) |
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@@ -57,6 +62,7 @@
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#define I2C3_TX_DMA_CHANNEL \ |
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STM32_DMA_GETCHANNEL(STM32_I2C_I2C3_TX_DMA_STREAM, \
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STM32_I2C3_TX_DMA_CHN) |
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+#endif
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/*===========================================================================*/
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/* Driver constants. */
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@@ -72,6 +78,20 @@
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#define I2C_EV6_MASTER_REC_MODE_SELECTED \ |
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((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY)<< 16) | I2C_SR1_ADDR))
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+#define I2C_EV7_MASTER_REC_BYTE_RECEIVED \
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+ ((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY)<< 16) | I2C_SR1_RXNE))
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+
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+#define I2C_EV7_MASTER_REC_BYTE_RECEIVED_STOP \
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+ ((uint32_t)(I2C_SR1_RXNE))
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+
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+#define I2C_EV7_2_EV7_3_MASTER_REC_BYTE_QUEUED \
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+ ((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY)<< 16) | \
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+ I2C_SR1_BTF | I2C_SR1_RXNE))
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+
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+#define I2C_EV8_MASTER_BYTE_TRANSMITTING \
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+ ((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY | I2C_SR2_TRA)<< 16) | \
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+ I2C_SR1_TXE))
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+
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#define I2C_EV8_2_MASTER_BYTE_TRANSMITTED \ |
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((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY | I2C_SR2_TRA) << 16) | \ |
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I2C_SR1_BTF | I2C_SR1_TXE)) |
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@@ -129,8 +149,24 @@ static void i2c_lld_abort_operation(I2CDriver *i2cp) { |
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dp->SR1 = 0;
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/* Stops the associated DMA streams.*/
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- dmaStreamDisable(i2cp->dmatx);
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- dmaStreamDisable(i2cp->dmarx);
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+#if STM32_I2C_USE_I2C1 && STM32_I2C_I2C1_USE_DMA
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+ if (&I2CD1 == i2cp) {
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+ dmaStreamDisable(i2cp->dmatx);
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+ dmaStreamDisable(i2cp->dmarx);
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+ }
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+#endif
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+#if STM32_I2C_USE_I2C2 && STM32_I2C_I2C2_USE_DMA
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+ if (&I2CD2 == i2cp) {
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+ dmaStreamDisable(i2cp->dmatx);
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+ dmaStreamDisable(i2cp->dmarx);
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+ }
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+#endif
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+#if STM32_I2C_USE_I2C3 && STM32_I2C_I2C3_USE_DMA
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+ if (&I2CD3 == i2cp) {
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+ dmaStreamDisable(i2cp->dmatx);
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+ dmaStreamDisable(i2cp->dmarx);
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+ }
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+#endif
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} |
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/**
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@@ -236,13 +272,17 @@ static void i2c_lld_set_opmode(I2CDriver *i2cp) { |
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} |
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/**
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- * @brief I2C shared ISR code.
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+ * @brief I2C shared ISR code for DMA access.
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* |
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* @param[in] i2cp pointer to the @p I2CDriver object |
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* |
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* @notapi
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*/ |
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-static void i2c_lld_serve_event_interrupt(I2CDriver *i2cp) {
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+#if (STM32_I2C_USE_I2C1 && STM32_I2C_I2C1_USE_DMA) || \
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+ (STM32_I2C_USE_I2C2 && STM32_I2C_I2C2_USE_DMA) || \
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+ (STM32_I2C_USE_I2C3 && STM32_I2C_I2C3_USE_DMA) || \
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+ defined(__DOXYGEN__)
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+static void i2c_lld_serve_event_interrupt_dma(I2CDriver *i2cp) {
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I2C_TypeDef *dp = i2cp->i2c; |
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uint32_t regSR2 = dp->SR2; |
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uint32_t event = dp->SR1; |
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@@ -252,7 +292,7 @@ static void i2c_lld_serve_event_interrupt(I2CDriver *i2cp) { |
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done by the DMA.*/ |
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switch (I2C_EV_MASK & (event | (regSR2 << 16))) { |
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case I2C_EV5_MASTER_MODE_SELECT:
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- if ((i2cp->addr >> 8) > 0) {
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+ if ((i2cp->addr >> 8) > 0) {
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/* 10-bit address: 1 1 1 1 0 X X R/W */
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dp->DR = 0xF0 | (0x6 & (i2cp->addr >> 8)) | (0x1 & i2cp->addr); |
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} else {
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