AMiRo-OS

along with this program.  If not, see <http://www.gnu.org/licenses/>.

*/

/*

 * The following settings override the default settings present in

 * the various device driver implementation headers.

 * Note that the settings for each driver only have effect if the whole

 * 0...3        Lowest...Highest.

 */

#define STM32L4xx_MCUCONF

/*

 * HAL driver system settings.

#define STM32_HSE_ENABLED                   FALSE

#define STM32_LSE_ENABLED                   TRUE

#define STM32_MSIPLL_ENABLED                TRUE

#define STM32_MSIRANGE                      STM32_MSIRANGE_4M

#define STM32_MSISRANGE                     STM32_MSISRANGE_4M

#define STM32_SW                            STM32_SW_PLL

#define STM32_PLLSAI2N_VALUE                72

#define STM32_PLLSAI2P_VALUE                7

#define STM32_PLLSAI2R_VALUE                6

#define STM32_USART1SEL                     STM32_USART1SEL_SYSCLK

#define STM32_USART2SEL                     STM32_USART2SEL_SYSCLK

#define STM32_USART3SEL                     STM32_USART3SEL_SYSCLK

#define STM32_IRQ_EXTI19_PRIORITY           6

#define STM32_IRQ_EXTI20_PRIORITY           6

#define STM32_IRQ_EXTI21_22_PRIORITY        15

/*

 * ADC driver system settings.

#define STM32_ADC_COMPACT_SAMPLES           FALSE

#define STM32_ADC_USE_ADC1                  FALSE

#define STM32_ADC_USE_ADC2                  FALSE

#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)

#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(1, 2)

#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(1, 3)

#define STM32_GPT_TIM6_IRQ_PRIORITY         7

#define STM32_GPT_TIM7_IRQ_PRIORITY         7

#define STM32_GPT_TIM8_IRQ_PRIORITY         7

/*

 * I2C driver system settings.

#define STM32_ICU_USE_TIM4                  FALSE

#define STM32_ICU_USE_TIM5                  FALSE

#define STM32_ICU_USE_TIM8                  FALSE

#define STM32_ICU_TIM1_IRQ_PRIORITY         7

#define STM32_ICU_TIM2_IRQ_PRIORITY         7

#define STM32_ICU_TIM3_IRQ_PRIORITY         7

#define STM32_PWM_USE_TIM4                  FALSE

#define STM32_PWM_USE_TIM5                  FALSE

#define STM32_PWM_USE_TIM8                  FALSE

#define STM32_PWM_TIM1_IRQ_PRIORITY         7

#define STM32_PWM_TIM2_IRQ_PRIORITY         7

#define STM32_PWM_TIM3_IRQ_PRIORITY         7

#define STM32_PWM_TIM8_IRQ_PRIORITY         7

/*

 */

/*

 * SDC driver system settings.

#define STM32_SERIAL_USE_USART1             FALSE

#define STM32_SERIAL_USE_USART2             TRUE

#define STM32_SERIAL_USE_USART3             FALSE

#define STM32_SERIAL_USE_LPUART1            FALSE

#define STM32_SERIAL_USART1_PRIORITY        12

#define STM32_SERIAL_USART2_PRIORITY        12

#define STM32_SERIAL_USART3_PRIORITY        12

#define STM32_SERIAL_LPUART1_PRIORITY       12

/*

#define STM32_ST_USE_TIMER                  2

/*

 * UART driver system settings.

 */

#define STM32_UART_USE_USART1               FALSE

#define STM32_UART_USE_USART3               FALSE

#define STM32_UART_USE_UART4                FALSE

#define STM32_UART_USE_UART5                FALSE

#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 6)

#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(2, 3)

#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(2, 2)

#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(2, 1)

#define STM32_UART_USART1_IRQ_PRIORITY      12

#define STM32_UART_USART2_IRQ_PRIORITY      12

#define STM32_UART_USART3_IRQ_PRIORITY      12

#define STM32_UART_USART3_DMA_PRIORITY      0

#define STM32_UART_UART4_DMA_PRIORITY       0

#define STM32_UART_UART5_DMA_PRIORITY       0

#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

/*

#define STM32_USB_USE_OTG1                  FALSE

#define STM32_USB_OTG1_IRQ_PRIORITY         14

#define STM32_USB_OTG1_RX_FIFO_SIZE         512

/*

 * WDG driver system settings.

#define STM32_WDG_USE_IWDG                  FALSE

/*

 */

#endif /* MCUCONF_H */