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From d5e13e540dec58ece6de3d246a166185418f3fd3 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Thomas=20Sch=C3=B6pping?= <tschoepp@cit-ec.uni-bielefeld.de>
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Date: Mon, 12 Jun 2017 17:27:13 +0200
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Subject: [PATCH] Introduced support for the ADC analog watchdog (ADCv2 only).
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---
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os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c | 20 +++++++++++++++++---
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os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h | 21 ++++++++++++++++++++-
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2 files changed, 37 insertions(+), 4 deletions(-)
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diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c
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index b2e651e..d5875ee 100644
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--- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c
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+++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c
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@@ -124,7 +124,11 @@ OSAL_IRQ_HANDLER(STM32_ADC_HANDLER) {
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if (ADCD1.grpp != NULL)
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_adc_isr_error_code(&ADCD1, ADC_ERR_OVERFLOW);
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}
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- /* TODO: Add here analog watchdog handling.*/
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+ if (sr & ADC_SR_AWD) {
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+ if (ADCD1.grpp != NULL) {
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+ _adc_isr_error_code(&ADCD1, ADC_ERR_WATCHDOG);
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+ }
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+ }
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#if defined(STM32_ADC_ADC1_IRQ_HOOK)
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STM32_ADC_ADC1_IRQ_HOOK
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#endif
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@@ -141,7 +145,11 @@ OSAL_IRQ_HANDLER(STM32_ADC_HANDLER) {
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if (ADCD2.grpp != NULL)
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_adc_isr_error_code(&ADCD2, ADC_ERR_OVERFLOW);
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}
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- /* TODO: Add here analog watchdog handling.*/
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+ if (sr & ADC_SR_AWD) {
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+ if (ADCD2.grpp != NULL) {
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+ _adc_isr_error_code(&ADCD2, ADC_ERR_WATCHDOG);
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+ }
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+ }
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#if defined(STM32_ADC_ADC2_IRQ_HOOK)
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STM32_ADC_ADC2_IRQ_HOOK
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#endif
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@@ -158,7 +166,11 @@ OSAL_IRQ_HANDLER(STM32_ADC_HANDLER) {
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if (ADCD3.grpp != NULL)
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_adc_isr_error_code(&ADCD3, ADC_ERR_OVERFLOW);
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}
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- /* TODO: Add here analog watchdog handling.*/
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+ if (sr & ADC_SR_AWD) {
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+ if (ADCD3.grpp != NULL) {
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+ _adc_isr_error_code(&ADCD3, ADC_ERR_WATCHDOG);
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+ }
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+ }
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#if defined(STM32_ADC_ADC3_IRQ_HOOK)
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STM32_ADC_ADC3_IRQ_HOOK
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#endif
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@@ -350,6 +362,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
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adcp->adc->SR = 0;
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adcp->adc->SMPR1 = grpp->smpr1;
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adcp->adc->SMPR2 = grpp->smpr2;
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+ adcp->adc->HTR = grpp->htr;
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+ adcp->adc->LTR = grpp->ltr;
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adcp->adc->SQR1 = grpp->sqr1 | ADC_SQR1_NUM_CH(grpp->num_channels);
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adcp->adc->SQR2 = grpp->sqr2;
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adcp->adc->SQR3 = grpp->sqr3;
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diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h
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index 13df506..fa266f0 100644
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--- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h
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+++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.h
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@@ -313,7 +313,8 @@ typedef uint16_t adc_channels_num_t;
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*/
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typedef enum {
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ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */
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- ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */
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+ ADC_ERR_OVERFLOW = 1, /**< ADC overflow condition. */
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+ ADC_ERR_WATCHDOG = 2 /**< ADC watchdog condition. */
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} adcerror_t;
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/**
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@@ -392,6 +393,16 @@ typedef struct {
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*/
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uint32_t smpr2;
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/**
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+ * @brief ADC watchdog high threshold register.
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+ * @details This field defines the high threshold of the analog watchdog.
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+ */
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+ uint16_t htr;
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+ /**
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+ * @brief ADC watchdog low threshold register.
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+ * @details This field defines the low threshold of the analog watchdog.
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+ */
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+ uint16_t ltr;
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+ /**
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* @brief ADC SQR1 register initialization data.
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* @details Conversion group sequence 13...16 + sequence length.
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*/
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@@ -531,6 +542,14 @@ struct ADCDriver {
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#define ADC_SMPR1_SMP_VBAT(n) ((n) << 24) /**< @brief VBAT sampling time. */
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/** @} */
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+/**
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+ * @name Threshold settings helper macros
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+ * @{
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+ */
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+#define ADC_HTR(n) ((n > ADC_HTR_HT) ? ADC_HTR_HT : n) /**< @brief High threshold limitation. */
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+#define ADC_LTR(n) ((n > ADC_LTR_LT) ? ADC_LTR_LT : n) /**< @brief Low threshold limitation. */
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+/** @} */
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+
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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--
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2.7.4
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