Statistics
| Branch: | Tag: | Revision:

amiro-os / unittests / periphery-lld / src / ut_alld_l3g4200d.c @ 7da800ab

History | View | Annotate | Download (11.106 KB)

1
/*
2
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
3
Copyright (C) 2016..2019  Thomas Schöpping et al.
4

5
This program is free software: you can redistribute it and/or modify
6
it under the terms of the GNU General Public License as published by
7
the Free Software Foundation, either version 3 of the License, or
8
(at your option) any later version.
9

10
This program is distributed in the hope that it will be useful,
11
but WITHOUT ANY WARRANTY; without even the implied warranty of
12
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
GNU General Public License for more details.
14

15
You should have received a copy of the GNU General Public License
16
along with this program.  If not, see <http://www.gnu.org/licenses/>.
17
*/
18

    
19
#include <ut_alld_l3g4200d.h>
20

    
21
#if ((AMIROOS_CFG_TESTS_ENABLE == true) && defined(AMIROLLD_CFG_USE_L3G4200D)) || defined(__DOXYGEN__)
22

    
23
/******************************************************************************/
24
/* LOCAL DEFINITIONS                                                          */
25
/******************************************************************************/
26

    
27
/******************************************************************************/
28
/* EXPORTED VARIABLES                                                         */
29
/******************************************************************************/
30

    
31
/******************************************************************************/
32
/* LOCAL TYPES                                                                */
33
/******************************************************************************/
34

    
35
/******************************************************************************/
36
/* LOCAL VARIABLES                                                            */
37
/******************************************************************************/
38

    
39
/******************************************************************************/
40
/* LOCAL FUNCTIONS                                                            */
41
/******************************************************************************/
42

    
43
/******************************************************************************/
44
/* EXPORTED FUNCTIONS                                                         */
45
/******************************************************************************/
46

    
47
/**
48
 * @brief   L3G4200D unit test function.
49
 *
50
 * @param[in] stream  Stream for input/output.
51
 * @param[in] ut      Unit test object.
52
 *
53
 * @return            Unit test result value.
54
 */
55
aos_utresult_t utAlldL3g4200dFunc(BaseSequentialStream* stream, aos_unittest_t* ut)
56
{
57
  aosDbgCheck(ut->data != NULL && ((ut_l3g4200ddata_t*)(ut->data)) != NULL);
58

    
59
  // local variables
60
  aos_utresult_t result = {0, 0};
61
  uint32_t status;
62
  uint8_t data = 0;
63
  uint8_t write_data[5];
64
  uint8_t read_data[5];
65
  int16_t sdata[3];
66
  uint8_t status_reg;
67
  eventmask_t event_mask;
68
  bool success = false;
69
  uint8_t fifo = 0x5F;
70
  event_listener_t el;
71

    
72
  for (uint8_t dataIdx = 0; dataIdx < 4; dataIdx++) {
73
    write_data[dataIdx] = (dataIdx+1)*11;
74
  }
75
  write_data[4] = 0;
76

    
77
  chprintf(stream, "check identity...\n");
78
  status = l3g4200d_lld_read_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd, L3G4200D_LLD_REGISTER_WHO_AM_I, &data, 1);
79
  if(status == APAL_STATUS_SUCCESS && data == L3G4200D_LLD_WHO_AM_I){
80
    aosUtPassed(stream, &result);
81
  } else {
82
    aosUtFailedMsg(stream, &result, "0x%08X, data: %d\n", status, data);
83
  }
84

    
85
  chprintf(stream, "write register...\n");
86
  status = l3g4200d_lld_write_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd, L3G4200D_LLD_REGISTER_CTRL_REG1, write_data, 1);
87
  if (status == APAL_STATUS_SUCCESS) {
88
    aosUtPassed(stream, &result);
89
  } else {
90
    aosUtFailed(stream, &result);
91
  }
92

    
93
  chprintf(stream, "read register...\n");
94
  status = l3g4200d_lld_read_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd, L3G4200D_LLD_REGISTER_CTRL_REG1, &data, 1);
95
  if (status == APAL_STATUS_SUCCESS && data == write_data[0]) {
96
    aosUtPassed(stream, &result);
97
  } else {
98
    aosUtFailedMsg(stream, &result, "0x%08X, data: %d\n", status, data);
99
  }
100

    
101
  chprintf(stream, "write multiple registers...\n");
102
  status = l3g4200d_lld_write_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd, L3G4200D_LLD_REGISTER_CTRL_REG1, write_data, 5);
103
  if (status == APAL_STATUS_SUCCESS) {
104
    aosUtPassed(stream, &result);
105
  } else {
106
    aosUtFailed(stream, &result);
107
  }
108

    
109
  chprintf(stream, "read multiple registers...\n");
110
  status = l3g4200d_lld_read_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd, L3G4200D_LLD_REGISTER_CTRL_REG1, read_data, 5);
111
  uint8_t errors = 0;
112
  for (uint8_t dataIdx = 0; dataIdx < 5; dataIdx++) {
113
    if (read_data[dataIdx] != write_data[dataIdx]) {
114
      ++errors;
115
    }
116
  }
117
  if (status == APAL_STATUS_SUCCESS && errors == 0) {
118
    aosUtPassed(stream, &result);
119
  } else {
120
    for (uint8_t dataIdx = 0; dataIdx < 5; dataIdx++) {
121
      chprintf(stream, "\t\tStatus: %d, CTRL_REG%d: %d, write_data: %d\n", status, dataIdx+1, read_data[dataIdx], write_data[dataIdx]);
122
    }
123
    aosUtFailedMsg(stream, &result, "0x%08X, errors: %d\n", status, errors);
124
  }
125

    
126
  chprintf(stream, "read config...\n");
127
  l3g4200d_lld_cfg_t cfg;
128
  status = l3g4200d_lld_read_config(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &cfg);
129
  if (status == APAL_STATUS_SUCCESS) {
130
    aosUtPassed(stream, &result);
131
  } else {
132
    aosUtFailed(stream, &result);
133
  }
134

    
135
  chprintf(stream, "write config...\n");
136
  cfg.registers.ctrl_reg1 = L3G4200D_LLD_PD | L3G4200D_LLD_DR_100_HZ | L3G4200D_LLD_BW_12_5 | L3G4200D_LLD_ZEN | L3G4200D_LLD_YEN | L3G4200D_LLD_XEN;
137
  //cfg.registers.ctrl_reg1 = L3G4200D_LLD_PD | L3G4200D_LLD_DR_800_HZ | L3G4200D_LLD_BW_20 | L3G4200D_LLD_ZEN | L3G4200D_LLD_YEN | L3G4200D_LLD_XEN;
138
  cfg.registers.ctrl_reg3 = 0x07;
139
  cfg.registers.ctrl_reg5 |= L3G4200D_LLD_FIFO_EN;
140
  status = l3g4200d_lld_write_config(((ut_l3g4200ddata_t*)(ut->data))->l3gd, cfg);
141
  uint8_t reg1 = cfg.data[0];
142
  status |= l3g4200d_lld_read_config(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &cfg);
143
  if (status == APAL_STATUS_SUCCESS && cfg.data[0] == reg1) {
144
    aosUtPassed(stream, &result);
145
  } else {
146
    aosUtFailed(stream, &result);
147
  }
148

    
149
  chprintf(stream, "read gyro data for five seconds...\n");
150
  status = APAL_STATUS_OK;
151
  for (uint8_t i = 0; i < 5; ++i) {
152
    status |= l3g4200d_lld_read_all_data(((ut_l3g4200ddata_t*)(ut->data))->l3gd, sdata, &cfg);
153
    chprintf(stream, "\t\tX = %6d\tY = %6d\tZ = %6d\n", sdata[0], sdata[1], sdata[2]);
154
    aosThdSSleep(1);
155
  }
156
  if (status == APAL_STATUS_SUCCESS) {
157
    aosUtPassed(stream, &result);
158
  } else {
159
    aosUtFailed(stream, &result);
160
  }
161

    
162
  chprintf(stream, "read X axis for five seconds...\n");
163
  status = APAL_STATUS_SUCCESS;
164
  for (uint32_t i = 0; i <= 5; i++) {
165
    status |= l3g4200d_lld_read_data(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &(sdata[0]), L3G4200D_LLD_X_AXIS, &cfg);
166
    chprintf(stream, "\t\tX = %6d\n", sdata[0]);
167
    aosThdSSleep(1);
168
  }
169
  if (status == APAL_STATUS_SUCCESS) {
170
    aosUtPassed(stream, &result);
171
  } else {
172
    aosUtFailed(stream, &result);
173
  }
174

    
175
  chprintf(stream, "read Y axis for five seconds...\n");
176
  status = APAL_STATUS_SUCCESS;
177
  for (uint32_t i = 0; i <= 5; i++) {
178
    status |= l3g4200d_lld_read_data(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &(sdata[0]), L3G4200D_LLD_Y_AXIS, &cfg);
179
    chprintf(stream, "\t\tY = %6d\n", sdata[0]);
180
    aosThdSSleep(1);
181
  }
182
  if (status == APAL_STATUS_SUCCESS) {
183
    aosUtPassed(stream, &result);
184
  } else {
185
    aosUtFailed(stream, &result);
186
  }
187

    
188
  chprintf(stream, "read Z axis for five seconds...\n");
189
  status = APAL_STATUS_SUCCESS;
190
  for (uint32_t i = 0; i <= 5; i++) {
191
    status |= l3g4200d_lld_read_data(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &(sdata[0]), L3G4200D_LLD_Z_AXIS, &cfg);
192
    chprintf(stream, "\t\tZ = %6d\n", sdata[0]);
193
    aosThdSSleep(1);
194
  }
195
  if (status == APAL_STATUS_SUCCESS) {
196
    aosUtPassed(stream, &result);
197
  } else {
198
    aosUtFailed(stream, &result);
199
  }
200
  aosThdMSleep(10);
201

    
202
  chprintf(stream, "read status register...\n");
203
  status = l3g4200d_lld_read_status_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &status_reg);
204
  if (status == APAL_STATUS_SUCCESS) {
205
    aosUtPassed(stream, &result);
206
  } else {
207
    aosUtFailed(stream, &result);
208
  }
209

    
210
  chprintf(stream, "read interrupt config...\n");
211
  l3g4200d_lld_int_cfg_t int_cfg;
212
  status = l3g4200d_lld_read_int_config(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &int_cfg);
213
  if (status == APAL_STATUS_SUCCESS) {
214
    aosUtPassed(stream, &result);
215
  } else {
216
    aosUtFailed(stream, &result);
217
  }
218

    
219
  chprintf(stream, "write interrupt config...\n");
220
  int_cfg.registers.int1_tsh_xh = 10;
221
  status = l3g4200d_lld_write_int_config(((ut_l3g4200ddata_t*)(ut->data))->l3gd, int_cfg);
222
  l3g4200d_lld_int_cfg_t int_cfg2;
223
  status |= l3g4200d_lld_read_int_config(((ut_l3g4200ddata_t*)(ut->data))->l3gd, &int_cfg2);
224
  if (status == APAL_STATUS_SUCCESS && int_cfg.registers.int1_tsh_xh == 10) {
225
    aosUtPassed(stream, &result);
226
  } else {
227
    aosUtFailed(stream, &result);
228
  }
229

    
230
  chprintf(stream, "interrupt test: read fifo until empty...\n");
231
  chEvtRegister(((ut_l3g4200ddata_t*)(ut->data))->src, &el, 0);
232
  status = l3g4200d_lld_write_fifo_ctrl_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd,fifo);
233
  fifo = 0;
234
  status |= l3g4200d_lld_read_fifo_ctrl_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd,&fifo);
235
  status |= l3g4200d_lld_read_all_data(((ut_l3g4200ddata_t*)(ut->data))->l3gd, sdata, &cfg);
236
  chEvtGetAndClearFlags(&el);
237
  aosThdSSleep(1);
238
  chEvtGetAndClearFlags(&el);
239
  success = false;
240
  for (uint8_t i = 0; i < 200; i++) {
241
    status |= l3g4200d_lld_read_all_data(((ut_l3g4200ddata_t*)(ut->data))->l3gd, sdata, &cfg);
242
    event_mask = chEvtWaitAnyTimeout(~0, TIME_IMMEDIATE);
243
    status |= l3g4200d_lld_read_fifo_src_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd,&fifo);
244
    if (event_mask != 0 && ((fifo & L3G4200D_LLD_EMPTY) || fifo == 0)) {
245
      success = true;
246
      break;
247
    }
248
    aosThdMSleep(1);
249
  }
250
  if (status == APAL_STATUS_SUCCESS && success) {
251
    aosUtPassed(stream, &result);
252
  } else {
253
    aosUtFailed(stream, &result);
254
  }
255

    
256
  fifo = 0x4A;
257
  status |= l3g4200d_lld_write_fifo_ctrl_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd,fifo);
258
  cfg.registers.ctrl_reg1 = L3G4200D_LLD_PD | L3G4200D_LLD_DR_800_HZ | L3G4200D_LLD_BW_20 | L3G4200D_LLD_ZEN | L3G4200D_LLD_YEN | L3G4200D_LLD_XEN;
259
  cfg.registers.ctrl_reg3 = 0x04;
260
  status |= l3g4200d_lld_write_config(((ut_l3g4200ddata_t*)(ut->data))->l3gd, cfg);
261
  chprintf(stream, "interrupt test: wait until wtm reached...\n");
262
  for (uint8_t i = 0; i < 200; i++) {
263
    status |= l3g4200d_lld_read_all_data(((ut_l3g4200ddata_t*)(ut->data))->l3gd, sdata, &cfg);
264
    event_mask = chEvtWaitAnyTimeout(~0, TIME_IMMEDIATE);
265
    status |= l3g4200d_lld_read_fifo_src_register(((ut_l3g4200ddata_t*)(ut->data))->l3gd,&fifo);
266
    if (event_mask != 0 && (fifo & L3G4200D_LLD_WTM)) {
267
      success = true;
268
      break;
269
    }
270
    aosThdMSleep(10);
271
  }
272
  if (status == APAL_STATUS_SUCCESS && success) {
273
    aosUtPassed(stream, &result);
274
  } else {
275
    aosUtFailed(stream, &result);
276
  }
277

    
278
  chEvtUnregister(((ut_l3g4200ddata_t*)(ut->data))->src, &el);
279
  aosThdMSleep(10);
280

    
281
  aosUtInfoMsg(stream, "driver object memory footprint: %u bytes\n", sizeof(L3G4200DDriver));
282

    
283
  return result;
284
}
285

    
286
#endif /* (AMIROOS_CFG_TESTS_ENABLE == true) && defined(AMIROLLD_CFG_USE_L3G4200D) */
287

    
288