amiro-os / patches / 0006-STM32F4xx-ADC-add-AWD-support.patch @ 84b4c632
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1 | 58fe0e0b | Thomas Schöpping | From: Thomas SCHÖPPING <tschoepp@techfak.uni-bielefeld.de>
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2 | Date: Wed, 3 Mar 2015 15:43:17 +0200
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3 | Subject: [PATCH] STM32F4xx: added support for the ADC analog watchdog
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4 | |||
5 | Signed-off-by: Thomas SCHÖPPING <tschoepp@techfak.uni-bielefeld.de>
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6 | ---
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7 | diff --git a/os/hal/platforms/STM32F4xx/adc_lld.c b/os/hal/platforms/STM32F4xx/adc_lld.c
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8 | index e5de44a..5495649 100644
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9 | --- a/os/hal/platforms/STM32F4xx/adc_lld.c
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10 | +++ b/os/hal/platforms/STM32F4xx/adc_lld.c
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11 | @@ -124,7 +124,10 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
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12 | if (ADCD1.grpp != NULL) |
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13 | _adc_isr_error_code(&ADCD1, ADC_ERR_OVERFLOW); |
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14 | } |
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15 | - /* TODO: Add here analog watchdog handling.*/
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16 | + if (sr & ADC_SR_AWD) {
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17 | + if (ADCD1.grpp != NULL)
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18 | + _adc_isr_error_code(&ADCD1, ADC_ERR_WATCHDOG);
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19 | + }
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20 | #endif /* STM32_ADC_USE_ADC1 */ |
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21 | |||
22 | #if STM32_ADC_USE_ADC2
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23 | @@ -138,7 +141,10 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
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24 | if (ADCD2.grpp != NULL) |
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25 | _adc_isr_error_code(&ADCD2, ADC_ERR_OVERFLOW); |
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26 | } |
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27 | - /* TODO: Add here analog watchdog handling.*/
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28 | + if (sr & ADC_SR_AWD) {
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29 | + if (ADCD1.grpp != NULL)
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30 | + _adc_isr_error_code(&ADCD2, ADC_ERR_WATCHDOG);
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31 | + }
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32 | #endif /* STM32_ADC_USE_ADC2 */ |
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33 | |||
34 | #if STM32_ADC_USE_ADC3
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35 | @@ -152,7 +158,10 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
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36 | if (ADCD3.grpp != NULL) |
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37 | _adc_isr_error_code(&ADCD3, ADC_ERR_OVERFLOW); |
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38 | } |
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39 | - /* TODO: Add here analog watchdog handling.*/
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40 | + if (sr & ADC_SR_AWD) {
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41 | + if (ADCD1.grpp != NULL)
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42 | + _adc_isr_error_code(&ADCD3, ADC_ERR_WATCHDOG);
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43 | + }
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44 | #endif /* STM32_ADC_USE_ADC3 */ |
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45 | |||
46 | CH_IRQ_EPILOGUE(); |
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47 | @@ -340,6 +349,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) { |
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48 | adcp->adc->SR = 0;
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49 | adcp->adc->SMPR1 = grpp->smpr1; |
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50 | adcp->adc->SMPR2 = grpp->smpr2; |
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51 | + adcp->adc->HTR = grpp->htr;
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52 | + adcp->adc->LTR = grpp->ltr;
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53 | adcp->adc->SQR1 = grpp->sqr1; |
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54 | adcp->adc->SQR2 = grpp->sqr2; |
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55 | adcp->adc->SQR3 = grpp->sqr3; |
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56 | diff --git a/os/hal/platforms/STM32F4xx/adc_lld.h b/os/hal/platforms/STM32F4xx/adc_lld.h
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57 | index 7cda791..be81ed3 100644
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58 | --- a/os/hal/platforms/STM32F4xx/adc_lld.h
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59 | +++ b/os/hal/platforms/STM32F4xx/adc_lld.h
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60 | @@ -306,7 +306,8 @@ typedef uint16_t adc_channels_num_t; |
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61 | */ |
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62 | typedef enum { |
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63 | ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */ |
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64 | - ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */
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65 | + ADC_ERR_OVERFLOW = 1, /**< ADC overflow condition. */
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66 | + ADC_ERR_WATCHDOG = 2 /**< ADC watchdog condition. */
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67 | } adcerror_t; |
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68 | |||
69 | /**
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70 | @@ -385,6 +386,16 @@ typedef struct { |
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71 | */ |
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72 | uint32_t smpr2; |
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73 | /**
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74 | + * @brief ADC watchdog higher threshold register.
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75 | + * @details This filed defines the higher threshold for the analog watchdog.
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76 | + */
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77 | + uint16_t htr;
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78 | + /**
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79 | + * @brief ADC watchdog lower threshold register.
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80 | + * @details This filed defines the lower threshold for the analog watchdog.
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81 | + */
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82 | + uint16_t ltr;
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83 | + /**
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84 | * @brief ADC SQR1 register initialization data. |
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85 | * @details Conversion group sequence 13...16 + sequence length. |
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86 | */ |
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87 | @@ -528,6 +539,14 @@ struct ADCDriver { |
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88 | #define ADC_SMPR1_SMP_VBAT(n) ((n) << 24) /**< @brief VBAT sampling time. */ |
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89 | /** @} */
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90 | |||
91 | +/**
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92 | + * @name Threshold settings helper macros
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93 | + * @{
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94 | + */
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95 | +#define ADC_HTR(n) ((n > ADC_HTR_HT) ? ADC_HTR_HT : n) /**< @brief higher threshold limitation */
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96 | +#define ADC_LTR(n) ((n > ADC_LTR_LT) ? ADC_LTR_LT : n) /**< @brief lower threshold limitation */
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97 | +/** @} */
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98 | +
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99 | /*===========================================================================*/
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100 | /* External declarations. */
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101 | /*===========================================================================*/ |