amiro-os / include / amiro / radio / a2500r24a.hpp @ 84b4c632
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#ifndef A2500R24A_HPP_
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#define A2500R24A_HPP_
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#include <ch.hpp> |
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namespace amiro {
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class HWSPIDriver; |
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class A2500R24A : public chibios_rt::BaseStaticThread<256> { |
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public:
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struct A2500R24AConfig {
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}; |
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/**
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* Return types of getCheck()
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*/
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enum {
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CHECK_OK = 0x00u,
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CHECK_FAIL = 0x01u,
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}; |
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//private:
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struct registers {
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uint8_t IOCFG2; |
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uint8_t IOCFG1; |
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uint8_t IOCFG0; |
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uint8_t FIFOTHR; |
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uint8_t SYNC1; |
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uint8_t SYNC0; |
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uint8_t PKTLEN; |
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uint8_t PKTCTRL1; |
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uint8_t PKTCTRL0; |
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uint8_t ADDR; |
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uint8_t CHANNR; |
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uint8_t FSCTRL1; |
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uint8_t FSCTRL0; |
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uint8_t FREQ2; |
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uint8_t FREQ1; |
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uint8_t FREQ0; |
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uint8_t MDMCFG4; |
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uint8_t MDMCFG3; |
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uint8_t MDMCFG2; |
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uint8_t MDMCFG1; |
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uint8_t MDMCFG0; |
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uint8_t DEVIATN; |
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uint8_t MCSM2; |
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uint8_t MCSM1; |
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uint8_t MCSM0; |
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uint8_t FOCCFG; |
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uint8_t BSCFG; |
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uint8_t AGCCTRL2; |
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uint8_t AGCCTRL1; |
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uint8_t AGCCTRL0; |
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uint8_t WOREVT1; |
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uint8_t WOREVT0; |
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uint8_t WORCTRL; |
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uint8_t FREND1; |
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uint8_t FREND0; |
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uint8_t FSCAL3; |
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uint8_t FSCAL2; |
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uint8_t FSCAL1; |
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uint8_t FSCAL0; |
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uint8_t RCCTRL1; |
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uint8_t RCCTRL0; |
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uint8_t FSTEST; |
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uint8_t PTEST; |
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uint8_t AGCTEST; |
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uint8_t TEST2; |
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uint8_t TEST1; |
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uint8_t TEST0; |
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uint8_t reserved_0x2F; |
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}__attribute__((packed)); |
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struct registerStrobe {
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uint8_t configurationRegister[offsetof(A2500R24A::registers, reserved_0x2F)+1];
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uint8_t SRES; |
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uint8_t SFSTXON; |
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uint8_t SXOFF; |
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uint8_t SCAL; |
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uint8_t SRX; |
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uint8_t STX; |
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uint8_t SIDLE; |
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uint8_t reserved_0x37; |
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uint8_t SWOR; |
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uint8_t SPWD; |
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uint8_t SFRX; |
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uint8_t SFTX; |
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uint8_t SWORRST; |
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uint8_t SNOP; |
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uint8_t PATABLE; |
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uint8_t RX_TX_FIFO; |
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}__attribute__((packed)); |
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struct registerStatus {
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uint8_t configurationRegister[offsetof(A2500R24A::registers, reserved_0x2F)+1];
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uint8_t PARTNUM; |
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uint8_t VERSION; |
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uint8_t FREQEST; |
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uint8_t LQI; |
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uint8_t RSSI; |
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uint8_t MARCSTATE; |
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uint8_t WORTIME1; |
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uint8_t WORTIME0; |
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uint8_t PKTSTATUS; |
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uint8_t VCO_VC_DAC; |
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uint8_t TXBYTES; |
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uint8_t RXBYTES; |
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uint8_t RCCTRL1_STATUS; |
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uint8_t RCCTRL0_STATUS; |
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}__attribute__((packed)); |
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enum {
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A2500R24A_PARTNUM = 0x80u,
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A2500R24A_VERSION = 0x03u,
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}; |
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enum {
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// For register access below address 0x30 the burst mode is available
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// to read multiple bytes
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SPI_BURST_ENA = 0x40u,
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SPI_BURST_DIS = 0x00u,
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// For addresses above (and including) 0x30 either the status or strobe access
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// has to be choosen, instead of burst mode
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SPI_STATUS_ACCESS = 0x40u,
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SPI_STROBE_ACCESS = 0x00u,
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// Read or write the register address
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SPI_READ = 0x80u,
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SPI_WRITE = 0x00u,
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}; |
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public:
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A2500R24A(HWSPIDriver* driver); |
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virtual ~A2500R24A();
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chibios_rt::EvtSource* getEventSource(); |
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msg_t configure(A2500R24AConfig* config); |
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/**
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* Check the presence of the radio chip by reading
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* the identifier register and comparing it to the standard
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* value
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*/
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uint8_t getCheck(); |
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protected:
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virtual msg_t main();
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private:
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inline void updateSensorData(); |
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private:
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HWSPIDriver* driver; |
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chibios_rt::EvtSource eventSource; |
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}; |
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} /* amiro */
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#endif /* A2500R24A_HPP_ */ |