amiro-os / os / hal / ports / rules_data.ld @ 9461fadc
History | View | Annotate | Download (6.832 KB)
1 |
/* |
---|---|
2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
3 |
Copyright (C) 2016..2018 Thomas Schöpping et al. |
4 |
|
5 |
This program is free software: you can redistribute it and/or modify |
6 |
it under the terms of the GNU General Public License as published by |
7 |
the Free Software Foundation, either version 3 of the License, or |
8 |
(at your option) any later version. |
9 |
|
10 |
This program is distributed in the hope that it will be useful, |
11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
13 |
GNU General Public License for more details. |
14 |
|
15 |
You should have received a copy of the GNU General Public License |
16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
17 |
*/ |
18 |
|
19 |
__ram0_start__ = ORIGIN(ram0); |
20 |
__ram0_size__ = LENGTH(ram0); |
21 |
__ram0_end__ = __ram0_start__ + __ram0_size__; |
22 |
__ram1_start__ = ORIGIN(ram1); |
23 |
__ram1_size__ = LENGTH(ram1); |
24 |
__ram1_end__ = __ram1_start__ + __ram1_size__; |
25 |
__ram2_start__ = ORIGIN(ram2); |
26 |
__ram2_size__ = LENGTH(ram2); |
27 |
__ram2_end__ = __ram2_start__ + __ram2_size__; |
28 |
__ram3_start__ = ORIGIN(ram3); |
29 |
__ram3_size__ = LENGTH(ram3); |
30 |
__ram3_end__ = __ram3_start__ + __ram3_size__; |
31 |
__ram4_start__ = ORIGIN(ram4); |
32 |
__ram4_size__ = LENGTH(ram4); |
33 |
__ram4_end__ = __ram4_start__ + __ram4_size__; |
34 |
__ram5_start__ = ORIGIN(ram5); |
35 |
__ram5_size__ = LENGTH(ram5); |
36 |
__ram5_end__ = __ram5_start__ + __ram5_size__; |
37 |
__ram6_start__ = ORIGIN(ram6); |
38 |
__ram6_size__ = LENGTH(ram6); |
39 |
__ram6_end__ = __ram6_start__ + __ram6_size__; |
40 |
__ram7_start__ = ORIGIN(ram7); |
41 |
__ram7_size__ = LENGTH(ram7); |
42 |
__ram7_end__ = __ram7_start__ + __ram7_size__; |
43 |
|
44 |
ENTRY(Reset_Handler) |
45 |
|
46 |
SECTIONS |
47 |
{ |
48 |
.data : ALIGN(4) |
49 |
{ |
50 |
. = ALIGN(4); |
51 |
PROVIDE(_textdata = LOADADDR(.data)); |
52 |
PROVIDE(_data = .); |
53 |
_textdata_start = LOADADDR(.data); |
54 |
_data_start = .; |
55 |
*(.data) |
56 |
*(.data.*) |
57 |
*(.ramtext) |
58 |
. = ALIGN(4); |
59 |
PROVIDE(_edata = .); |
60 |
_data_end = .; |
61 |
} > DATA_RAM AT > DATA_RAM_LMA |
62 |
|
63 |
.bss (NOLOAD) : ALIGN(4) |
64 |
{ |
65 |
. = ALIGN(4); |
66 |
_bss_start = .; |
67 |
*(.bss) |
68 |
*(.bss.*) |
69 |
*(COMMON) |
70 |
. = ALIGN(4); |
71 |
_bss_end = .; |
72 |
PROVIDE(end = .); |
73 |
} > BSS_RAM |
74 |
|
75 |
.ram0_init : ALIGN(4) |
76 |
{ |
77 |
. = ALIGN(4); |
78 |
__ram0_init_text__ = LOADADDR(.ram0_init); |
79 |
__ram0_init__ = .; |
80 |
KEEP(*(.ram0_init)) |
81 |
KEEP(*(.ram0_init.*)) |
82 |
. = ALIGN(4); |
83 |
} > ram0 AT > RAM_INIT_FLASH_LMA |
84 |
|
85 |
.ram0 (NOLOAD) : ALIGN(4) |
86 |
{ |
87 |
. = ALIGN(4); |
88 |
__ram0_clear__ = .; |
89 |
*(.ram0_clear) |
90 |
*(.ram0_clear.*) |
91 |
. = ALIGN(4); |
92 |
__ram0_noinit__ = .; |
93 |
*(.ram0) |
94 |
*(.ram0.*) |
95 |
. = ALIGN(4); |
96 |
__ram0_free__ = .; |
97 |
} > ram0 |
98 |
|
99 |
.ram1_init : ALIGN(4) |
100 |
{ |
101 |
. = ALIGN(4); |
102 |
__ram1_init_text__ = LOADADDR(.ram1_init); |
103 |
__ram1_init__ = .; |
104 |
KEEP(*(.ram1_init)) |
105 |
KEEP(*(.ram1_init.*)) |
106 |
. = ALIGN(4); |
107 |
} > ram1 AT > RAM_INIT_FLASH_LMA |
108 |
|
109 |
.ram1 (NOLOAD) : ALIGN(4) |
110 |
{ |
111 |
. = ALIGN(4); |
112 |
__ram1_clear__ = .; |
113 |
*(.ram1_clear) |
114 |
*(.ram1_clear.*) |
115 |
. = ALIGN(4); |
116 |
__ram1_noinit__ = .; |
117 |
*(.ram1) |
118 |
*(.ram1.*) |
119 |
. = ALIGN(4); |
120 |
__ram1_free__ = .; |
121 |
} > ram1 |
122 |
|
123 |
.ram2_init : ALIGN(4) |
124 |
{ |
125 |
. = ALIGN(4); |
126 |
__ram2_init_text__ = LOADADDR(.ram2_init); |
127 |
__ram2_init__ = .; |
128 |
KEEP(*(.ram2_init)) |
129 |
KEEP(*(.ram2_init.*)) |
130 |
. = ALIGN(4); |
131 |
} > ram2 AT > RAM_INIT_FLASH_LMA |
132 |
|
133 |
.ram2 (NOLOAD) : ALIGN(4) |
134 |
{ |
135 |
. = ALIGN(4); |
136 |
__ram2_clear__ = .; |
137 |
*(.ram2_clear) |
138 |
*(.ram2_clear.*) |
139 |
. = ALIGN(4); |
140 |
__ram2_noinit__ = .; |
141 |
*(.ram2) |
142 |
*(.ram2.*) |
143 |
. = ALIGN(4); |
144 |
__ram2_free__ = .; |
145 |
} > ram2 |
146 |
|
147 |
.ram3_init : ALIGN(4) |
148 |
{ |
149 |
. = ALIGN(4); |
150 |
__ram3_init_text__ = LOADADDR(.ram3_init); |
151 |
__ram3_init__ = .; |
152 |
KEEP(*(.ram3_init)) |
153 |
KEEP(*(.ram3_init.*)) |
154 |
. = ALIGN(4); |
155 |
} > ram3 AT > RAM_INIT_FLASH_LMA |
156 |
|
157 |
.ram3 (NOLOAD) : ALIGN(4) |
158 |
{ |
159 |
. = ALIGN(4); |
160 |
__ram3_clear__ = .; |
161 |
*(.ram3_clear) |
162 |
*(.ram3_clear.*) |
163 |
. = ALIGN(4); |
164 |
__ram3_noinit__ = .; |
165 |
*(.ram3) |
166 |
*(.ram3.*) |
167 |
. = ALIGN(4); |
168 |
__ram3_free__ = .; |
169 |
} > ram3 |
170 |
|
171 |
.ram4_init : ALIGN(4) |
172 |
{ |
173 |
. = ALIGN(4); |
174 |
__ram4_init_text__ = LOADADDR(.ram4_init); |
175 |
__ram4_init__ = .; |
176 |
KEEP(*(.ram4_init)) |
177 |
KEEP(*(.ram4_init.*)) |
178 |
. = ALIGN(4); |
179 |
} > ram4 AT > RAM_INIT_FLASH_LMA |
180 |
|
181 |
.ram4 (NOLOAD) : ALIGN(4) |
182 |
{ |
183 |
. = ALIGN(4); |
184 |
__ram4_clear__ = .; |
185 |
*(.ram4_clear) |
186 |
*(.ram4_clear.*) |
187 |
. = ALIGN(4); |
188 |
__ram4_noinit__ = .; |
189 |
*(.ram4) |
190 |
*(.ram4.*) |
191 |
. = ALIGN(4); |
192 |
__ram4_free__ = .; |
193 |
} > ram4 |
194 |
|
195 |
.ram5_init : ALIGN(4) |
196 |
{ |
197 |
. = ALIGN(4); |
198 |
__ram5_init_text__ = LOADADDR(.ram5_init); |
199 |
__ram5_init__ = .; |
200 |
KEEP(*(.ram5_init)) |
201 |
KEEP(*(.ram5_init.*)) |
202 |
. = ALIGN(4); |
203 |
} > ram5 AT > RAM_INIT_FLASH_LMA |
204 |
|
205 |
.ram5 (NOLOAD) : ALIGN(4) |
206 |
{ |
207 |
. = ALIGN(4); |
208 |
__ram5_clear__ = .; |
209 |
*(.ram5_clear) |
210 |
*(.ram5_clear.*) |
211 |
. = ALIGN(4); |
212 |
__ram5_noinit__ = .; |
213 |
*(.ram5) |
214 |
*(.ram5.*) |
215 |
. = ALIGN(4); |
216 |
__ram5_free__ = .; |
217 |
} > ram5 |
218 |
|
219 |
.ram6_init : ALIGN(4) |
220 |
{ |
221 |
. = ALIGN(4); |
222 |
__ram6_init_text__ = LOADADDR(.ram6_init); |
223 |
__ram6_init__ = .; |
224 |
KEEP(*(.ram6_init)) |
225 |
KEEP(*(.ram6_init.*)) |
226 |
. = ALIGN(4); |
227 |
} > ram6 AT > RAM_INIT_FLASH_LMA |
228 |
|
229 |
.ram6 (NOLOAD) : ALIGN(4) |
230 |
{ |
231 |
. = ALIGN(4); |
232 |
__ram6_clear__ = .; |
233 |
*(.ram6_clear) |
234 |
*(.ram6_clear.*) |
235 |
. = ALIGN(4); |
236 |
__ram6_noinit__ = .; |
237 |
*(.ram6) |
238 |
*(.ram6.*) |
239 |
. = ALIGN(4); |
240 |
__ram6_free__ = .; |
241 |
} > ram6 |
242 |
|
243 |
.ram7_init : ALIGN(4) |
244 |
{ |
245 |
. = ALIGN(4); |
246 |
__ram7_init_text__ = LOADADDR(.ram7_init); |
247 |
__ram7_init__ = .; |
248 |
KEEP(*(.ram7_init)) |
249 |
KEEP(*(.ram7_init.*)) |
250 |
. = ALIGN(4); |
251 |
} > ram7 AT > RAM_INIT_FLASH_LMA |
252 |
|
253 |
.ram7 (NOLOAD) : ALIGN(4) |
254 |
{ |
255 |
. = ALIGN(4); |
256 |
__ram7_clear__ = .; |
257 |
*(.ram7_clear) |
258 |
*(.ram7_clear.*) |
259 |
. = ALIGN(4); |
260 |
__ram7_noinit__ = .; |
261 |
*(.ram7) |
262 |
*(.ram7.*) |
263 |
. = ALIGN(4); |
264 |
__ram7_free__ = .; |
265 |
} > ram7 |
266 |
|
267 |
/* The default heap uses the (statically) unused part of a RAM section.*/ |
268 |
.heap (NOLOAD) : |
269 |
{ |
270 |
. = ALIGN(8); |
271 |
__heap_base__ = .; |
272 |
. = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); |
273 |
__heap_end__ = .; |
274 |
} > HEAP_RAM |
275 |
} |
276 |
|