amiro-os / modules / NUCLEO-F103RB / mcuconf.h @ 9487b4cd
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1 | f4da707a | Thomas Schöpping | /*
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2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License");
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5 | you may not use this file except in compliance with the License.
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6 | You may obtain a copy of the License at
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7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0
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9 | |||
10 | Unless required by applicable law or agreed to in writing, software
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11 | distributed under the License is distributed on an "AS IS" BASIS,
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12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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13 | See the License for the specific language governing permissions and
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14 | limitations under the License.
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15 | */
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16 | |||
17 | #ifndef MCUCONF_H
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18 | #define MCUCONF_H
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19 | |||
20 | #define STM32F103_MCUCONF
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21 | |||
22 | /*
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23 | * STM32F103 drivers configuration.
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24 | * The following settings override the default settings present in
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25 | * the various device driver implementation headers.
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26 | * Note that the settings for each driver only have effect if the whole
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27 | * driver is enabled in halconf.h.
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28 | *
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29 | * IRQ priorities:
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30 | * 15...0 Lowest...Highest.
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31 | *
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32 | * DMA priorities:
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33 | * 0...3 Lowest...Highest.
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34 | */
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35 | |||
36 | /*
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37 | * HAL driver system settings.
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38 | */
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39 | #define STM32_NO_INIT FALSE
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40 | #define STM32_HSI_ENABLED TRUE
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41 | #define STM32_LSI_ENABLED TRUE
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42 | #define STM32_HSE_ENABLED FALSE
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43 | #define STM32_LSE_ENABLED FALSE
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44 | #define STM32_SW STM32_SW_PLL
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45 | #define STM32_PLLSRC STM32_PLLSRC_HSI
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46 | #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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47 | #define STM32_PLLMUL_VALUE 12 |
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48 | #define STM32_HPRE STM32_HPRE_DIV1
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49 | #define STM32_PPRE1 STM32_PPRE1_DIV2
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50 | #define STM32_PPRE2 STM32_PPRE2_DIV2
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51 | #define STM32_ADCPRE STM32_ADCPRE_DIV4
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52 | #define STM32_USB_CLOCK_REQUIRED TRUE
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53 | #define STM32_USBPRE STM32_USBPRE_DIV1
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54 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
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55 | #define STM32_RTCSEL STM32_RTCSEL_LSI
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56 | #define STM32_PVD_ENABLE FALSE
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57 | #define STM32_PLS STM32_PLS_LEV0
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58 | |||
59 | /*
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60 | * IRQ system settings.
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61 | */
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62 | #define STM32_IRQ_EXTI0_PRIORITY 6 |
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63 | #define STM32_IRQ_EXTI1_PRIORITY 6 |
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64 | #define STM32_IRQ_EXTI2_PRIORITY 6 |
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65 | #define STM32_IRQ_EXTI3_PRIORITY 6 |
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66 | #define STM32_IRQ_EXTI4_PRIORITY 6 |
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67 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 |
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68 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 |
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69 | #define STM32_IRQ_EXTI16_PRIORITY 6 |
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70 | #define STM32_IRQ_EXTI17_PRIORITY 6 |
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71 | #define STM32_IRQ_EXTI18_PRIORITY 6 |
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72 | #define STM32_IRQ_EXTI19_PRIORITY 6 |
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73 | |||
74 | /*
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75 | * ADC driver system settings.
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76 | */
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77 | #define STM32_ADC_USE_ADC1 FALSE
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78 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 |
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79 | #define STM32_ADC_ADC1_IRQ_PRIORITY 6 |
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80 | |||
81 | /*
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82 | * CAN driver system settings.
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83 | */
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84 | #define STM32_CAN_USE_CAN1 FALSE
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85 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 |
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86 | |||
87 | /*
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88 | * GPT driver system settings.
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89 | */
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90 | #define STM32_GPT_USE_TIM1 FALSE
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91 | #define STM32_GPT_USE_TIM2 FALSE
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92 | #define STM32_GPT_USE_TIM3 FALSE
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93 | #define STM32_GPT_USE_TIM4 FALSE
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94 | #define STM32_GPT_USE_TIM5 FALSE
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95 | #define STM32_GPT_USE_TIM8 FALSE
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96 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 |
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97 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 |
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98 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 |
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99 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 |
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100 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 |
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101 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 |
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102 | |||
103 | /*
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104 | * I2C driver system settings.
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105 | */
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106 | #define STM32_I2C_USE_I2C1 FALSE
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107 | #define STM32_I2C_USE_I2C2 FALSE
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108 | #define STM32_I2C_BUSY_TIMEOUT 50 |
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109 | #define STM32_I2C_I2C1_IRQ_PRIORITY 5 |
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110 | #define STM32_I2C_I2C2_IRQ_PRIORITY 5 |
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111 | #define STM32_I2C_I2C1_DMA_PRIORITY 3 |
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112 | #define STM32_I2C_I2C2_DMA_PRIORITY 3 |
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113 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") |
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114 | |||
115 | /*
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116 | * ICU driver system settings.
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117 | */
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118 | #define STM32_ICU_USE_TIM1 FALSE
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119 | #define STM32_ICU_USE_TIM2 FALSE
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120 | #define STM32_ICU_USE_TIM3 FALSE
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121 | #define STM32_ICU_USE_TIM4 FALSE
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122 | #define STM32_ICU_USE_TIM5 FALSE
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123 | #define STM32_ICU_USE_TIM8 FALSE
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124 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 |
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125 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 |
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126 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 |
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127 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 |
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128 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 |
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129 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 |
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130 | |||
131 | /*
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132 | * PWM driver system settings.
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133 | */
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134 | #define STM32_PWM_USE_ADVANCED FALSE
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135 | #define STM32_PWM_USE_TIM1 FALSE
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136 | #define STM32_PWM_USE_TIM2 FALSE
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137 | #define STM32_PWM_USE_TIM3 FALSE
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138 | #define STM32_PWM_USE_TIM4 FALSE
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139 | #define STM32_PWM_USE_TIM5 FALSE
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140 | #define STM32_PWM_USE_TIM8 FALSE
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141 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 |
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142 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 |
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143 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 |
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144 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 |
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145 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 |
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146 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 |
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147 | |||
148 | /*
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149 | * RTC driver system settings.
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150 | */
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151 | #define STM32_RTC_IRQ_PRIORITY 15 |
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152 | |||
153 | /*
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154 | * SERIAL driver system settings.
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155 | */
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156 | #define STM32_SERIAL_USE_USART1 FALSE
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157 | #define STM32_SERIAL_USE_USART2 TRUE
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158 | #define STM32_SERIAL_USE_USART3 FALSE
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159 | #define STM32_SERIAL_USE_UART4 FALSE
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160 | #define STM32_SERIAL_USE_UART5 FALSE
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161 | #define STM32_SERIAL_USART1_PRIORITY 12 |
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162 | #define STM32_SERIAL_USART2_PRIORITY 12 |
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163 | #define STM32_SERIAL_USART3_PRIORITY 12 |
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164 | #define STM32_SERIAL_UART4_PRIORITY 12 |
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165 | #define STM32_SERIAL_UART5_PRIORITY 12 |
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166 | |||
167 | /*
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168 | * SPI driver system settings.
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169 | */
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170 | #define STM32_SPI_USE_SPI1 FALSE
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171 | #define STM32_SPI_USE_SPI2 FALSE
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172 | #define STM32_SPI_USE_SPI3 FALSE
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173 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 |
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174 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 |
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175 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 |
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176 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
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177 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
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178 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 |
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179 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") |
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180 | |||
181 | /*
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182 | * ST driver system settings.
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183 | */
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184 | #define STM32_ST_IRQ_PRIORITY 8 |
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185 | #define STM32_ST_USE_TIMER 2 |
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186 | |||
187 | /*
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188 | * UART driver system settings.
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189 | */
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190 | #define STM32_UART_USE_USART1 FALSE
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191 | #define STM32_UART_USE_USART2 FALSE
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192 | #define STM32_UART_USE_USART3 FALSE
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193 | #define STM32_UART_USART1_IRQ_PRIORITY 12 |
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194 | #define STM32_UART_USART2_IRQ_PRIORITY 12 |
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195 | #define STM32_UART_USART3_IRQ_PRIORITY 12 |
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196 | #define STM32_UART_USART1_DMA_PRIORITY 0 |
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197 | #define STM32_UART_USART2_DMA_PRIORITY 0 |
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198 | #define STM32_UART_USART3_DMA_PRIORITY 0 |
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199 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") |
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200 | |||
201 | /*
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202 | * USB driver system settings.
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203 | */
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204 | #define STM32_USB_USE_USB1 FALSE
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205 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
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206 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 |
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207 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 |
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208 | |||
209 | /*
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210 | * WDG driver system settings.
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211 | */
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212 | #define STM32_WDG_USE_IWDG FALSE
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213 | |||
214 | 7da800ab | Thomas Schöpping | /*
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215 | * QEI driver system settings.
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216 | */
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217 | #define STM32_QEI_USE_TIM1 FALSE
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218 | #define STM32_QEI_USE_TIM2 FALSE
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219 | #define STM32_QEI_USE_TIM3 FALSE
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220 | #define STM32_QEI_USE_TIM4 FALSE
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221 | #define STM32_QEI_USE_TIM5 FALSE
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222 | #define STM32_QEI_USE_TIM8 FALSE
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223 | |||
224 | f4da707a | Thomas Schöpping | #endif /* MCUCONF_H */ |