Revision a845d9eb modules/PowerManagement_1-2/module.c
| modules/PowerManagement_1-2/module.c | ||
|---|---|---|
| 672 | 672 |
/* I²C address */ AT42QT1050_LLD_I2C_ADDRSEL_LOW, |
| 673 | 673 |
}; |
| 674 | 674 |
|
| 675 |
VL53L0XDriver moduleLldProximity1 = {
|
|
| 676 |
{
|
|
| 677 |
/* I²C Driver */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR, |
|
| 678 |
/* I²C timeout */ TIME_INFINITE, |
|
| 679 |
|
|
| 680 |
/* VL53L0X_DevData_t */ |
|
| 681 |
{
|
|
| 682 |
/* VL53L0X_DMaxData_t */ |
|
| 683 |
{
|
|
| 684 |
/* AmbTuningWindowFactor_K */ 0, |
|
| 685 |
/* RetSignalAt0mm */ 0, |
|
| 686 |
|
|
| 687 |
}, |
|
| 688 |
/* Part2PartOffsetNVMMicroMeter */ 0, |
|
| 689 |
/* Part2PartOffsetAdjustmentNVMMicroMeter */ 0, |
|
| 690 |
/* VL53L0X_DeviceParameters_t */ |
|
| 691 |
{
|
|
| 692 |
/* VL53L0X_DeviceModes DeviceMode 0 == singleranging*/ 0, |
|
| 693 |
/* VL53L0X_HistogramModes HistogramMode 0=disable */ 0, |
|
| 694 |
/* MeasurementTimingBudgetMicroSeconds */ 0, |
|
| 695 |
/* InterMeasurementPeriodMilliSeconds */ 0, |
|
| 696 |
/* !! XTalkCompensationEnable */ 0, |
|
| 697 |
/* XTalkCompensationRangeMilliMeter */ 0, |
|
| 698 |
/* XTalkCompensationRateMegaCps */ 0, |
|
| 699 |
/* RangeOffsetMicroMeters */ 0, |
|
| 700 |
/* !! LimitChecksEnable */ 0, |
|
| 701 |
/* LimitChecksStatus */ 0, |
|
| 702 |
/* !! WrapAroundCheckEnable */ 0, |
|
| 703 |
|
|
| 704 |
}, |
|
| 705 |
/* VL53L0X_RangingMeasurementData_t */ |
|
| 706 |
{
|
|
| 707 |
/* TimeStamp */ 0, |
|
| 708 |
/* MeasurementTimeUsec */ 0, |
|
| 709 |
/* RangeMilliMeter */ 0, |
|
| 710 |
/* !! RangeDMaxMilliMeter */ 0, |
|
| 711 |
/* SignalRateRtnMegaCps */ 0, |
|
| 712 |
/* AmbientRateRtnMegaCps */ 0, |
|
| 713 |
/* EffectiveSpadRtnCount */ 0, |
|
| 714 |
/* ZoneId */ 0, |
|
| 715 |
/* RangeFractionalPart */ 0, |
|
| 716 |
/* RangeStatus */ 0, |
|
| 717 |
}, |
|
| 718 |
/* VL53L0X_HistogramMeasurementData_t */ |
|
| 719 |
{
|
|
| 720 |
/* HistogramData */ 0, |
|
| 721 |
/* HistogramType */ 0, |
|
| 722 |
/* FirstBin */ 0, |
|
| 723 |
/* BufferSize */ 0, |
|
| 724 |
/* NumberOfBins */ 0, |
|
| 725 |
/* VL53L0X_DeviceError ErrorStatus 0 == None_error */ 0, |
|
| 726 |
}, |
|
| 727 |
/* VL53L0X_DeviceSpecificParameters_t */ |
|
| 728 |
{
|
|
| 729 |
/* OscFrequencyMHz */ 0, |
|
| 730 |
/* LastEncodedTimeout */ 0, |
|
| 731 |
/* !! VL53L0X_GpioFunctionality Pin0GpioFunctionality 0==no interrupt */ 0, |
|
| 732 |
/* FinalRangeTimeoutMicroSecs */ 0, |
|
| 733 |
/* FinalRangeVcselPulsePeriod */ 0, |
|
| 734 |
/* PreRangeTimeoutMicroSecs */ 0, |
|
| 735 |
/* PreRangeVcselPulsePeriod */ 0, |
|
| 736 |
/* SigmaEstRefArray */ 0, |
|
| 737 |
/* SigmaEstEffPulseWidth */ 0, |
|
| 738 |
/* SigmaEstEffAmbWidth */ 0, |
|
| 739 |
/* ReadDataFromDeviceDone 0 == read from device was not done */ 0, |
|
| 740 |
/* ModuleId */ 0, |
|
| 741 |
/* Revision */ 0, |
|
| 742 |
/* ProductId */ "0", |
|
| 743 |
/* !! ReferenceSpadCount */ 0, |
|
| 744 |
/* !! ReferenceSpadType */ 0, |
|
| 745 |
/* RefSpadsInitialised */ 0, |
|
| 746 |
/* PartUIDUpper */ 0, |
|
| 747 |
/* PartUIDLower */ 0, |
|
| 748 |
/* SignalRateMeasFixed400mm */ 0, |
|
| 749 |
}, |
|
| 750 |
/* VL53L0X_SpadData_t */ |
|
| 751 |
{
|
|
| 752 |
/* RefSpadEnables */ 0, |
|
| 753 |
/* RefGoodSpadMap */ 0, |
|
| 754 |
|
|
| 755 |
}, |
|
| 756 |
/* SequenceConfig */ 0, |
|
| 757 |
/* !! RangeFractionalEnable */ 0, |
|
| 758 |
/* VL53L0X_State PalState */ 0, |
|
| 759 |
/* !! VL53L0X_PowerModes PowerMode 0==VL53L0X_POWERMODE_STANDBY_LEVEL1 */ 0, |
|
| 760 |
/* SigmaEstRefArray */ 0, |
|
| 761 |
/* SigmaEstEffPulseWidth */ 0, |
|
| 762 |
/* SigmaEstEffAmbWidth */ 0, |
|
| 763 |
/* StopVariable */ 0, |
|
| 764 |
/* targetRefRate */ 0, |
|
| 765 |
/* SigmaEstimate */ 0, |
|
| 766 |
/* SignalEstimate */0 , |
|
| 767 |
/* LastSignalRefMcps */ 0, |
|
| 768 |
/* *pTuningSettingsPointer */ 0, |
|
| 769 |
/* UseInternalTuningSettings */ 0, |
|
| 770 |
/* LinearityCorrectiveGain */ 0, |
|
| 771 |
/* !! DmaxCalRangeMilliMeter */ 0, |
|
| 772 |
/* DmaxCalSignalRateRtnMegaCps */ 0, |
|
| 773 |
}, |
|
| 774 |
/* I²C address */ VL53L0X_LLD_I2C_ADDR, |
|
| 775 |
/* COMM TYPE*/ 1, |
|
| 776 |
/* COMM SPEED*/ 1, |
|
| 777 |
}, |
|
| 778 |
}; |
|
| 779 |
|
|
| 780 |
VL53L0XDriver moduleLldProximity2 = {
|
|
| 781 |
{
|
|
| 782 |
/* I²C Driver */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT, |
|
| 783 |
/* I²C timeout */ TIME_INFINITE, |
|
| 784 |
|
|
| 785 |
/* VL53L0X_DevData_t */ |
|
| 786 |
{
|
|
| 787 |
/* VL53L0X_DMaxData_t */ |
|
| 788 |
{
|
|
| 789 |
/* AmbTuningWindowFactor_K */ 0, |
|
| 790 |
/* RetSignalAt0mm */ 0, |
|
| 791 |
|
|
| 792 |
}, |
|
| 793 |
/* Part2PartOffsetNVMMicroMeter */ 0, |
|
| 794 |
/* Part2PartOffsetAdjustmentNVMMicroMeter */ 0, |
|
| 795 |
/* VL53L0X_DeviceParameters_t */ |
|
| 796 |
{
|
|
| 797 |
/* VL53L0X_DeviceModes DeviceMode 0 == singleranging*/ 0, |
|
| 798 |
/* VL53L0X_HistogramModes HistogramMode 0=disable */ 0, |
|
| 799 |
/* MeasurementTimingBudgetMicroSeconds */ 0, |
|
| 800 |
/* InterMeasurementPeriodMilliSeconds */ 0, |
|
| 801 |
/* !! XTalkCompensationEnable */ 0, |
|
| 802 |
/* XTalkCompensationRangeMilliMeter */ 0, |
|
| 803 |
/* XTalkCompensationRateMegaCps */ 0, |
|
| 804 |
/* RangeOffsetMicroMeters */ 0, |
|
| 805 |
/* !! LimitChecksEnable */ 0, |
|
| 806 |
/* LimitChecksStatus */ 0, |
|
| 807 |
/* !! WrapAroundCheckEnable */ 0, |
|
| 808 |
|
|
| 809 |
}, |
|
| 810 |
/* VL53L0X_RangingMeasurementData_t */ |
|
| 811 |
{
|
|
| 812 |
/* TimeStamp */ 0, |
|
| 813 |
/* MeasurementTimeUsec */ 0, |
|
| 814 |
/* RangeMilliMeter */ 0, |
|
| 815 |
/* !! RangeDMaxMilliMeter */ 0, |
|
| 816 |
/* SignalRateRtnMegaCps */ 0, |
|
| 817 |
/* AmbientRateRtnMegaCps */ 0, |
|
| 818 |
/* EffectiveSpadRtnCount */ 0, |
|
| 819 |
/* ZoneId */ 0, |
|
| 820 |
/* RangeFractionalPart */ 0, |
|
| 821 |
/* RangeStatus */ 0, |
|
| 822 |
}, |
|
| 823 |
/* VL53L0X_HistogramMeasurementData_t */ |
|
| 824 |
{
|
|
| 825 |
/* HistogramData */ 0, |
|
| 826 |
/* HistogramType */ 0, |
|
| 827 |
/* FirstBin */ 0, |
|
| 828 |
/* BufferSize */ 0, |
|
| 829 |
/* NumberOfBins */ 0, |
|
| 830 |
/* VL53L0X_DeviceError ErrorStatus 0 == None_error */ 0, |
|
| 831 |
}, |
|
| 832 |
/* VL53L0X_DeviceSpecificParameters_t */ |
|
| 833 |
{
|
|
| 834 |
/* OscFrequencyMHz */ 0, |
|
| 835 |
/* LastEncodedTimeout */ 0, |
|
| 836 |
/* !! VL53L0X_GpioFunctionality Pin0GpioFunctionality 0==no interrupt */ 0, |
|
| 837 |
/* FinalRangeTimeoutMicroSecs */ 0, |
|
| 838 |
/* FinalRangeVcselPulsePeriod */ 0, |
|
| 839 |
/* PreRangeTimeoutMicroSecs */ 0, |
|
| 840 |
/* PreRangeVcselPulsePeriod */ 0, |
|
| 841 |
/* SigmaEstRefArray */ 0, |
|
| 842 |
/* SigmaEstEffPulseWidth */ 0, |
|
| 843 |
/* SigmaEstEffAmbWidth */ 0, |
|
| 844 |
/* ReadDataFromDeviceDone 0 == read from device was not done */ 0, |
|
| 845 |
/* ModuleId */ 0, |
|
| 846 |
/* Revision */ 0, |
|
| 847 |
/* ProductId */ "0", |
|
| 848 |
/* !! ReferenceSpadCount */ 0, |
|
| 849 |
/* !! ReferenceSpadType */ 0, |
|
| 850 |
/* RefSpadsInitialised */ 0, |
|
| 851 |
/* PartUIDUpper */ 0, |
|
| 852 |
/* PartUIDLower */ 0, |
|
| 853 |
/* SignalRateMeasFixed400mm */ 0, |
|
| 854 |
}, |
|
| 855 |
/* VL53L0X_SpadData_t */ |
|
| 856 |
{
|
|
| 857 |
/* RefSpadEnables */ 0, |
|
| 858 |
/* RefGoodSpadMap */ 0, |
|
| 859 |
|
|
| 860 |
}, |
|
| 861 |
/* SequenceConfig */ 0, |
|
| 862 |
/* !! RangeFractionalEnable */ 0, |
|
| 863 |
/* VL53L0X_State PalState */ 0, |
|
| 864 |
/* !! VL53L0X_PowerModes PowerMode 0==VL53L0X_POWERMODE_STANDBY_LEVEL1 */ 0, |
|
| 865 |
/* SigmaEstRefArray */ 0, |
|
| 866 |
/* SigmaEstEffPulseWidth */ 0, |
|
| 867 |
/* SigmaEstEffAmbWidth */ 0, |
|
| 868 |
/* StopVariable */ 0, |
|
| 869 |
/* targetRefRate */ 0, |
|
| 870 |
/* SigmaEstimate */ 0, |
|
| 871 |
/* SignalEstimate */0 , |
|
| 872 |
/* LastSignalRefMcps */ 0, |
|
| 873 |
/* *pTuningSettingsPointer */ 0, |
|
| 874 |
/* UseInternalTuningSettings */ 0, |
|
| 875 |
/* LinearityCorrectiveGain */ 0, |
|
| 876 |
/* !! DmaxCalRangeMilliMeter */ 0, |
|
| 877 |
/* DmaxCalSignalRateRtnMegaCps */ 0, |
|
| 878 |
}, |
|
| 879 |
/* I²C address */ VL53L0X_LLD_I2C_ADDR, |
|
| 880 |
/* COMM TYPE*/ 1, |
|
| 881 |
/* COMM SPEED*/ 1, |
|
| 882 |
}, |
|
| 883 |
}; |
|
| 884 |
|
|
| 885 |
|
|
| 675 | 886 |
#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */ |
| 676 | 887 |
|
| 677 | 888 |
#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__) |
| ... | ... | |
| 1383 | 1594 |
/* data */ &_utAlldAt42qt1050Data, |
| 1384 | 1595 |
}; |
| 1385 | 1596 |
|
| 1597 |
/* VL53L0X (proximity sensor) */ |
|
| 1598 |
static int _utShellCmdCb_AlldVL53L0X(BaseSequentialStream* stream, int argc, char* argv[]) |
|
| 1599 |
{
|
|
| 1600 |
|
|
| 1601 |
|
|
| 1602 |
// first GPIO-Extender (the first 4 areas) |
|
| 1603 |
PCAL6524Driver* mux1 = NULL; |
|
| 1604 |
// second GPRO-Extender (the last 4 areas) |
|
| 1605 |
PCAL6524Driver* mux2 = NULL; |
|
| 1606 |
uint32_t status; |
|
| 1607 |
uint8_t buffer[2]; |
|
| 1608 |
mux1 = &moduleLldGpioExtender1; |
|
| 1609 |
mux2 = &moduleLldGpioExtender2; |
|
| 1610 |
|
|
| 1611 |
// set the XHUT Pins (P0_0 ... P0_7 P1_0 ... P1_3 ) from first GPIO-Extender to LOW (Pull-down) |
|
| 1612 |
// first set Pull-up/pull-down enable register port to 1 |
|
| 1613 |
status = pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1614 |
// second set Pull-up/pull-down selection register for all XSHUT to pull-down (write a 0 in every bitmask) |
|
| 1615 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1616 |
|
|
| 1617 |
|
|
| 1618 |
// first 4 register are XSHUT, last 4 are Interrupt, all need pull-up/pull-down |
|
| 1619 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P1,0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1620 |
// XSHUT need pull-down and Interrupt need pull-up 11110000 |
|
| 1621 |
// 0xF0 |
|
| 1622 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1623 |
//set the interrupt register to input, write a 1 to configuration port registers (0Ch, 0Dh, 0Eh) |
|
| 1624 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INPUT_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1625 |
|
|
| 1626 |
// all Interrupt register need pull-up/pull-down |
|
| 1627 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1628 |
// all interrupt register need Pull-up (set to 1) |
|
| 1629 |
//0xFF == 11111111, we set all interrupt register to 00000000 == pull-down and only the register we need is pulled up |
|
| 1630 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1631 |
//set the interrupt register to input, write a 1 to configuration port registers (0Ch, 0Dh, 0Eh) |
|
| 1632 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INPUT_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1633 |
|
|
| 1634 |
// set the XHUT Pins (P0_0 ... P0_7 P1_0 ... P1_3 ) from second GPIO-Extender to LOW |
|
| 1635 |
// same as first GPIO-Extender |
|
| 1636 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDENABLE_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1637 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1638 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDENABLE_P1,0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1639 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1640 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INPUT_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1641 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1642 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1643 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INPUT_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1644 |
|
|
| 1645 |
|
|
| 1646 |
|
|
| 1647 |
//set one sensor to active |
|
| 1648 |
/*only bus moduleLldGpioExtender1 |
|
| 1649 |
|
|
| 1650 |
A GP |
|
| 1651 |
S1 S2 S3 | S4 S5 S6 | S7 S8 S9 | S10 S11 S12| |
|
| 1652 |
GPIO |
|
| 1653 |
XSHUT 1.3 1.2 1.1| 1.0 0.7 0.6| 0.5 0.4 0.3| 0.2 0.1 0.0| |
|
| 1654 |
INTER 2.7 2.6 2.5| 2.4 2.3 2.2| 2.1 2.0 1.7| 1.6 1.5 1.4| |
|
| 1655 |
|
|
| 1656 |
OPTION |
|
| 1657 |
# 11 12 13 | 14 15 16 | 17 18 19 | 110 111 112| |
|
| 1658 |
|
|
| 1659 |
|
|
| 1660 |
A == Anschluss |
|
| 1661 |
GP == GPIO Extender |
|
| 1662 |
*/ |
|
| 1663 |
if (argc == 2) {
|
|
| 1664 |
if (strcmp(argv[1], "#11") == 0) {
|
|
| 1665 |
buffer[0] = 0x8; // == P1.3 => Interrupt 2.7 |
|
| 1666 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1667 |
// enable pull-up for the one used interrupt register |
|
| 1668 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1669 |
// only one pin is set to 0 as interrupt mask register => M2.7 == 01111111 |
|
| 1670 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1671 |
// interrupt edge register IE2.7 with falling edge (from HIGH to LOW) == 10 00 00 00on adress 64h |
|
| 1672 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1673 |
|
|
| 1674 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1675 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1676 |
|
|
| 1677 |
//set GPIO extender |
|
| 1678 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1679 |
} else if (strcmp(argv[1], "#12") == 0) {
|
|
| 1680 |
buffer[0] = 0x4; // PUD1.2 with interrupt P2_6 |
|
| 1681 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1682 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1683 |
// only one pin is set to 0 as interrupt mask register M2.6 == 0xBF == 10111111 |
|
| 1684 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1685 |
// interrupt edge register IE2.6 with falling edge (from HIGH to LOW) == 00100000 |
|
| 1686 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1687 |
|
|
| 1688 |
|
|
| 1689 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1690 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1691 |
|
|
| 1692 |
//set GPIO extender |
|
| 1693 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1694 |
} else if (strcmp(argv[1], "#13") == 0) {
|
|
| 1695 |
buffer[0] = 0x2; // PUD1.1 with Interrupt P2_5 |
|
| 1696 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1697 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1698 |
// only one pin is set to 0 as interrupt mask register M2.5 == 0xDF == 11011111 |
|
| 1699 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1700 |
// interrupt edge register IE2.5 with falling edge (from HIGH to LOW) == 0x8 == 00001000 |
|
| 1701 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1702 |
|
|
| 1703 |
|
|
| 1704 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1705 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1706 |
//set GPIO extender |
|
| 1707 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1708 |
} else if (strcmp(argv[1], "#14") == 0) {
|
|
| 1709 |
buffer[0] = 0x1; // PUD1.0 with Interrupt P2_4 |
|
| 1710 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1711 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1712 |
// only one pin is set to 0 as interrupt mask register M2.4 == 0xEF == 11101111 |
|
| 1713 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1714 |
// interrupt edge register IE2.4 with falling edge (from HIGH to LOW) == 0x8 == 00000010 |
|
| 1715 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1716 |
|
|
| 1717 |
|
|
| 1718 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1719 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1720 |
//set GPIO extender |
|
| 1721 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1722 |
} else if (strcmp(argv[1], "#15") == 0) {
|
|
| 1723 |
buffer[0] = 0x80; // PUD0.7 with interrupt P2.3 |
|
| 1724 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1725 |
// enable pull-up for the one used interrupt register (set to 1) == 00001000 |
|
| 1726 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1727 |
// only one pin is set to 0 as interrupt mask register => M2.3 == 11110111 |
|
| 1728 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xF7, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1729 |
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 10000000 on adress 64h |
|
| 1730 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1731 |
|
|
| 1732 |
|
|
| 1733 |
|
|
| 1734 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1735 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1736 |
//set GPIO extender |
|
| 1737 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1738 |
} else if (strcmp(argv[1], "#16") == 0) {
|
|
| 1739 |
buffer[0] = 0x40; // PUD0.6 with interrupt P2.2 |
|
| 1740 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1741 |
// enable pull-up for the one used interrupt register (set to 1) == 00000100 |
|
| 1742 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x4, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1743 |
// only one pin is set to 0 as interrupt mask register => M2.2 == 11111011 |
|
| 1744 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFB, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1745 |
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 00100000 on adress 64h |
|
| 1746 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1747 |
|
|
| 1748 |
|
|
| 1749 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1750 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1751 |
//set GPIO extender |
|
| 1752 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1753 |
} else if (strcmp(argv[1], "#17") == 0) {
|
|
| 1754 |
buffer[0] = 0x20; // PUD0.5 wirh interrupt P2.1 |
|
| 1755 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1756 |
// enable pull-up for the one used interrupt register (set to 1) == 00000010 |
|
| 1757 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1758 |
// only one pin is set to 0 as interrupt mask register => M2.1 == 11111101 |
|
| 1759 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFD, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1760 |
// interrupt edge register IE2.1 with falling edge (from HIGH to LOW) == 00001000 on adress 64h |
|
| 1761 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1762 |
|
|
| 1763 |
|
|
| 1764 |
|
|
| 1765 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1766 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1767 |
//set GPIO extender |
|
| 1768 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1769 |
} else if (strcmp(argv[1], "#18") == 0) {
|
|
| 1770 |
buffer[0] = 0x10; // PUD0.4 with interrupt P2.0 |
|
| 1771 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1772 |
// enable pull-up for the one used interrupt register (set to 1) == 00000001 |
|
| 1773 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x1, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1774 |
// only one pin is set to 0 as interrupt mask register => M2.0 == 11111110 |
|
| 1775 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFE, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1776 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00000010 on adress 64h |
|
| 1777 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1778 |
|
|
| 1779 |
|
|
| 1780 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1781 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1782 |
//set GPIO extender |
|
| 1783 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1784 |
} else if (strcmp(argv[1], "#19") == 0) {
|
|
| 1785 |
|
|
| 1786 |
buffer[0] = 0x8; // PUD0.3 with interrupt P1_7 |
|
| 1787 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1788 |
// enable pull-up for the one used interrupt register (set to 1) == 10000000 |
|
| 1789 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1790 |
// only one pin is set to 0 as interrupt mask register => M1.7 == 01111111 |
|
| 1791 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1792 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 10000000 on adress 63h |
|
| 1793 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1794 |
|
|
| 1795 |
|
|
| 1796 |
|
|
| 1797 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1798 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1799 |
//set GPIO extender |
|
| 1800 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1801 |
} else if (strcmp(argv[1], "#110") == 0) {
|
|
| 1802 |
|
|
| 1803 |
buffer[0] = 0x4; //PUD0.2 with interrupt P1_6 |
|
| 1804 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1805 |
// enable pull-up for the one used interrupt register (set to 1) == 01000000 |
|
| 1806 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x40, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1807 |
// only one pin is set to 0 as interrupt mask register => M1.6 == 10111111 |
|
| 1808 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1809 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00100000 on adress 63h |
|
| 1810 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1811 |
|
|
| 1812 |
|
|
| 1813 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1814 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1815 |
//set GPIO extender |
|
| 1816 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1817 |
} else if (strcmp(argv[1], "#111") == 0) {
|
|
| 1818 |
buffer[0] = 0x2; // PUD0.1 with interrupt P1_5 |
|
| 1819 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1820 |
// enable pull-up for the one used interrupt register (set to 1) == 00100000 |
|
| 1821 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1822 |
// only one pin is set to 0 as interrupt mask register => M1.5 == 11011111 |
|
| 1823 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xDF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1824 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00001000 on adress 63h |
|
| 1825 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1826 |
|
|
| 1827 |
|
|
| 1828 |
|
|
| 1829 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1830 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1831 |
//set GPIO extender |
|
| 1832 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1833 |
} else if (strcmp(argv[1], "#112") == 0) {
|
|
| 1834 |
|
|
| 1835 |
buffer[0] = 0x1; // PUD0.0 with interrupt P1_4 |
|
| 1836 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1837 |
// enable pull-up for the one used interrupt register (set to 1) == 00010000 |
|
| 1838 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1839 |
// only one pin is set to 0 as interrupt mask register => M1.4 == 11101111 |
|
| 1840 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1841 |
// interrupt edge register IE1.4 with falling edge (from HIGH to LOW) == 00 00 00 10 on adress 63h |
|
| 1842 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1843 |
|
|
| 1844 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 1845 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 1846 |
//set GPIO extender |
|
| 1847 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 1848 |
|
|
| 1849 |
} else if (strcmp(argv[1], "#21") == 0) {
|
|
| 1850 |
buffer[0] = 0x8; // == P1.3 => Interrupt 2.7 |
|
| 1851 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1852 |
// enable pull-up for the one used interrupt register |
|
| 1853 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1854 |
// only one pin is set to 0 as interrupt mask register => M2.7 == 01111111 |
|
| 1855 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1856 |
// interrupt edge register IE2.7 with falling edge (from HIGH to LOW) == 10 00 00 00on adress 64h |
|
| 1857 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1858 |
|
|
| 1859 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1860 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1861 |
//set GPIO extender |
|
| 1862 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1863 |
} else if (strcmp(argv[1], "#22") == 0) {
|
|
| 1864 |
buffer[0] = 0x4; // PUD1.2 with interrupt P2_6 |
|
| 1865 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1866 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1867 |
// only one pin is set to 0 as interrupt mask register M2.6 == 0xBF == 10111111 |
|
| 1868 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1869 |
// interrupt edge register IE2.6 with falling edge (from HIGH to LOW) == 00100000 |
|
| 1870 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1871 |
|
|
| 1872 |
|
|
| 1873 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1874 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1875 |
//set GPIO extender |
|
| 1876 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1877 |
|
|
| 1878 |
} else if (strcmp(argv[1], "#23") == 0) {
|
|
| 1879 |
buffer[0] = 0x2; // PUD1.1 with Interrupt P2_5 |
|
| 1880 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1881 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1882 |
// only one pin is set to 0 as interrupt mask register M2.5 == 0xDF == 11011111 |
|
| 1883 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1884 |
// interrupt edge register IE2.5 with falling edge (from HIGH to LOW) == 0x8 == 00001000 |
|
| 1885 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1886 |
|
|
| 1887 |
|
|
| 1888 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1889 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1890 |
//set GPIO extender |
|
| 1891 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1892 |
} else if (strcmp(argv[1], "#24") == 0) {
|
|
| 1893 |
buffer[0] = 0x1; // PUD1.0 with Interrupt P2_4 |
|
| 1894 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1895 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1896 |
// only one pin is set to 0 as interrupt mask register M2.4 == 0xEF == 11101111 |
|
| 1897 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1898 |
// interrupt edge register IE2.4 with falling edge (from HIGH to LOW) == 0x8 == 00000010 |
|
| 1899 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1900 |
|
|
| 1901 |
|
|
| 1902 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1903 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1904 |
//set GPIO extender |
|
| 1905 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1906 |
} else if (strcmp(argv[1], "#25") == 0) {
|
|
| 1907 |
buffer[0] = 0x80; // PUD0.7 with interrupt P2.3 |
|
| 1908 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1909 |
// enable pull-up for the one used interrupt register (set to 1) == 00001000 |
|
| 1910 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1911 |
// only one pin is set to 0 as interrupt mask register => M2.3 == 11110111 |
|
| 1912 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xF7, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1913 |
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 10000000 on adress 64h |
|
| 1914 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1915 |
|
|
| 1916 |
|
|
| 1917 |
|
|
| 1918 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1919 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1920 |
//set GPIO extender |
|
| 1921 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1922 |
} else if (strcmp(argv[1], "#26") == 0) {
|
|
| 1923 |
buffer[0] = 0x40; // PUD0.6 with interrupt P2.2 |
|
| 1924 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1925 |
// enable pull-up for the one used interrupt register (set to 1) == 00000100 |
|
| 1926 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x4, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1927 |
// only one pin is set to 0 as interrupt mask register => M2.2 == 11111011 |
|
| 1928 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFB, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1929 |
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 00100000 on adress 64h |
|
| 1930 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1931 |
|
|
| 1932 |
|
|
| 1933 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1934 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1935 |
//set GPIO extender |
|
| 1936 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1937 |
} else if (strcmp(argv[1], "#27") == 0) {
|
|
| 1938 |
buffer[0] = 0x20; // PUD0.5 wirh interrupt P2.1 |
|
| 1939 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1940 |
// enable pull-up for the one used interrupt register (set to 1) == 00000010 |
|
| 1941 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1942 |
// only one pin is set to 0 as interrupt mask register => M2.1 == 11111101 |
|
| 1943 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFD, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1944 |
// interrupt edge register IE2.1 with falling edge (from HIGH to LOW) == 00001000 on adress 64h |
|
| 1945 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1946 |
|
|
| 1947 |
|
|
| 1948 |
|
|
| 1949 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1950 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1951 |
//set GPIO extender |
|
| 1952 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1953 |
} else if (strcmp(argv[1], "#28") == 0) {
|
|
| 1954 |
buffer[0] = 0x10; // PUD0.4 with interrupt P2.0 |
|
| 1955 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1956 |
// enable pull-up for the one used interrupt register (set to 1) == 00000001 |
|
| 1957 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x1, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1958 |
// only one pin is set to 0 as interrupt mask register => M2.0 == 11111110 |
|
| 1959 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFE, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1960 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00000010 on adress 64h |
|
| 1961 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1962 |
|
|
| 1963 |
|
|
| 1964 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1965 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1966 |
//set GPIO extender |
|
| 1967 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1968 |
} else if (strcmp(argv[1], "#29") == 0) {
|
|
| 1969 |
|
|
| 1970 |
buffer[0] = 0x8; // PUD0.3 with interrupt P1_7 |
|
| 1971 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1972 |
// enable pull-up for the one used interrupt register (set to 1) == 10000000 |
|
| 1973 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1974 |
// only one pin is set to 0 as interrupt mask register => M1.7 == 01111111 |
|
| 1975 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1976 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 10000000 on adress 63h |
|
| 1977 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1978 |
|
|
| 1979 |
|
|
| 1980 |
|
|
| 1981 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1982 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1983 |
//set GPIO extender |
|
| 1984 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 1985 |
} else if (strcmp(argv[1], "#210") == 0) {
|
|
| 1986 |
|
|
| 1987 |
buffer[0] = 0x4; //PUD0.2 with interrupt P1_6 |
|
| 1988 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1989 |
// enable pull-up for the one used interrupt register (set to 1) == 01000000 |
|
| 1990 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x40, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1991 |
// only one pin is set to 0 as interrupt mask register => M1.6 == 10111111 |
|
| 1992 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1993 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00100000 on adress 63h |
|
| 1994 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 1995 |
|
|
| 1996 |
|
|
| 1997 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 1998 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 1999 |
//set GPIO extender |
|
| 2000 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 2001 |
} else if (strcmp(argv[1], "#211") == 0) {
|
|
| 2002 |
buffer[0] = 0x2; // PUD0.1 with interrupt P1_5 |
|
| 2003 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2004 |
// enable pull-up for the one used interrupt register (set to 1) == 00100000 |
|
| 2005 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2006 |
// only one pin is set to 0 as interrupt mask register => M1.5 == 11011111 |
|
| 2007 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xDF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2008 |
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00001000 on adress 63h |
|
| 2009 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2010 |
|
|
| 2011 |
|
|
| 2012 |
|
|
| 2013 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 2014 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 2015 |
//set GPIO extender |
|
| 2016 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 2017 |
} else if (strcmp(argv[1], "#212") == 0) {
|
|
| 2018 |
|
|
| 2019 |
buffer[0] = 0x1; // PUD0.0 with interrupt P1_4 |
|
| 2020 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2021 |
// enable pull-up for the one used interrupt register (set to 1) == 00010000 |
|
| 2022 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2023 |
// only one pin is set to 0 as interrupt mask register => M1.4 == 11101111 |
|
| 2024 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2025 |
// interrupt edge register IE1.4 with falling edge (from HIGH to LOW) == 00 00 00 10 on adress 63h |
|
| 2026 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2027 |
|
|
| 2028 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2; |
|
| 2029 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2; |
|
| 2030 |
//set GPIO extender |
|
| 2031 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2; |
|
| 2032 |
} else{
|
|
| 2033 |
//use first sensor |
|
| 2034 |
chprintf(stream, "unknown argument, use first sensor\n"); |
|
| 2035 |
usleep(2000000); |
|
| 2036 |
buffer[0] = 0x8; // == P1.3 => Interrupt 2.7 |
|
| 2037 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2038 |
// enable pull-up for the one used interrupt register |
|
| 2039 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2040 |
// only one pin is set to 0 as interrupt mask register => M2.7 == 01111111 |
|
| 2041 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2042 |
// interrupt edge register IE2.7 with falling edge (from HIGH to LOW) == 10 00 00 00on adress 64h |
|
| 2043 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout); |
|
| 2044 |
|
|
| 2045 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1; |
|
| 2046 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1; |
|
| 2047 |
|
|
| 2048 |
//set GPIO extender |
|
| 2049 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1; |
|
| 2050 |
} |
|
| 2051 |
|
|
| 2052 |
|
|
| 2053 |
|
|
| 2054 |
|
|
| 2055 |
|
|
| 2056 |
(void)argc; |
|
| 2057 |
(void)argv; |
|
| 2058 |
//wait 60 ms for boottime from sensor |
|
| 2059 |
usleep(60000); |
|
| 2060 |
aosUtRun(stream, &moduleUtAlldVl53l0x, "VL53"); |
|
| 2061 |
|
|
| 2062 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = NULL; |
|
| 2063 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = NULL; |
|
| 2064 |
return AOS_OK; |
|
| 2065 |
}else{
|
|
| 2066 |
|
|
| 2067 |
// print help |
|
| 2068 |
chprintf(stream, "Usage: %s OPTION\n", argv[0]); |
|
| 2069 |
chprintf(stream, "Options:\n"); |
|
| 2070 |
chprintf(stream, " #11\n"); |
|
| 2071 |
chprintf(stream, " Test the first VL53L0X sensor on the I2C bus #1.\n"); |
|
| 2072 |
chprintf(stream, " #12\n"); |
|
| 2073 |
chprintf(stream, " Test the second VL53L0X sensor on the I2C bus #1.\n"); |
|
| 2074 |
chprintf(stream, " ... #112\n"); |
|
| 2075 |
chprintf(stream, " Test the 12 VL53L0X sensor on the I2C bus #1.\n"); |
|
| 2076 |
chprintf(stream, " #21\n"); |
|
| 2077 |
chprintf(stream, " Test the first VL53L0X sensor on the I2C bus #2.\n"); |
|
| 2078 |
chprintf(stream, " ... #212\n"); |
|
| 2079 |
chprintf(stream, " Test the 12 VL53L0X sensor on the I2C bus #2.\n"); |
|
| 2080 |
return AOS_INVALIDARGUMENTS; |
|
| 2081 |
} |
|
| 2082 |
|
|
| 2083 |
|
|
| 2084 |
// belegung der Hols beim Sensor: |
|
| 2085 |
// obster/rechter: interrupt, XSHUT, GND |
|
| 2086 |
// mittlerer: GND, interrupt, XSHUT, GND |
|
| 2087 |
// Unterster/linker:GND, interrupt, XSHUT |
|
| 2088 |
// set the XHUT Pins (P0_0 ... P0_7 P1_0 ... P1_3 ) from first GPIO-Extender to LOW |
|
| 2089 |
// -> first: Der pin, der auf XSHUT weißt ist ein Output ! |
|
| 2090 |
// -> second: setze alle Sensoren unter reset == Der Pin erhält eine Spannung unter 1 Volt |
|
| 2091 |
// -> third: setze einen Pin auf High (Spannung groesser 2 Volt) und dann kann man die Adresse |
|
| 2092 |
// ansprechen. |
|
| 2093 |
|
|
| 2094 |
|
|
| 2095 |
|
|
| 2096 |
} |
|
| 2097 |
static ut_vl53l0xdata_t _utAlldVL53L0XData = {
|
|
| 2098 |
/* driver */ NULL, |
|
| 2099 |
/* timeout */ MICROSECONDS_PER_SECOND, |
|
| 2100 |
/* event source */ &aos.events.io, |
|
| 2101 |
/* event flags */ 0, |
|
| 2102 |
/* gpio */ NULL, |
|
| 2103 |
}; |
|
| 2104 |
aos_unittest_t moduleUtAlldVl53l0x = {
|
|
| 2105 |
/* name */ "VL53L0X", |
|
| 2106 |
/* info */ "proximity sensor", |
|
| 2107 |
/* test function */ utAlldVL53L0XFunc, |
|
| 2108 |
/* shell command */ {
|
|
| 2109 |
/* name */ "unittest:Proximity", |
|
| 2110 |
/* callback */ _utShellCmdCb_AlldVL53L0X, |
|
| 2111 |
/* next */ NULL, |
|
| 2112 |
}, |
|
| 2113 |
/* data */ &_utAlldVL53L0XData, |
|
| 2114 |
}; |
|
| 2115 |
|
|
| 2116 |
|
|
| 1386 | 2117 |
#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */ |
| 1387 | 2118 |
|
| 1388 | 2119 |
#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__) |
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