amiro-os / modules / STM32L476RG-NUCLEO64 / board.h @ ae448fac
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* Setup for STMicroelectronics STM32 Nucleo64-L476RG board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ST_NUCLEO64_L476RG
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#define BOARD_NAME "STMicroelectronics STM32 Nucleo64-L476RG" |
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#define BOARD_VERSION "1.0" |
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/*
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* Board oscillators-related settings.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768U |
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#endif
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#define STM32_LSEDRV (3U << 3U) |
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000U |
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#endif
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#define STM32_HSE_BYPASS
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300U |
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32L476xx
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/*
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* IO pins assignments.
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*/
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#define GPIOA_ARD_A0 0U |
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#define GPIOA_ACD12_IN5 0U |
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#define GPIOA_ARD_A1 1U |
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#define GPIOA_ACD12_IN6 1U |
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#define GPIOA_ARD_D1 2U |
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#define GPIOA_USART2_TX 2U |
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#define GPIOA_ARD_D0 3U |
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#define GPIOA_USART2_RX 3U |
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#define GPIOA_ARD_A2 4U |
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#define GPIOA_ACD12_IN9 4U |
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#define GPIOA_ARD_D13 5U |
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#define GPIOA_LED_GREEN 5U |
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#define GPIOA_ARD_D12 6U |
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#define GPIOA_ARD_D11 7U |
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#define GPIOA_ARD_D7 8U |
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#define GPIOA_ARD_D8 9U |
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#define GPIOA_ARD_D2 10U |
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#define GPIOA_PIN11 11U |
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#define GPIOA_PIN12 12U |
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#define GPIOA_SWDIO 13U |
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#define GPIOA_SWCLK 14U |
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#define GPIOA_PIN15 15U |
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#define GPIOB_ARD_A3 0U |
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#define GPIOB_ACD12_IN15 0U |
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#define GPIOB_PIN1 1U |
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#define GPIOB_PIN2 2U |
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#define GPIOB_ARD_D3 3U |
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#define GPIOB_SWO 3U |
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#define GPIOB_ARD_D5 4U |
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#define GPIOB_ARD_D4 5U |
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#define GPIOB_ARD_D10 6U |
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#define GPIOB_PIN7 7U |
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#define GPIOB_ARD_D15 8U |
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#define GPIOB_ARD_D14 9U |
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#define GPIOB_ARD_D6 10U |
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#define GPIOB_PIN11 11U |
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#define GPIOB_PIN12 12U |
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#define GPIOB_PIN13 13U |
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#define GPIOB_PIN14 14U |
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#define GPIOB_PIN15 15U |
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#define GPIOC_ARD_A5 0U |
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#define GPIOC_ACD123_IN1 0U |
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#define GPIOC_ARD_A4 1U |
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#define GPIOC_ACD123_IN2 1U |
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#define GPIOC_PIN2 2U |
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#define GPIOC_PIN3 3U |
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#define GPIOC_PIN4 4U |
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#define GPIOC_PIN5 5U |
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#define GPIOC_PIN6 6U |
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#define GPIOC_ARD_D9 7U |
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#define GPIOC_PIN8 8U |
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#define GPIOC_PIN9 9U |
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#define GPIOC_PIN10 10U |
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#define GPIOC_PIN11 11U |
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#define GPIOC_PIN12 12U |
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#define GPIOC_BUTTON 13U |
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#define GPIOC_OSC32_IN 14U |
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#define GPIOC_OSC32_OUT 15U |
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#define GPIOD_PIN0 0U |
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#define GPIOD_PIN1 1U |
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#define GPIOD_PIN2 2U |
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#define GPIOD_PIN3 3U |
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#define GPIOD_PIN4 4U |
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#define GPIOD_PIN5 5U |
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#define GPIOD_PIN6 6U |
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#define GPIOD_PIN7 7U |
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#define GPIOD_PIN8 8U |
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#define GPIOD_PIN9 9U |
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#define GPIOD_PIN10 10U |
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#define GPIOD_PIN11 11U |
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#define GPIOD_PIN12 12U |
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#define GPIOD_PIN13 13U |
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#define GPIOD_PIN14 14U |
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#define GPIOD_PIN15 15U |
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#define GPIOE_PIN0 0U |
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#define GPIOE_PIN1 1U |
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#define GPIOE_PIN2 2U |
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#define GPIOE_PIN3 3U |
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#define GPIOE_PIN4 4U |
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#define GPIOE_PIN5 5U |
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#define GPIOE_PIN6 6U |
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#define GPIOE_PIN7 7U |
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#define GPIOE_PIN8 8U |
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#define GPIOE_PIN9 9U |
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#define GPIOE_PIN10 10U |
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#define GPIOE_PIN11 11U |
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#define GPIOE_PIN12 12U |
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#define GPIOE_PIN13 13U |
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#define GPIOE_PIN14 14U |
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#define GPIOE_PIN15 15U |
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#define GPIOF_PIN0 0U |
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#define GPIOF_PIN1 1U |
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#define GPIOF_PIN2 2U |
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#define GPIOF_PIN3 3U |
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#define GPIOF_PIN4 4U |
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#define GPIOF_PIN5 5U |
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#define GPIOF_PIN6 6U |
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#define GPIOF_PIN7 7U |
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#define GPIOF_PIN8 8U |
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#define GPIOF_PIN9 9U |
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#define GPIOF_PIN10 10U |
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#define GPIOF_PIN11 11U |
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#define GPIOF_PIN12 12U |
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#define GPIOF_PIN13 13U |
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#define GPIOF_PIN14 14U |
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#define GPIOF_PIN15 15U |
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#define GPIOG_PIN0 0U |
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#define GPIOG_PIN1 1U |
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#define GPIOG_PIN2 2U |
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#define GPIOG_PIN3 3U |
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#define GPIOG_PIN4 4U |
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#define GPIOG_PIN5 5U |
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#define GPIOG_PIN6 6U |
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#define GPIOG_PIN7 7U |
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#define GPIOG_PIN8 8U |
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#define GPIOG_PIN9 9U |
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#define GPIOG_PIN10 10U |
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#define GPIOG_PIN11 11U |
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#define GPIOG_PIN12 12U |
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#define GPIOG_PIN13 13U |
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#define GPIOG_PIN14 14U |
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#define GPIOG_PIN15 15U |
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#define GPIOH_OSC_IN 0U |
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#define GPIOH_OSC_OUT 1U |
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#define GPIOH_PIN2 2U |
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#define GPIOH_PIN3 3U |
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#define GPIOH_PIN4 4U |
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#define GPIOH_PIN5 5U |
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#define GPIOH_PIN6 6U |
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#define GPIOH_PIN7 7U |
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#define GPIOH_PIN8 8U |
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#define GPIOH_PIN9 9U |
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#define GPIOH_PIN10 10U |
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#define GPIOH_PIN11 11U |
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#define GPIOH_PIN12 12U |
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#define GPIOH_PIN13 13U |
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#define GPIOH_PIN14 14U |
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#define GPIOH_PIN15 15U |
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/*
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* IO lines assignments.
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*/
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#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) |
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#define LINE_ACD12_IN5 PAL_LINE(GPIOA, 0U) |
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#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) |
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#define LINE_ACD12_IN6 PAL_LINE(GPIOA, 1U) |
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#define LINE_ARD_D1 PAL_LINE(GPIOA, 2U) |
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#define LINE_USART2_TX PAL_LINE(GPIOA, 2U) |
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#define LINE_ARD_D0 PAL_LINE(GPIOA, 3U) |
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#define LINE_USART2_RX PAL_LINE(GPIOA, 3U) |
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#define LINE_ARD_A2 PAL_LINE(GPIOA, 4U) |
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#define LINE_ACD12_IN9 PAL_LINE(GPIOA, 4U) |
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#define LINE_ARD_D13 PAL_LINE(GPIOA, 5U) |
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#define LINE_LED_GREEN PAL_LINE(GPIOA, 5U) |
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#define LINE_ARD_D12 PAL_LINE(GPIOA, 6U) |
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#define LINE_ARD_D11 PAL_LINE(GPIOA, 7U) |
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#define LINE_ARD_D7 PAL_LINE(GPIOA, 8U) |
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#define LINE_ARD_D8 PAL_LINE(GPIOA, 9U) |
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#define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) |
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#define LINE_SWDIO PAL_LINE(GPIOA, 13U) |
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#define LINE_SWCLK PAL_LINE(GPIOA, 14U) |
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#define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) |
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#define LINE_ACD12_IN15 PAL_LINE(GPIOB, 0U) |
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#define LINE_ARD_D3 PAL_LINE(GPIOB, 3U) |
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#define LINE_SWO PAL_LINE(GPIOB, 3U) |
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#define LINE_ARD_D5 PAL_LINE(GPIOB, 4U) |
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#define LINE_ARD_D4 PAL_LINE(GPIOB, 5U) |
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#define LINE_ARD_D10 PAL_LINE(GPIOB, 6U) |
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#define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) |
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#define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) |
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#define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) |
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#define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) |
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#define LINE_ACD123_IN1 PAL_LINE(GPIOC, 0U) |
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#define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) |
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#define LINE_ACD123_IN2 PAL_LINE(GPIOC, 1U) |
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#define LINE_ARD_D9 PAL_LINE(GPIOC, 7U) |
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#define LINE_BUTTON PAL_LINE(GPIOC, 13U) |
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#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) |
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#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) |
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#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) |
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#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) |
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
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#define PIN_ODR_LOW(n) (0U << (n)) |
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#define PIN_ODR_HIGH(n) (1U << (n)) |
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) |
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) |
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) |
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) |
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
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#define PIN_ASCR_DISABLED(n) (0U << (n)) |
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#define PIN_ASCR_ENABLED(n) (1U << (n)) |
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#define PIN_LOCKR_DISABLED(n) (0U << (n)) |
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#define PIN_LOCKR_ENABLED(n) (1U << (n)) |
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/*
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* GPIOA setup:
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*
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* PA0 - ARD_A0 ACD12_IN5 (analog).
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* PA1 - ARD_A1 ACD12_IN6 (analog).
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* PA2 - ARD_D1 USART2_TX (alternate 7).
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* PA3 - ARD_D0 USART2_RX (alternate 7).
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* PA4 - ARD_A2 ACD12_IN9 (analog).
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* PA5 - ARD_D13 LED_GREEN (output pushpull maximum).
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* PA6 - ARD_D12 (analog).
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* PA7 - ARD_D11 (analog).
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* PA8 - ARD_D7 (analog).
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* PA9 - ARD_D8 (analog).
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* PA10 - ARD_D2 (analog).
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* PA11 - PIN11 (analog).
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* PA12 - PIN12 (analog).
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* PA13 - SWDIO (alternate 0).
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* PA14 - SWCLK (alternate 0).
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* PA15 - PIN15 (analog).
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