amiro-os / patches / 0006-STM32F4xx-ADC-add-AWD-support.patch @ b24df8ad
History | View | Annotate | Download (3.677 KB)
| 1 | 58fe0e0b | Thomas Schöpping | From: Thomas SCHÖPPING <tschoepp@techfak.uni-bielefeld.de>
|
|---|---|---|---|
| 2 | Date: Wed, 3 Mar 2015 15:43:17 +0200
|
||
| 3 | Subject: [PATCH] STM32F4xx: added support for the ADC analog watchdog
|
||
| 4 | |||
| 5 | Signed-off-by: Thomas SCHÖPPING <tschoepp@techfak.uni-bielefeld.de>
|
||
| 6 | ---
|
||
| 7 | diff --git a/os/hal/platforms/STM32F4xx/adc_lld.c b/os/hal/platforms/STM32F4xx/adc_lld.c
|
||
| 8 | index e5de44a..5495649 100644
|
||
| 9 | --- a/os/hal/platforms/STM32F4xx/adc_lld.c
|
||
| 10 | +++ b/os/hal/platforms/STM32F4xx/adc_lld.c
|
||
| 11 | @@ -124,7 +124,10 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
|
||
| 12 | if (ADCD1.grpp != NULL) |
||
| 13 | _adc_isr_error_code(&ADCD1, ADC_ERR_OVERFLOW); |
||
| 14 | } |
||
| 15 | - /* TODO: Add here analog watchdog handling.*/
|
||
| 16 | + if (sr & ADC_SR_AWD) {
|
||
| 17 | + if (ADCD1.grpp != NULL)
|
||
| 18 | + _adc_isr_error_code(&ADCD1, ADC_ERR_WATCHDOG);
|
||
| 19 | + }
|
||
| 20 | #endif /* STM32_ADC_USE_ADC1 */ |
||
| 21 | |||
| 22 | #if STM32_ADC_USE_ADC2
|
||
| 23 | @@ -138,7 +141,10 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
|
||
| 24 | if (ADCD2.grpp != NULL) |
||
| 25 | _adc_isr_error_code(&ADCD2, ADC_ERR_OVERFLOW); |
||
| 26 | } |
||
| 27 | - /* TODO: Add here analog watchdog handling.*/
|
||
| 28 | + if (sr & ADC_SR_AWD) {
|
||
| 29 | + if (ADCD1.grpp != NULL)
|
||
| 30 | + _adc_isr_error_code(&ADCD2, ADC_ERR_WATCHDOG);
|
||
| 31 | + }
|
||
| 32 | #endif /* STM32_ADC_USE_ADC2 */ |
||
| 33 | |||
| 34 | #if STM32_ADC_USE_ADC3
|
||
| 35 | @@ -152,7 +158,10 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
|
||
| 36 | if (ADCD3.grpp != NULL) |
||
| 37 | _adc_isr_error_code(&ADCD3, ADC_ERR_OVERFLOW); |
||
| 38 | } |
||
| 39 | - /* TODO: Add here analog watchdog handling.*/
|
||
| 40 | + if (sr & ADC_SR_AWD) {
|
||
| 41 | + if (ADCD1.grpp != NULL)
|
||
| 42 | + _adc_isr_error_code(&ADCD3, ADC_ERR_WATCHDOG);
|
||
| 43 | + }
|
||
| 44 | #endif /* STM32_ADC_USE_ADC3 */ |
||
| 45 | |||
| 46 | CH_IRQ_EPILOGUE(); |
||
| 47 | @@ -340,6 +349,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) { |
||
| 48 | adcp->adc->SR = 0;
|
||
| 49 | adcp->adc->SMPR1 = grpp->smpr1; |
||
| 50 | adcp->adc->SMPR2 = grpp->smpr2; |
||
| 51 | + adcp->adc->HTR = grpp->htr;
|
||
| 52 | + adcp->adc->LTR = grpp->ltr;
|
||
| 53 | adcp->adc->SQR1 = grpp->sqr1; |
||
| 54 | adcp->adc->SQR2 = grpp->sqr2; |
||
| 55 | adcp->adc->SQR3 = grpp->sqr3; |
||
| 56 | diff --git a/os/hal/platforms/STM32F4xx/adc_lld.h b/os/hal/platforms/STM32F4xx/adc_lld.h
|
||
| 57 | index 7cda791..be81ed3 100644
|
||
| 58 | --- a/os/hal/platforms/STM32F4xx/adc_lld.h
|
||
| 59 | +++ b/os/hal/platforms/STM32F4xx/adc_lld.h
|
||
| 60 | @@ -306,7 +306,8 @@ typedef uint16_t adc_channels_num_t; |
||
| 61 | */ |
||
| 62 | typedef enum { |
||
| 63 | ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */ |
||
| 64 | - ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */
|
||
| 65 | + ADC_ERR_OVERFLOW = 1, /**< ADC overflow condition. */
|
||
| 66 | + ADC_ERR_WATCHDOG = 2 /**< ADC watchdog condition. */
|
||
| 67 | } adcerror_t; |
||
| 68 | |||
| 69 | /**
|
||
| 70 | @@ -385,6 +386,16 @@ typedef struct { |
||
| 71 | */ |
||
| 72 | uint32_t smpr2; |
||
| 73 | /**
|
||
| 74 | + * @brief ADC watchdog higher threshold register.
|
||
| 75 | + * @details This filed defines the higher threshold for the analog watchdog.
|
||
| 76 | + */
|
||
| 77 | + uint16_t htr;
|
||
| 78 | + /**
|
||
| 79 | + * @brief ADC watchdog lower threshold register.
|
||
| 80 | + * @details This filed defines the lower threshold for the analog watchdog.
|
||
| 81 | + */
|
||
| 82 | + uint16_t ltr;
|
||
| 83 | + /**
|
||
| 84 | * @brief ADC SQR1 register initialization data. |
||
| 85 | * @details Conversion group sequence 13...16 + sequence length. |
||
| 86 | */ |
||
| 87 | @@ -528,6 +539,14 @@ struct ADCDriver { |
||
| 88 | #define ADC_SMPR1_SMP_VBAT(n) ((n) << 24) /**< @brief VBAT sampling time. */ |
||
| 89 | /** @} */
|
||
| 90 | |||
| 91 | +/**
|
||
| 92 | + * @name Threshold settings helper macros
|
||
| 93 | + * @{
|
||
| 94 | + */
|
||
| 95 | +#define ADC_HTR(n) ((n > ADC_HTR_HT) ? ADC_HTR_HT : n) /**< @brief higher threshold limitation */
|
||
| 96 | +#define ADC_LTR(n) ((n > ADC_LTR_LT) ? ADC_LTR_LT : n) /**< @brief lower threshold limitation */
|
||
| 97 | +/** @} */
|
||
| 98 | +
|
||
| 99 | /*===========================================================================*/
|
||
| 100 | /* External declarations. */
|
||
| 101 | /*===========================================================================*/ |