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amiro-os / boards / PowerManagement / board.h @ b8085493

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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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 * Setup for AMiRo PowerManagement board.
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 */
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/*
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 * Board identifier.
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 */
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#define BOARD_POWER_MANAGEMENT
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#define BOARD_NAME              "AMiRo PowerManagement"
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#define BOARD_VERSION           "1.1"
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/*
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 * Board frequencies.
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 */
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#define STM32_LSECLK            0
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#define STM32_HSECLK            8000000
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/*
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 * Board voltages.
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 * Required for performance limits calculation.
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 */
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#define STM32_VDD               330
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/*
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 * MCU type as defined in the ST header file stm32f4xx.h.
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 */
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#define STM32F40_41xxx
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/*
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 * IO pins assignments.
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 */
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#define GPIOA_WKUP              0
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#define GPIOA_SYS_UART_TX       2
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#define GPIOA_SYS_UART_RX       3
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#define GPIOA_SYS_SPI_SS0_N     4
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#define GPIOA_SYS_SPI_SCLK      5
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#define GPIOA_SYS_SPI_MISO      6
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#define GPIOA_SYS_SPI_MOSI      7
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#define GPIOA_SYS_REG_EN        8
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#define GPIOA_PROG_RX           9
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#define GPIOA_PROG_TX           10
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#define GPIOA_CAN_RX            11
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#define GPIOA_CAN_TX            12
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#define GPIOA_SYS_SPI_SS1_N     15
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#define GPIOB_IR_INT1_N         0
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#define GPIOB_VSYS_SENSE        1
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#define GPIOB_POWER_EN          2
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#define GPIOB_SYS_UART_DN       3
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#define GPIOB_CHARGE_STAT2A     4
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#define GPIOB_BUZZER            5
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#define GPIOB_GAUGE_BATLOW2     6
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#define GPIOB_GAUGE_BATGD2_N    7
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#define GPIOB_GAUGE_SCL2        8
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#define GPIOB_GAUGE_SDA2        9
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#define GPIOB_GAUGE_SCL1        10
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#define GPIOB_GAUGE_SDA1        11
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#define GPIOB_LED               12
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#define GPIOB_BT_RTS            13
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#define GPIOB_BT_CTS            14
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#define GPIOB_SYS_UART_UP       15
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#define GPIOC_CHARGE_STAT1A     0
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#define GPIOC_GAUGE_BATLOW1     1
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#define GPIOC_GAUGE_BATGD1_N    2
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#define GPIOC_CHARGE_EN1_N      3
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#define GPIOC_IR_INT2_N         4
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#define GPIOC_TOUCH_INT_N       5
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#define GPIOC_SYS_DONE          6
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#define GPIOC_SYS_PROG_N        7
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#define GPIOC_PATH_DC           8
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#define GPIOC_SYS_SPI_DIR       9
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#define GPIOC_BT_RX             10
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#define GPIOC_BT_TX             11
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#define GPIOC_SYS_INT_N         12
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#define GPIOC_SYS_PD_N          13
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#define GPIOC_SYS_WARMRST_N     14
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#define GPIOC_BT_RST            15
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#define GPIOD_CHARGE_EN2_N      2
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#define GPIOH_OSC_IN            0
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#define GPIOH_OSC_OUT           1
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/*
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 * I/O ports initial setup, this configuration is established soon after reset
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 * in the initialization code.
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 */
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#define PIN_MODE_INPUT(n)       (0U << ((n) * 2))
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#define PIN_MODE_OUTPUT(n)      (1U << ((n) * 2))
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#define PIN_MODE_ALTERNATE(n)   (2U << ((n) * 2))
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#define PIN_MODE_ANALOG(n)      (3U << ((n) * 2))
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#define PIN_OTYPE_PUSHPULL(n)   (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n)  (1U << (n))
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#define PIN_OSPEED_2M(n)        (0U << ((n) * 2))
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#define PIN_OSPEED_25M(n)       (1U << ((n) * 2))
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#define PIN_OSPEED_50M(n)       (2U << ((n) * 2))
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#define PIN_OSPEED_100M(n)      (3U << ((n) * 2))
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#define PIN_PUDR_FLOATING(n)    (0U << ((n) * 2))
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#define PIN_PUDR_PULLUP(n)      (1U << ((n) * 2))
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#define PIN_PUDR_PULLDOWN(n)    (2U << ((n) * 2))
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#define PIN_AFIO_AF(n, v)       ((v##U) << ((n % 8) * 4))
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/*
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 * Port A setup.
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 */
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#define VAL_GPIOA_MODER         (PIN_MODE_INPUT(GPIOA_WKUP) | \
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                                 PIN_MODE_INPUT(1) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_SYS_UART_TX) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) | \
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                                 PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) | \
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                                 PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_PROG_RX) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_PROG_TX) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_CAN_RX) | \
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                                 PIN_MODE_ALTERNATE(GPIOA_CAN_TX) | \
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                                 PIN_MODE_INPUT(13) | \
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                                 PIN_MODE_INPUT(14) | \
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                                 PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN))
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#define VAL_GPIOA_OTYPER        (PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) | \
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                                 PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) | \
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                                 PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) | \
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                                 PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) | \
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                                 PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN))
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#define VAL_GPIOA_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOA_PUPDR         (PIN_PUDR_FLOATING(GPIOA_WKUP) | \
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                                 PIN_PUDR_PULLUP(1) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_UART_TX) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_UART_RX) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_SS0_N) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_SCLK) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_MOSI) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_MISO) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_SPI_SS1_N) | \
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                                 PIN_PUDR_FLOATING(GPIOA_PROG_RX) | \
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                                 PIN_PUDR_PULLUP(GPIOA_PROG_TX) | \
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                                 PIN_PUDR_FLOATING(GPIOA_CAN_RX) | \
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                                 PIN_PUDR_FLOATING(GPIOA_CAN_TX) | \
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                                 PIN_PUDR_PULLUP(13) | \
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                                 PIN_PUDR_PULLUP(14) | \
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                                 PIN_PUDR_FLOATING(GPIOA_SYS_REG_EN))
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#define VAL_GPIOA_ODR           0xFFFF
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#define VAL_GPIOA_AFRL          (PIN_AFIO_AF(GPIOA_SYS_UART_TX, 7) | \
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                                 PIN_AFIO_AF(GPIOA_SYS_UART_RX, 7) | \
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                                 PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, 5) | \
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                                 PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, 5) | \
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                                 PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, 5))
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#define VAL_GPIOA_AFRH          (PIN_AFIO_AF(GPIOA_PROG_RX, 7) | \
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                                 PIN_AFIO_AF(GPIOA_PROG_TX, 7) | \
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                                 PIN_AFIO_AF(GPIOA_CAN_RX, 9) | \
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                                 PIN_AFIO_AF(GPIOA_CAN_TX, 9))
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/*
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 * Port B setup.
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 */
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#define VAL_GPIOB_MODER         (PIN_MODE_INPUT(GPIOB_IR_INT1_N) | \
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                                 PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) | \
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                                 PIN_MODE_OUTPUT(GPIOB_POWER_EN) | \
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                                 PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) | \
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                                 PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) | \
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                                 PIN_MODE_ALTERNATE(GPIOB_BUZZER) | \
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                                 PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) | \
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                                 PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) | \
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                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) | \
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                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) | \
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                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) | \
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                                 PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) | \
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                                 PIN_MODE_OUTPUT(GPIOB_LED) | \
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                                 PIN_MODE_ALTERNATE(GPIOB_BT_RTS) | \
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                                 PIN_MODE_ALTERNATE(GPIOB_BT_CTS) | \
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                                 PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP))
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#define VAL_GPIOB_OTYPER        (PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) | \
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                                 PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOB_LED) | \
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                                 PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP))
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#define VAL_GPIOB_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOB_PUPDR         0x00000000
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#define VAL_GPIOB_ODR           0xFFFF
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#define VAL_GPIOB_AFRL          (PIN_AFIO_AF(GPIOB_BUZZER, 2))
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#define VAL_GPIOB_AFRH          (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, 4) | \
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                                 PIN_AFIO_AF(GPIOB_GAUGE_SDA2, 4) | \
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                                 PIN_AFIO_AF(GPIOB_GAUGE_SCL1, 4) | \
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                                 PIN_AFIO_AF(GPIOB_GAUGE_SDA1, 4) | \
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                                 PIN_AFIO_AF(GPIOB_BT_RTS, 7) | \
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                                 PIN_AFIO_AF(GPIOB_BT_CTS, 7))
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/*
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 * Port C setup.
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 */
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#define VAL_GPIOC_MODER         (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) | \
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                                 PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) | \
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                                 PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) | \
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                                 PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) | \
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                                 PIN_MODE_INPUT(GPIOC_IR_INT2_N) | \
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                                 PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) | \
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                                 PIN_MODE_INPUT(GPIOC_SYS_DONE) | \
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                                 PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) | \
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                                 PIN_MODE_INPUT(GPIOC_PATH_DC) | \
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                                 PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) | \
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                                 PIN_MODE_ALTERNATE(GPIOC_BT_RX) | \
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                                 PIN_MODE_ALTERNATE(GPIOC_BT_TX) | \
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                                 PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) | \
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                                 PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) | \
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                                 PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) | \
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                                 PIN_MODE_OUTPUT(GPIOC_BT_RST))
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#define VAL_GPIOC_OTYPER        (PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) | \
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                                 PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) | \
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                                 PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST))
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#define VAL_GPIOC_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOC_PUPDR         0x00000000
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#define VAL_GPIOC_ODR           0xEEFF /* emulate open drain for PATH_DC. This is required to prevent accidental shortcuts. Furthermore, pull down SYS_INT_N to indicate the OS is starting */
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#define VAL_GPIOC_AFRL          0x00000000
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#define VAL_GPIOC_AFRH          (PIN_AFIO_AF(GPIOC_BT_RX, 7) | \
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                                 PIN_AFIO_AF(GPIOC_BT_TX, 7))
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/*
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 * Port D setup.
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 */
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#define VAL_GPIOD_MODER         (PIN_MODE_INPUT(0) | \
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                                 PIN_MODE_INPUT(1) | \
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                                 PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) | \
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                                 PIN_MODE_INPUT(3) | \
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                                 PIN_MODE_INPUT(4) | \
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                                 PIN_MODE_INPUT(5) | \
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                                 PIN_MODE_INPUT(6) | \
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                                 PIN_MODE_INPUT(7) | \
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                                 PIN_MODE_INPUT(8) | \
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                                 PIN_MODE_INPUT(9) | \
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                                 PIN_MODE_INPUT(10) | \
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                                 PIN_MODE_INPUT(11) | \
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                                 PIN_MODE_INPUT(12) | \
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                                 PIN_MODE_INPUT(13) | \
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                                 PIN_MODE_INPUT(14) | \
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                                 PIN_MODE_INPUT(15))
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#define VAL_GPIOD_OTYPER        (PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N))
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#define VAL_GPIOD_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOD_PUPDR         (PIN_PUDR_PULLUP(0) | \
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                                 PIN_PUDR_PULLUP(1) | \
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                                 PIN_PUDR_FLOATING(GPIOD_CHARGE_EN2_N) | \
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                                 PIN_PUDR_PULLUP(3) | \
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                                 PIN_PUDR_PULLUP(4) | \
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                                 PIN_PUDR_PULLUP(5) | \
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                                 PIN_PUDR_PULLUP(6) | \
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                                 PIN_PUDR_PULLUP(7) | \
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                                 PIN_PUDR_PULLUP(8) | \
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                                 PIN_PUDR_PULLUP(9) | \
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                                 PIN_PUDR_PULLUP(10) | \
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                                 PIN_PUDR_PULLUP(11) | \
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                                 PIN_PUDR_PULLUP(12) | \
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                                 PIN_PUDR_PULLUP(13) | \
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                                 PIN_PUDR_PULLUP(14) | \
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                                 PIN_PUDR_PULLUP(15))
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#define VAL_GPIOD_ODR           0x0FFF
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#define VAL_GPIOD_AFRL          0x00000000
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#define VAL_GPIOD_AFRH          0x00000000
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/*
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 * Port E setup.
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 */
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#define VAL_GPIOE_MODER         0x00000000
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#define VAL_GPIOE_OTYPER        0x00000000
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#define VAL_GPIOE_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOE_PUPDR         0xFFFFFFFF
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#define VAL_GPIOE_ODR           0xFFFF
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#define VAL_GPIOE_AFRL          0x00000000
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#define VAL_GPIOE_AFRH          0x00000000
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/*
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 * Port F setup.
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 * All input with pull-up.
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 */
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#define VAL_GPIOF_MODER         0x00000000
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#define VAL_GPIOF_OTYPER        0x00000000
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#define VAL_GPIOF_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOF_PUPDR         0xFFFFFFFF
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#define VAL_GPIOF_ODR           0xFFFF
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#define VAL_GPIOF_AFRL          0x00000000
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#define VAL_GPIOF_AFRH          0x00000000
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/*
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 * Port G setup.
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 * All input with pull-up.
301
 */
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#define VAL_GPIOG_MODER         0x00000000
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#define VAL_GPIOG_OTYPER        0x00000000
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#define VAL_GPIOG_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOG_PUPDR         0xFFFFFFFF
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#define VAL_GPIOG_ODR           0xFFFF
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#define VAL_GPIOG_AFRL          0x00000000
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#define VAL_GPIOG_AFRH          0x00000000
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/*
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 * Port H setup.
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 */
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#define VAL_GPIOH_MODER         (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
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                                 PIN_MODE_INPUT(GPIOH_OSC_OUT) | \
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                                 PIN_MODE_INPUT(2) | \
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                                 PIN_MODE_INPUT(3) | \
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                                 PIN_MODE_INPUT(4) | \
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                                 PIN_MODE_INPUT(5) | \
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                                 PIN_MODE_INPUT(6) | \
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                                 PIN_MODE_INPUT(7) | \
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                                 PIN_MODE_INPUT(8) | \
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                                 PIN_MODE_INPUT(9) | \
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                                 PIN_MODE_INPUT(10) | \
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                                 PIN_MODE_INPUT(11) | \
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                                 PIN_MODE_INPUT(12) | \
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                                 PIN_MODE_INPUT(13) | \
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                                 PIN_MODE_INPUT(14) | \
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                                 PIN_MODE_INPUT(15))
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#define VAL_GPIOH_OTYPER        0x00000000
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#define VAL_GPIOH_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOH_PUPDR         (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \
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                                 PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \
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                                 PIN_PUDR_PULLUP(2) | \
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                                 PIN_PUDR_PULLUP(3) | \
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                                 PIN_PUDR_PULLUP(4) | \
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                                 PIN_PUDR_PULLUP(5) | \
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                                 PIN_PUDR_PULLUP(6) | \
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                                 PIN_PUDR_PULLUP(7) | \
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                                 PIN_PUDR_PULLUP(8) | \
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                                 PIN_PUDR_PULLUP(9) | \
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                                 PIN_PUDR_PULLUP(10) | \
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                                 PIN_PUDR_PULLUP(11) | \
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                                 PIN_PUDR_PULLUP(12) | \
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                                 PIN_PUDR_PULLUP(13) | \
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                                 PIN_PUDR_PULLUP(14) | \
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                                 PIN_PUDR_PULLUP(15))
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#define VAL_GPIOH_ODR           0xFFFF
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#define VAL_GPIOH_AFRL          0x00000000
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#define VAL_GPIOH_AFRH          0x00000000
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/*
352
 * Port I setup.
353
 * All input with pull-up.
354
 */
355
#define VAL_GPIOI_MODER         0x00000000
356
#define VAL_GPIOI_OTYPER        0x00000000
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#define VAL_GPIOI_OSPEEDR       0xFFFFFFFF
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#define VAL_GPIOI_PUPDR         0xFFFFFFFF
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#define VAL_GPIOI_ODR           0xFFFF
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#define VAL_GPIOI_AFRL          0x00000000
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#define VAL_GPIOI_AFRH          0x00000000
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
365
extern "C" {
366
#endif
367
  void boardInit(void);
368
  void boardWriteIoPower(int value);
369
  void boardWriteLed(int value);
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  void boardWriteSystemPower(int value);
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  void boardWriteWarmRestart(const uint8_t value);
372
  void boardChargerSetState(uint8_t chrg_mask, uint8_t state);
373
  void boardBluetoothSetState(uint8_t state);
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  void boardRequestShutdown(void);
375
  void boardStandby(void);
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  void boardStop(const uint8_t lpds, const uint8_t fpds);
377
  void boardWakeup(void);
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  void boardClearI2CBus(const uint8_t scl_pad, const uint8_t sda_pad);
379
  void boardResetBQ27500I2C(const uint8_t scl_pad, const uint8_t sda_pad);
380
#ifdef __cplusplus
381
}
382
#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */