amiro-os / modules / NUCLEO-F767ZI / board.h @ bc7aed20
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/*
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AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2019 Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* Setup for STMicroelectronics STM32 Nucleo144-F767ZI board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ST_NUCLEO144_F767ZI
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#define BOARD_NAME "STMicroelectronics STM32 Nucleo144-F767ZI" |
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/*
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* Ethernet PHY type.
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*/
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#define BOARD_PHY_ID MII_LAN8742A_ID
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#define BOARD_PHY_RMII
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/*
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* Board oscillators-related settings.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768U |
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#endif
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#define STM32_LSEDRV (3U << 3U) |
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000U |
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#endif
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#define STM32_HSE_BYPASS
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300U |
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F767xx
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/*
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* IO pins assignments.
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*/
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#define GPIOA_ZIO_D32 0U |
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#define GPIOA_TIM2_CH1 0U |
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#define GPIOA_RMII_REF_CLK 1U |
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#define GPIOA_RMII_MDIO 2U |
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#define GPIOA_ARD_A0 3U |
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#define GPIOA_ADC123_IN3 3U |
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#define GPIOA_ZIO_D24 4U |
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#define GPIOA_SPI3_NSS 4U |
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#define GPIOA_ARD_D13 5U |
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#define GPIOA_SPI1_SCK 5U |
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#define GPIOA_ARD_D12 6U |
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#define GPIOA_SPI1_MISO 6U |
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#define GPIOA_ARD_D11 7U |
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#define GPIOA_SPI1_MOSI 7U |
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#define GPIOA_ZIO_D71 7U |
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#define GPIOA_RMII_RX_DV 7U |
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#define GPIOA_USB_SOF 8U |
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#define GPIOA_USB_VBUS 9U |
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#define GPIOA_USB_ID 10U |
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#define GPIOA_USB_DM 11U |
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#define GPIOA_USB_DP 12U |
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#define GPIOA_SWDIO 13U |
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#define GPIOA_SWCLK 14U |
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#define GPIOA_ZIO_D20 15U |
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#define GPIOA_I2S3_WS 15U |
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#define GPIOB_ZIO_D33 0U |
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#define GPIOB_TIM3_CH3 0U |
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#define GPIOB_LED1 0U |
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#define GPIOB_ZIO_A6 1U |
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#define GPIOB_ADC12_IN9 1U |
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#define GPIOB_ZIO_D27 2U |
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#define GPIOB_QSPI_CLK 2U |
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#define GPIOB_ZIO_D23 3U |
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#define GPIOB_I2S3_CK 3U |
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#define GPIOB_ZIO_D25 4U |
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#define GPIOB_SPI3_MISO 4U |
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#define GPIOB_ZIO_D22 5U |
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#define GPIOB_I2S3_SD 5U |
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#define GPIOB_ZIO_D26 6U |
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#define GPIOB_QSPI_BK1_NCS 6U |
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#define GPIOB_LED2 7U |
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#define GPIOB_ARD_D15 8U |
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#define GPIOB_I2C1_SCL 8U |
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#define GPIOB_ARD_D14 9U |
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#define GPIOB_I2C1_SDA 9U |
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#define GPIOB_ZIO_D36 10U |
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#define GPIOB_TIM2_CH3 10U |
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#define GPIOB_ZIO_D35 11U |
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#define GPIOB_TIM2_CH4 11U |
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#define GPIOB_ZIO_D19 12U |
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#define GPIOB_I2S2_WS 12U |
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#define GPIOB_ZIO_D18 13U |
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#define GPIOB_I2S2_CK 13U |
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#define GPIOB_RMII_TXD1 13U |
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#define GPIOB_LED3 14U |
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#define GPIOB_ZIO_D17 15U |
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#define GPIOB_I2S2_SD 15U |
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#define GPIOC_ARD_A1 0U |
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#define GPIOC_ADC123_IN10 0U |
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#define GPIOC_RMII_MDC 1U |
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#define GPIOC_ZIO_A7 2U |
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#define GPIOC_ADC123_IN12 2U |
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#define GPIOC_ARD_A2 3U |
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#define GPIOC_ADC123_IN13 3U |
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#define GPIOC_RMII_RXD0 4U |
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#define GPIOC_RMII_RXD1 5U |
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#define GPIOC_ZIO_D16 6U |
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#define GPIOC_I2S2_MCK 6U |
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#define GPIOC_ZIO_D21 7U |
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#define GPIOC_I2S3_MCK 7U |
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#define GPIOC_ZIO_D43 8U |
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#define GPIOC_SDMMC_D0 8U |
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#define GPIOC_ZIO_D44 9U |
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#define GPIOC_SDMMC_D1 9U |
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#define GPIOC_ZIO_D45 10U |
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#define GPIOC_SDMMC_D2 10U |
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#define GPIOC_ZIO_D46 11U |
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#define GPIOC_SDMMC_D3 11U |
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#define GPIOC_ZIO_D47 12U |
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#define GPIOC_SDMMC_CK 12U |
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#define GPIOC_BUTTON 13U |
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#define GPIOC_OSC32_IN 14U |
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#define GPIOC_OSC32_OUT 15U |
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#define GPIOD_ZIO_D67 0U |
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#define GPIOD_CAN1_RX 0U |
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#define GPIOD_ZIO_D66 1U |
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#define GPIOD_CAN1_TX 1U |
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#define GPIOD_ZIO_D48 2U |
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#define GPIOD_SDMMC_CMD 2U |
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#define GPIOD_ZIO_D55 3U |
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#define GPIOD_USART2_CTS 3U |
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#define GPIOD_ZIO_D54 4U |
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#define GPIOD_USART2_RTS 4U |
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#define GPIOD_ZIO_D53 5U |
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#define GPIOD_USART2_TX 5U |
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#define GPIOD_ZIO_D52 6U |
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#define GPIOD_USART2_RX 6U |
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#define GPIOD_ZIO_D51 7U |
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#define GPIOD_USART2_SCLK 7U |
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#define GPIOD_USART3_RX 8U |
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#define GPIOD_STLK_RX 8U |
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#define GPIOD_USART3_TX 9U |
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#define GPIOD_STLK_TX 9U |
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#define GPIOD_PIN10 10U |
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#define GPIOD_ZIO_D30 11U |
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#define GPIOD_QSPI_BK1_IO0 11U |
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#define GPIOD_ZIO_D29 12U |
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#define GPIOD_QSPI_BK1_IO1 12U |
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#define GPIOD_ZIO_D28 13U |
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#define GPIOD_QSPI_BK1_IO3 13U |
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#define GPIOD_ARD_D10 14U |
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#define GPIOD_SPI1_NSS 14U |
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#define GPIOD_ARD_D9 15U |
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#define GPIOD_TIM4_CH4 15U |
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#define GPIOE_ZIO_D34 0U |
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#define GPIOE_TIM4_ETR 0U |
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#define GPIOE_PIN1 1U |
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#define GPIOE_ZIO_D31 2U |
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#define GPIOE_ZIO_D56 2U |
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#define GPIOE_SAI1_MCLK_A 2U |
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#define GPIOE_ZIO_D60 3U |
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#define GPIOE_SAI1_SD_B 3U |
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#define GPIOE_ZIO_D57 4U |
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#define GPIOE_SAI1_FS_A 4U |
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#define GPIOE_ZIO_D58 5U |
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#define GPIOE_SAI1_SCK_A 5U |
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#define GPIOE_ZIO_D59 6U |
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#define GPIOE_SAI1_SD_A 6U |
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#define GPIOE_ZIO_D41 7U |
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#define GPIOE_TIM1_ETR 7U |
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#define GPIOE_ZIO_D42 8U |
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#define GPIOE_TIM1_CH1N 8U |
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#define GPIOE_ARD_D6 9U |
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#define GPIOE_TIM1_CH1 9U |
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#define GPIOE_ZIO_D40 10U |
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#define GPIOE_TIM1_CH2N 10U |
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#define GPIOE_ARD_D5 11U |
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#define GPIOE_TIM1_CH2 11U |
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#define GPIOE_ZIO_D39 12U |
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#define GPIOE_TIM1_CH3N 12U |
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#define GPIOE_ARD_D3 13U |
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#define GPIOE_TIM1_CH3 13U |
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#define GPIOE_ZIO_D38 14U |
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#define GPIOE_ZIO_D37 15U |
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#define GPIOE_TIM1_BKIN1 15U |
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#define GPIOF_ZIO_D68 0U |
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#define GPIOF_I2C2_SDA 0U |
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#define GPIOF_ZIO_D69 1U |
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#define GPIOF_I2C2_SCL 1U |
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#define GPIOF_ZIO_D70 2U |
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#define GPIOF_I2C2_SMBA 2U |
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#define GPIOF_ARD_A3 3U |
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#define GPIOF_ADC3_IN9 3U |
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#define GPIOF_ZIO_A8 4U |
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#define GPIOF_ADC3_IN14 4U |
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#define GPIOF_ARD_A4 5U |
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#define GPIOF_ADC3_IN15 5U |
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#define GPIOF_PIN6 6U |
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#define GPIOF_ZIO_D62 7U |
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#define GPIOF_SAI1_MCLK_B 7U |
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#define GPIOF_ZIO_D61 8U |
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#define GPIOF_SAI1_SCK_B 8U |
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#define GPIOF_ZIO_D63 9U |
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#define GPIOF_SAI1_FS_B 9U |
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#define GPIOF_ARD_A5 10U |
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#define GPIOF_ADC3_IN8 10U |
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#define GPIOF_PIN11 11U |
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#define GPIOF_ARD_D8 12U |
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#define GPIOF_ARD_D7 13U |
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#define GPIOF_ARD_D4 14U |
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#define GPIOF_ARD_D2 15U |
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#define GPIOG_ZIO_D65 0U |
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#define GPIOG_ZIO_D64 1U |
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#define GPIOG_ZIO_D49 2U |
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#define GPIOG_ZIO_D50 3U |
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#define GPIOG_PIN4 4U |
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#define GPIOG_PIN5 5U |
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#define GPIOG_USB_GPIO_OUT 6U |
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#define GPIOG_USB_GPIO_IN 7U |
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#define GPIOG_PIN8 8U |
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#define GPIOG_ARD_D0 9U |
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#define GPIOG_USART6_RX 9U |
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#define GPIOG_PIN10 10U |
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#define GPIOG_RMII_TX_EN 11U |
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#define GPIOG_PIN12 12U |
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#define GPIOG_RMII_TXD0 13U |
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#define GPIOG_ARD_D1 14U |
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#define GPIOG_USART6_TX 14U |
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#define GPIOG_PIN15 15U |
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#define GPIOH_OSC_IN 0U |
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#define GPIOH_OSC_OUT 1U |
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#define GPIOH_PIN2 2U |
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#define GPIOH_PIN3 3U |
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#define GPIOH_PIN4 4U |
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#define GPIOH_PIN5 5U |
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#define GPIOH_PIN6 6U |
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#define GPIOH_PIN7 7U |
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#define GPIOH_PIN8 8U |
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#define GPIOH_PIN9 9U |
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#define GPIOH_PIN10 10U |
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#define GPIOH_PIN11 11U |
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#define GPIOH_PIN12 12U |
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#define GPIOH_PIN13 13U |
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#define GPIOH_PIN14 14U |
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#define GPIOH_PIN15 15U |
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#define GPIOI_PIN0 0U |
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#define GPIOI_PIN1 1U |
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#define GPIOI_PIN2 2U |
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#define GPIOI_PIN3 3U |
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#define GPIOI_PIN4 4U |
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#define GPIOI_PIN5 5U |
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#define GPIOI_PIN6 6U |
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#define GPIOI_PIN7 7U |
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#define GPIOI_PIN8 8U |
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#define GPIOI_PIN9 9U |
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#define GPIOI_PIN10 10U |
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#define GPIOI_PIN11 11U |
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#define GPIOI_PIN12 12U |
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#define GPIOI_PIN13 13U |
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#define GPIOI_PIN14 14U |
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#define GPIOI_PIN15 15U |
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#define GPIOJ_PIN0 0U |
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#define GPIOJ_PIN1 1U |
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#define GPIOJ_PIN2 2U |
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#define GPIOJ_PIN3 3U |
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#define GPIOJ_PIN4 4U |
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#define GPIOJ_PIN5 5U |
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#define GPIOJ_PIN6 6U |
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#define GPIOJ_PIN7 7U |
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#define GPIOJ_PIN8 8U |
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#define GPIOJ_PIN9 9U |
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#define GPIOJ_PIN10 10U |
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#define GPIOJ_PIN11 11U |
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#define GPIOJ_PIN12 12U |
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#define GPIOJ_PIN13 13U |
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#define GPIOJ_PIN14 14U |
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#define GPIOJ_PIN15 15U |
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#define GPIOK_PIN0 0U |
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#define GPIOK_PIN1 1U |
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#define GPIOK_PIN2 2U |
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#define GPIOK_PIN3 3U |
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#define GPIOK_PIN4 4U |
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#define GPIOK_PIN5 5U |
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#define GPIOK_PIN6 6U |
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#define GPIOK_PIN7 7U |
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#define GPIOK_PIN8 8U |
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#define GPIOK_PIN9 9U |
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#define GPIOK_PIN10 10U |
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#define GPIOK_PIN11 11U |
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#define GPIOK_PIN12 12U |
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#define GPIOK_PIN13 13U |
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#define GPIOK_PIN14 14U |
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#define GPIOK_PIN15 15U |
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/*
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* IO lines assignments.
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*/
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#define LINE_ZIO_D32 PAL_LINE(GPIOA, 0U) |
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#define LINE_TIM2_CH1 PAL_LINE(GPIOA, 0U) |
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#define LINE_RMII_REF_CLK PAL_LINE(GPIOA, 1U) |
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#define LINE_RMII_MDIO PAL_LINE(GPIOA, 2U) |
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#define LINE_ARD_A0 PAL_LINE(GPIOA, 3U) |
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#define LINE_ADC123_IN3 PAL_LINE(GPIOA, 3U) |
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#define LINE_ZIO_D24 PAL_LINE(GPIOA, 4U) |
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#define LINE_SPI3_NSS PAL_LINE(GPIOA, 4U) |
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#define LINE_ARD_D13 PAL_LINE(GPIOA, 5U) |
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#define LINE_SPI1_SCK PAL_LINE(GPIOA, 5U) |
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#define LINE_ARD_D12 PAL_LINE(GPIOA, 6U) |
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#define LINE_SPI1_MISO PAL_LINE(GPIOA, 6U) |
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#define LINE_ARD_D11 PAL_LINE(GPIOA, 7U) |
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#define LINE_SPI1_MOSI PAL_LINE(GPIOA, 7U) |
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#define LINE_ZIO_D71 PAL_LINE(GPIOA, 7U) |
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#define LINE_RMII_RX_DV PAL_LINE(GPIOA, 7U) |
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#define LINE_USB_SOF PAL_LINE(GPIOA, 8U) |
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#define LINE_USB_VBUS PAL_LINE(GPIOA, 9U) |
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#define LINE_USB_ID PAL_LINE(GPIOA, 10U) |
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#define LINE_USB_DM PAL_LINE(GPIOA, 11U) |
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#define LINE_USB_DP PAL_LINE(GPIOA, 12U) |
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#define LINE_SWDIO PAL_LINE(GPIOA, 13U) |
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#define LINE_SWCLK PAL_LINE(GPIOA, 14U) |
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#define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U) |
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#define LINE_I2S3_WS PAL_LINE(GPIOA, 15U) |
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#define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U) |
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#define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U) |
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#define LINE_LED1 PAL_LINE(GPIOB, 0U) |
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#define LINE_ZIO_A6 PAL_LINE(GPIOB, 1U) |
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#define LINE_ADC12_IN9 PAL_LINE(GPIOB, 1U) |
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#define LINE_ZIO_D27 PAL_LINE(GPIOB, 2U) |
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#define LINE_QSPI_CLK PAL_LINE(GPIOB, 2U) |
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#define LINE_ZIO_D23 PAL_LINE(GPIOB, 3U) |
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#define LINE_I2S3_CK PAL_LINE(GPIOB, 3U) |
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#define LINE_ZIO_D25 PAL_LINE(GPIOB, 4U) |
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#define LINE_SPI3_MISO PAL_LINE(GPIOB, 4U) |
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#define LINE_ZIO_D22 PAL_LINE(GPIOB, 5U) |
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#define LINE_I2S3_SD PAL_LINE(GPIOB, 5U) |
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#define LINE_ZIO_D26 PAL_LINE(GPIOB, 6U) |
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#define LINE_QSPI_BK1_NCS PAL_LINE(GPIOB, 6U) |
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#define LINE_LED2 PAL_LINE(GPIOB, 7U) |
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#define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) |
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#define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U) |
381 |
#define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) |
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#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U) |
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#define LINE_ZIO_D36 PAL_LINE(GPIOB, 10U) |
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#define LINE_TIM2_CH3 PAL_LINE(GPIOB, 10U) |
385 |
#define LINE_ZIO_D35 PAL_LINE(GPIOB, 11U) |
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#define LINE_TIM2_CH4 PAL_LINE(GPIOB, 11U) |
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#define LINE_ZIO_D19 PAL_LINE(GPIOB, 12U) |
388 |
#define LINE_I2S2_WS PAL_LINE(GPIOB, 12U) |
389 |
#define LINE_ZIO_D18 PAL_LINE(GPIOB, 13U) |
390 |
#define LINE_I2S2_CK PAL_LINE(GPIOB, 13U) |
391 |
#define LINE_RMII_TXD1 PAL_LINE(GPIOB, 13U) |
392 |
#define LINE_LED3 PAL_LINE(GPIOB, 14U) |
393 |
#define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U) |
394 |
#define LINE_I2S2_SD PAL_LINE(GPIOB, 15U) |
395 |
#define LINE_ARD_A1 PAL_LINE(GPIOC, 0U) |
396 |
#define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U) |
397 |
#define LINE_RMII_MDC PAL_LINE(GPIOC, 1U) |
398 |
#define LINE_ZIO_A7 PAL_LINE(GPIOC, 2U) |
399 |
#define LINE_ADC123_IN12 PAL_LINE(GPIOC, 2U) |
400 |
#define LINE_ARD_A2 PAL_LINE(GPIOC, 3U) |
401 |
#define LINE_ADC123_IN13 PAL_LINE(GPIOC, 3U) |
402 |
#define LINE_RMII_RXD0 PAL_LINE(GPIOC, 4U) |
403 |
#define LINE_RMII_RXD1 PAL_LINE(GPIOC, 5U) |
404 |
#define LINE_ZIO_D16 PAL_LINE(GPIOC, 6U) |
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#define LINE_I2S2_MCK PAL_LINE(GPIOC, 6U) |
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#define LINE_ZIO_D21 PAL_LINE(GPIOC, 7U) |
407 |
#define LINE_I2S3_MCK PAL_LINE(GPIOC, 7U) |
408 |
#define LINE_ZIO_D43 PAL_LINE(GPIOC, 8U) |
409 |
#define LINE_SDMMC_D0 PAL_LINE(GPIOC, 8U) |
410 |
#define LINE_ZIO_D44 PAL_LINE(GPIOC, 9U) |
411 |
#define LINE_SDMMC_D1 PAL_LINE(GPIOC, 9U) |
412 |
#define LINE_ZIO_D45 PAL_LINE(GPIOC, 10U) |
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#define LINE_SDMMC_D2 PAL_LINE(GPIOC, 10U) |
414 |
#define LINE_ZIO_D46 PAL_LINE(GPIOC, 11U) |
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#define LINE_SDMMC_D3 PAL_LINE(GPIOC, 11U) |
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#define LINE_ZIO_D47 PAL_LINE(GPIOC, 12U) |
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#define LINE_SDMMC_CK PAL_LINE(GPIOC, 12U) |
418 |
#define LINE_BUTTON PAL_LINE(GPIOC, 13U) |
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#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) |
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#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) |
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#define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U) |
422 |
#define LINE_CAN1_RX PAL_LINE(GPIOD, 0U) |
423 |
#define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U) |
424 |
#define LINE_CAN1_TX PAL_LINE(GPIOD, 1U) |
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#define LINE_ZIO_D48 PAL_LINE(GPIOD, 2U) |
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#define LINE_SDMMC_CMD PAL_LINE(GPIOD, 2U) |
427 |
#define LINE_ZIO_D55 PAL_LINE(GPIOD, 3U) |
428 |
#define LINE_USART2_CTS PAL_LINE(GPIOD, 3U) |
429 |
#define LINE_ZIO_D54 PAL_LINE(GPIOD, 4U) |
430 |
#define LINE_USART2_RTS PAL_LINE(GPIOD, 4U) |
431 |
#define LINE_ZIO_D53 PAL_LINE(GPIOD, 5U) |
432 |
#define LINE_USART2_TX PAL_LINE(GPIOD, 5U) |
433 |
#define LINE_ZIO_D52 PAL_LINE(GPIOD, 6U) |
434 |
#define LINE_USART2_RX PAL_LINE(GPIOD, 6U) |
435 |
#define LINE_ZIO_D51 PAL_LINE(GPIOD, 7U) |
436 |
#define LINE_USART2_SCLK PAL_LINE(GPIOD, 7U) |
437 |
#define LINE_USART3_RX PAL_LINE(GPIOD, 8U) |
438 |
#define LINE_STLK_RX PAL_LINE(GPIOD, 8U) |
439 |
#define LINE_USART3_TX PAL_LINE(GPIOD, 9U) |
440 |
#define LINE_STLK_TX PAL_LINE(GPIOD, 9U) |
441 |
#define LINE_ZIO_D30 PAL_LINE(GPIOD, 11U) |
442 |
#define LINE_QSPI_BK1_IO0 PAL_LINE(GPIOD, 11U) |
443 |
#define LINE_ZIO_D29 PAL_LINE(GPIOD, 12U) |
444 |
#define LINE_QSPI_BK1_IO1 PAL_LINE(GPIOD, 12U) |
445 |
#define LINE_ZIO_D28 PAL_LINE(GPIOD, 13U) |
446 |
#define LINE_QSPI_BK1_IO3 PAL_LINE(GPIOD, 13U) |
447 |
#define LINE_ARD_D10 PAL_LINE(GPIOD, 14U) |
448 |
#define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U) |
449 |
#define LINE_ARD_D9 PAL_LINE(GPIOD, 15U) |
450 |
#define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U) |
451 |
#define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U) |
452 |
#define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U) |
453 |
#define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U) |
454 |
#define LINE_ZIO_D56 PAL_LINE(GPIOE, 2U) |
455 |
#define LINE_SAI1_MCLK_A PAL_LINE(GPIOE, 2U) |
456 |
#define LINE_ZIO_D60 PAL_LINE(GPIOE, 3U) |
457 |
#define LINE_SAI1_SD_B PAL_LINE(GPIOE, 3U) |
458 |
#define LINE_ZIO_D57 PAL_LINE(GPIOE, 4U) |
459 |
#define LINE_SAI1_FS_A PAL_LINE(GPIOE, 4U) |
460 |
#define LINE_ZIO_D58 PAL_LINE(GPIOE, 5U) |
461 |
#define LINE_SAI1_SCK_A PAL_LINE(GPIOE, 5U) |
462 |
#define LINE_ZIO_D59 PAL_LINE(GPIOE, 6U) |
463 |
#define LINE_SAI1_SD_A PAL_LINE(GPIOE, 6U) |
464 |
#define LINE_ZIO_D41 PAL_LINE(GPIOE, 7U) |
465 |
#define LINE_TIM1_ETR PAL_LINE(GPIOE, 7U) |
466 |
#define LINE_ZIO_D42 PAL_LINE(GPIOE, 8U) |
467 |
#define LINE_TIM1_CH1N PAL_LINE(GPIOE, 8U) |
468 |
#define LINE_ARD_D6 PAL_LINE(GPIOE, 9U) |
469 |
#define LINE_TIM1_CH1 PAL_LINE(GPIOE, 9U) |
470 |
#define LINE_ZIO_D40 PAL_LINE(GPIOE, 10U) |
471 |
#define LINE_TIM1_CH2N PAL_LINE(GPIOE, 10U) |
472 |
#define LINE_ARD_D5 PAL_LINE(GPIOE, 11U) |
473 |
#define LINE_TIM1_CH2 PAL_LINE(GPIOE, 11U) |
474 |
#define LINE_ZIO_D39 PAL_LINE(GPIOE, 12U) |
475 |
#define LINE_TIM1_CH3N PAL_LINE(GPIOE, 12U) |
476 |
#define LINE_ARD_D3 PAL_LINE(GPIOE, 13U) |
477 |
#define LINE_TIM1_CH3 PAL_LINE(GPIOE, 13U) |
478 |
#define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U) |
479 |
#define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U) |
480 |
#define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U) |
481 |
#define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U) |
482 |
#define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U) |
483 |
#define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U) |
484 |
#define LINE_I2C2_SCL PAL_LINE(GPIOF, 1U) |
485 |
#define LINE_ZIO_D70 PAL_LINE(GPIOF, 2U) |
486 |
#define LINE_I2C2_SMBA PAL_LINE(GPIOF, 2U) |
487 |
#define LINE_ARD_A3 PAL_LINE(GPIOF, 3U) |
488 |
#define LINE_ADC3_IN9 PAL_LINE(GPIOF, 3U) |
489 |
#define LINE_ZIO_A8 PAL_LINE(GPIOF, 4U) |
490 |
#define LINE_ADC3_IN14 PAL_LINE(GPIOF, 4U) |
491 |
#define LINE_ARD_A4 PAL_LINE(GPIOF, 5U) |
492 |
#define LINE_ADC3_IN15 PAL_LINE(GPIOF, 5U) |
493 |
#define LINE_ZIO_D62 PAL_LINE(GPIOF, 7U) |
494 |
#define LINE_SAI1_MCLK_B PAL_LINE(GPIOF, 7U) |
495 |
#define LINE_ZIO_D61 PAL_LINE(GPIOF, 8U) |
496 |
#define LINE_SAI1_SCK_B PAL_LINE(GPIOF, 8U) |
497 |
#define LINE_ZIO_D63 PAL_LINE(GPIOF, 9U) |
498 |
#define LINE_SAI1_FS_B PAL_LINE(GPIOF, 9U) |
499 |
#define LINE_ARD_A5 PAL_LINE(GPIOF, 10U) |
500 |
#define LINE_ADC3_IN8 PAL_LINE(GPIOF, 10U) |
501 |
#define LINE_ARD_D8 PAL_LINE(GPIOF, 12U) |
502 |
#define LINE_ARD_D7 PAL_LINE(GPIOF, 13U) |
503 |
#define LINE_ARD_D4 PAL_LINE(GPIOF, 14U) |
504 |
#define LINE_ARD_D2 PAL_LINE(GPIOF, 15U) |
505 |
#define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U) |
506 |
#define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U) |
507 |
#define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U) |
508 |
#define LINE_ZIO_D50 PAL_LINE(GPIOG, 3U) |
509 |
#define LINE_USB_GPIO_OUT PAL_LINE(GPIOG, 6U) |
510 |
#define LINE_USB_GPIO_IN PAL_LINE(GPIOG, 7U) |
511 |
#define LINE_ARD_D0 PAL_LINE(GPIOG, 9U) |
512 |
#define LINE_USART6_RX PAL_LINE(GPIOG, 9U) |
513 |
#define LINE_RMII_TX_EN PAL_LINE(GPIOG, 11U) |
514 |
#define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U) |
515 |
#define LINE_ARD_D1 PAL_LINE(GPIOG, 14U) |
516 |
#define LINE_USART6_TX PAL_LINE(GPIOG, 14U) |
517 |
#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) |
518 |
#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) |
519 |
|
520 |
/*===========================================================================*/
|
521 |
/* Driver pre-compile time settings. */
|
522 |
/*===========================================================================*/
|
523 |
|
524 |
/*===========================================================================*/
|
525 |
/* Derived constants and error checks. */
|
526 |
/*===========================================================================*/
|
527 |
|
528 |
/*===========================================================================*/
|
529 |
/* Driver data structures and types. */
|
530 |
/*===========================================================================*/
|
531 |
|
532 |
/*===========================================================================*/
|
533 |
/* Driver macros. */
|
534 |
/*===========================================================================*/
|
535 |
|
536 |
/*
|
537 |
* I/O ports initial setup, this configuration is established soon after reset
|
538 |
* in the initialization code.
|
539 |
* Please refer to the STM32 Reference Manual for details.
|
540 |
*/
|
541 |
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
542 |
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
543 |
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
544 |
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
545 |
#define PIN_ODR_LOW(n) (0U << (n)) |
546 |
#define PIN_ODR_HIGH(n) (1U << (n)) |
547 |
#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
548 |
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
549 |
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) |
550 |
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) |
551 |
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) |
552 |
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) |
553 |
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
554 |
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
555 |
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
556 |
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
557 |
|
558 |
/*
|
559 |
* GPIOA setup:
|
560 |
*
|
561 |
* PA0 - ZIO_D32 TIM2_CH1 (input pullup).
|
562 |
* PA1 - RMII_REF_CLK (alternate 11).
|
563 |
* PA2 - RMII_MDIO (alternate 11).
|
564 |
* PA3 - ARD_A0 ADC123_IN3 (input pullup).
|
565 |
* PA4 - ZIO_D24 SPI3_NSS (input pullup).
|
566 |
* PA5 - ARD_D13 SPI1_SCK (input pullup).
|
567 |
* PA6 - ARD_D12 SPI1_MISO (input pullup).
|
568 |
* PA7 - ARD_D11 SPI1_MOSI ZIO_D71 RMII_RX_DV(alternate 11).
|
569 |
* PA8 - USB_SOF (alternate 10).
|
570 |
* PA9 - USB_VBUS (analog).
|
571 |
* PA10 - USB_ID (alternate 10).
|
572 |
* PA11 - USB_DM (alternate 10).
|
573 |
* PA12 - USB_DP (alternate 10).
|
574 |
* PA13 - SWDIO (alternate 0).
|
575 |
* PA14 - SWCLK (alternate 0).
|
576 |
* PA15 - ZIO_D20 I2S3_WS (input pullup).
|
577 |
*/
|
578 |
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ZIO_D32) | \
|
579 |
PIN_MODE_ALTERNATE(GPIOA_RMII_REF_CLK) |\ |
580 |
PIN_MODE_ALTERNATE(GPIOA_RMII_MDIO) | \ |
581 |
PIN_MODE_INPUT(GPIOA_ARD_A0) | \ |
582 |
PIN_MODE_INPUT(GPIOA_ZIO_D24) | \ |
583 |
PIN_MODE_INPUT(GPIOA_ARD_D13) | \ |
584 |
PIN_MODE_INPUT(GPIOA_ARD_D12) | \ |
585 |
PIN_MODE_ALTERNATE(GPIOA_ARD_D11) | \ |
586 |
PIN_MODE_ALTERNATE(GPIOA_USB_SOF) | \ |
587 |
PIN_MODE_ANALOG(GPIOA_USB_VBUS) | \ |
588 |
PIN_MODE_ALTERNATE(GPIOA_USB_ID) | \ |
589 |
PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \ |
590 |
PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \ |
591 |
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ |
592 |
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ |
593 |
PIN_MODE_INPUT(GPIOA_ZIO_D20)) |
594 |
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D32) | \
|
595 |
PIN_OTYPE_PUSHPULL(GPIOA_RMII_REF_CLK) |\ |
596 |
PIN_OTYPE_PUSHPULL(GPIOA_RMII_MDIO) | \ |
597 |
PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \ |
598 |
PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D24) | \ |
599 |
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D13) | \ |
600 |
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | \ |
601 |
PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | \ |
602 |
PIN_OTYPE_PUSHPULL(GPIOA_USB_SOF) | \ |
603 |
PIN_OTYPE_PUSHPULL(GPIOA_USB_VBUS) | \ |
604 |
PIN_OTYPE_PUSHPULL(GPIOA_USB_ID) | \ |
605 |
PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \ |
606 |
PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \ |
607 |
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ |
608 |
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ |
609 |
PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D20)) |
610 |
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ZIO_D32) | \
|
611 |
PIN_OSPEED_HIGH(GPIOA_RMII_REF_CLK) | \ |
612 |
PIN_OSPEED_HIGH(GPIOA_RMII_MDIO) | \ |
613 |
PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \ |
614 |
PIN_OSPEED_HIGH(GPIOA_ZIO_D24) | \ |
615 |
PIN_OSPEED_HIGH(GPIOA_ARD_D13) | \ |
616 |
PIN_OSPEED_HIGH(GPIOA_ARD_D12) | \ |
617 |
PIN_OSPEED_HIGH(GPIOA_ARD_D11) | \ |
618 |
PIN_OSPEED_HIGH(GPIOA_USB_SOF) | \ |
619 |
PIN_OSPEED_HIGH(GPIOA_USB_VBUS) | \ |
620 |
PIN_OSPEED_HIGH(GPIOA_USB_ID) | \ |
621 |
PIN_OSPEED_HIGH(GPIOA_USB_DM) | \ |
622 |
PIN_OSPEED_HIGH(GPIOA_USB_DP) | \ |
623 |
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ |
624 |
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ |
625 |
PIN_OSPEED_HIGH(GPIOA_ZIO_D20)) |
626 |
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ZIO_D32) | \
|
627 |
PIN_PUPDR_FLOATING(GPIOA_RMII_REF_CLK) |\ |
628 |
PIN_PUPDR_PULLUP(GPIOA_RMII_MDIO) | \ |
629 |
PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \ |
630 |
PIN_PUPDR_PULLUP(GPIOA_ZIO_D24) | \ |
631 |
PIN_PUPDR_PULLUP(GPIOA_ARD_D13) | \ |
632 |
PIN_PUPDR_PULLUP(GPIOA_ARD_D12) | \ |
633 |
PIN_PUPDR_PULLUP(GPIOA_ARD_D11) | \ |
634 |
PIN_PUPDR_FLOATING(GPIOA_USB_SOF) | \ |
635 |
PIN_PUPDR_FLOATING(GPIOA_USB_VBUS) | \ |
636 |
PIN_PUPDR_FLOATING(GPIOA_USB_ID) | \ |
637 |
PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \ |
638 |
PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \ |
639 |
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ |
640 |
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ |
641 |
PIN_PUPDR_PULLUP(GPIOA_ZIO_D20)) |
642 |
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ZIO_D32) | \
|
643 |
PIN_ODR_HIGH(GPIOA_RMII_REF_CLK) | \ |
644 |
PIN_ODR_HIGH(GPIOA_RMII_MDIO) | \ |
645 |
PIN_ODR_HIGH(GPIOA_ARD_A0) | \ |
646 |
PIN_ODR_HIGH(GPIOA_ZIO_D24) | \ |
647 |
PIN_ODR_HIGH(GPIOA_ARD_D13) | \ |
648 |
PIN_ODR_HIGH(GPIOA_ARD_D12) | \ |
649 |
PIN_ODR_HIGH(GPIOA_ARD_D11) | \ |
650 |
PIN_ODR_HIGH(GPIOA_USB_SOF) | \ |
651 |
PIN_ODR_HIGH(GPIOA_USB_VBUS) | \ |
652 |
PIN_ODR_HIGH(GPIOA_USB_ID) | \ |
653 |
PIN_ODR_HIGH(GPIOA_USB_DM) | \ |
654 |
PIN_ODR_HIGH(GPIOA_USB_DP) | \ |
655 |
PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
656 |
PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
657 |
PIN_ODR_HIGH(GPIOA_ZIO_D20)) |
658 |
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ZIO_D32, 0U) | \ |
659 |
PIN_AFIO_AF(GPIOA_RMII_REF_CLK, 11U) | \
|
660 |
PIN_AFIO_AF(GPIOA_RMII_MDIO, 11U) | \
|
661 |
PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \
|
662 |
PIN_AFIO_AF(GPIOA_ZIO_D24, 0U) | \
|
663 |
PIN_AFIO_AF(GPIOA_ARD_D13, 0U) | \
|
664 |
PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | \
|
665 |
PIN_AFIO_AF(GPIOA_ARD_D11, 11U))
|
666 |
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_USB_SOF, 10U) | \ |
667 |
PIN_AFIO_AF(GPIOA_USB_VBUS, 0U) | \
|
668 |
PIN_AFIO_AF(GPIOA_USB_ID, 10U) | \
|
669 |
PIN_AFIO_AF(GPIOA_USB_DM, 10U) | \
|
670 |
PIN_AFIO_AF(GPIOA_USB_DP, 10U) | \
|
671 |
PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
|
672 |
PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
|
673 |
PIN_AFIO_AF(GPIOA_ZIO_D20, 0U))
|
674 |
|
675 |
/*
|
676 |
* GPIOB setup:
|
677 |
*
|
678 |
* PB0 - ZIO_D33 TIM3_CH3 LED1 (output pushpull maximum).
|
679 |
* PB1 - ZIO_A6 ADC12_IN9 (input pullup).
|
680 |
* PB2 - ZIO_D27 QSPI_CLK (input pullup).
|
681 |
* PB3 - ZIO_D23 I2S3_CK (input pullup).
|
682 |
* PB4 - ZIO_D25 SPI3_MISO (input pullup).
|
683 |
* PB5 - ZIO_D22 I2S3_SD (input pullup).
|
684 |
* PB6 - ZIO_D26 QSPI_BK1_NCS (input pullup).
|
685 |
* PB7 - LED2 (output pushpull maximum).
|
686 |
* PB8 - ARD_D15 I2C1_SCL (input pullup).
|
687 |
* PB9 - ARD_D14 I2C1_SDA (input pullup).
|
688 |
* PB10 - ZIO_D36 TIM2_CH3 (input pullup).
|
689 |
* PB11 - ZIO_D35 TIM2_CH4 (input pullup).
|
690 |
* PB12 - ZIO_D19 I2S2_WS (input pullup).
|
691 |
* PB13 - ZIO_D18 I2S2_CK RMII_TXD1 (alternate 11).
|
692 |
* PB14 - LED3 (output pushpull maximum).
|
693 |
* PB15 - ZIO_D17 I2S2_SD (input pullup).
|
694 |
*/
|
695 |
#define VAL_GPIOB_MODER (PIN_MODE_OUTPUT(GPIOB_ZIO_D33) | \
|
696 |
PIN_MODE_INPUT(GPIOB_ZIO_A6) | \ |
697 |
PIN_MODE_INPUT(GPIOB_ZIO_D27) | \ |
698 |
PIN_MODE_INPUT(GPIOB_ZIO_D23) | \ |
699 |
PIN_MODE_INPUT(GPIOB_ZIO_D25) | \ |
700 |
PIN_MODE_INPUT(GPIOB_ZIO_D22) | \ |
701 |
PIN_MODE_INPUT(GPIOB_ZIO_D26) | \ |
702 |
PIN_MODE_OUTPUT(GPIOB_LED2) | \ |
703 |
PIN_MODE_INPUT(GPIOB_ARD_D15) | \ |
704 |
PIN_MODE_INPUT(GPIOB_ARD_D14) | \ |
705 |
PIN_MODE_INPUT(GPIOB_ZIO_D36) | \ |
706 |
PIN_MODE_INPUT(GPIOB_ZIO_D35) | \ |
707 |
PIN_MODE_INPUT(GPIOB_ZIO_D19) | \ |
708 |
PIN_MODE_ALTERNATE(GPIOB_ZIO_D18) | \ |
709 |
PIN_MODE_OUTPUT(GPIOB_LED3) | \ |
710 |
PIN_MODE_INPUT(GPIOB_ZIO_D17)) |
711 |
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D33) | \
|
712 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_A6) | \ |
713 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D27) | \ |
714 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D23) | \ |
715 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D25) | \ |
716 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D22) | \ |
717 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D26) | \ |
718 |
PIN_OTYPE_PUSHPULL(GPIOB_LED2) | \ |
719 |
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) | \ |
720 |
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) | \ |
721 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D36) | \ |
722 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D35) | \ |
723 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D19) | \ |
724 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D18) | \ |
725 |
PIN_OTYPE_PUSHPULL(GPIOB_LED3) | \ |
726 |
PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D17)) |
727 |
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ZIO_D33) | \
|
728 |
PIN_OSPEED_HIGH(GPIOB_ZIO_A6) | \ |
729 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D27) | \ |
730 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D23) | \ |
731 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D25) | \ |
732 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D22) | \ |
733 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D26) | \ |
734 |
PIN_OSPEED_HIGH(GPIOB_LED2) | \ |
735 |
PIN_OSPEED_HIGH(GPIOB_ARD_D15) | \ |
736 |
PIN_OSPEED_HIGH(GPIOB_ARD_D14) | \ |
737 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D36) | \ |
738 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D35) | \ |
739 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D19) | \ |
740 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D18) | \ |
741 |
PIN_OSPEED_HIGH(GPIOB_LED3) | \ |
742 |
PIN_OSPEED_HIGH(GPIOB_ZIO_D17)) |
743 |
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_ZIO_D33) | \
|
744 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_A6) | \ |
745 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D27) | \ |
746 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D23) | \ |
747 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D25) | \ |
748 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D22) | \ |
749 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D26) | \ |
750 |
PIN_PUPDR_FLOATING(GPIOB_LED2) | \ |
751 |
PIN_PUPDR_PULLUP(GPIOB_ARD_D15) | \ |
752 |
PIN_PUPDR_PULLUP(GPIOB_ARD_D14) | \ |
753 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D36) | \ |
754 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D35) | \ |
755 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D19) | \ |
756 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D18) | \ |
757 |
PIN_PUPDR_FLOATING(GPIOB_LED3) | \ |
758 |
PIN_PUPDR_PULLUP(GPIOB_ZIO_D17)) |
759 |
#define VAL_GPIOB_ODR (PIN_ODR_LOW(GPIOB_ZIO_D33) | \
|
760 |
PIN_ODR_HIGH(GPIOB_ZIO_A6) | \ |
761 |
PIN_ODR_HIGH(GPIOB_ZIO_D27) | \ |
762 |
PIN_ODR_HIGH(GPIOB_ZIO_D23) | \ |
763 |
PIN_ODR_HIGH(GPIOB_ZIO_D25) | \ |
764 |
PIN_ODR_HIGH(GPIOB_ZIO_D22) | \ |
765 |
PIN_ODR_HIGH(GPIOB_ZIO_D26) | \ |
766 |
PIN_ODR_LOW(GPIOB_LED2) | \ |
767 |
PIN_ODR_HIGH(GPIOB_ARD_D15) | \ |
768 |
PIN_ODR_HIGH(GPIOB_ARD_D14) | \ |
769 |
PIN_ODR_HIGH(GPIOB_ZIO_D36) | \ |
770 |
PIN_ODR_HIGH(GPIOB_ZIO_D35) | \ |
771 |
PIN_ODR_HIGH(GPIOB_ZIO_D19) | \ |
772 |
PIN_ODR_HIGH(GPIOB_ZIO_D18) | \ |
773 |
PIN_ODR_LOW(GPIOB_LED3) | \ |
774 |
PIN_ODR_HIGH(GPIOB_ZIO_D17)) |
775 |
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ZIO_D33, 0U) | \ |
776 |
PIN_AFIO_AF(GPIOB_ZIO_A6, 0U) | \
|
777 |
PIN_AFIO_AF(GPIOB_ZIO_D27, 0U) | \
|
778 |
PIN_AFIO_AF(GPIOB_ZIO_D23, 0U) | \
|
779 |
PIN_AFIO_AF(GPIOB_ZIO_D25, 0U) | \
|
780 |
PIN_AFIO_AF(GPIOB_ZIO_D22, 0U) | \
|
781 |
PIN_AFIO_AF(GPIOB_ZIO_D26, 0U) | \
|
782 |
PIN_AFIO_AF(GPIOB_LED2, 0U))
|
783 |
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) | \ |
784 |
PIN_AFIO_AF(GPIOB_ARD_D14, 0U) | \
|
785 |
PIN_AFIO_AF(GPIOB_ZIO_D36, 0U) | \
|
786 |
PIN_AFIO_AF(GPIOB_ZIO_D35, 0U) | \
|
787 |
PIN_AFIO_AF(GPIOB_ZIO_D19, 0U) | \
|
788 |
PIN_AFIO_AF(GPIOB_ZIO_D18, 11U) | \
|
789 |
PIN_AFIO_AF(GPIOB_LED3, 0U) | \
|
790 |
PIN_AFIO_AF(GPIOB_ZIO_D17, 0U))
|
791 |
|
792 |
/*
|
793 |
* GPIOC setup:
|
794 |
*
|
795 |
* PC0 - ARD_A1 ADC123_IN10 (input pullup).
|
796 |
* PC1 - RMII_MDC (alternate 11).
|
797 |
* PC2 - ZIO_A7 ADC123_IN12 (input pullup).
|
798 |
* PC3 - ARD_A2 ADC123_IN13 (input pullup).
|
799 |
* PC4 - RMII_RXD0 (alternate 11).
|
800 |
* PC5 - RMII_RXD1 (alternate 11).
|
801 |
* PC6 - ZIO_D16 I2S2_MCK (input pullup).
|
802 |
* PC7 - ZIO_D21 I2S3_MCK (input pullup).
|
803 |
* PC8 - ZIO_D43 SDMMC_D0 (input pullup).
|
804 |
* PC9 - ZIO_D44 SDMMC_D1 (input pullup).
|
805 |
* PC10 - ZIO_D45 SDMMC_D2 (input pullup).
|
806 |
* PC11 - ZIO_D46 SDMMC_D3 (input pullup).
|
807 |
* PC12 - ZIO_D47 SDMMC_CK (input pullup).
|
808 |
* PC13 - BUTTON (input floating).
|
809 |
* PC14 - OSC32_IN (input floating).
|
810 |
* PC15 - OSC32_OUT (input floating).
|
811 |
*/
|
812 |
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_ARD_A1) | \
|
813 |
PIN_MODE_ALTERNATE(GPIOC_RMII_MDC) | \ |
814 |
PIN_MODE_INPUT(GPIOC_ZIO_A7) | \ |
815 |
PIN_MODE_INPUT(GPIOC_ARD_A2) | \ |
816 |
PIN_MODE_ALTERNATE(GPIOC_RMII_RXD0) | \ |
817 |
PIN_MODE_ALTERNATE(GPIOC_RMII_RXD1) | \ |
818 |
PIN_MODE_INPUT(GPIOC_ZIO_D16) | \ |
819 |
PIN_MODE_INPUT(GPIOC_ZIO_D21) | \ |
820 |
PIN_MODE_INPUT(GPIOC_ZIO_D43) | \ |
821 |
PIN_MODE_INPUT(GPIOC_ZIO_D44) | \ |
822 |
PIN_MODE_INPUT(GPIOC_ZIO_D45) | \ |
823 |
PIN_MODE_INPUT(GPIOC_ZIO_D46) | \ |
824 |
PIN_MODE_INPUT(GPIOC_ZIO_D47) | \ |
825 |
PIN_MODE_INPUT(GPIOC_BUTTON) | \ |
826 |
PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ |
827 |
PIN_MODE_INPUT(GPIOC_OSC32_OUT)) |
828 |
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A1) | \
|
829 |
PIN_OTYPE_PUSHPULL(GPIOC_RMII_MDC) | \ |
830 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_A7) | \ |
831 |
PIN_OTYPE_PUSHPULL(GPIOC_ARD_A2) | \ |
832 |
PIN_OTYPE_PUSHPULL(GPIOC_RMII_RXD0) | \ |
833 |
PIN_OTYPE_PUSHPULL(GPIOC_RMII_RXD1) | \ |
834 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D16) | \ |
835 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D21) | \ |
836 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D43) | \ |
837 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D44) | \ |
838 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D45) | \ |
839 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D46) | \ |
840 |
PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D47) | \ |
841 |
PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \ |
842 |
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ |
843 |
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) |
844 |
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_ARD_A1) | \
|
845 |
PIN_OSPEED_HIGH(GPIOC_RMII_MDC) | \ |
846 |
PIN_OSPEED_HIGH(GPIOC_ZIO_A7) | \ |
847 |
PIN_OSPEED_HIGH(GPIOC_ARD_A2) | \ |
848 |
PIN_OSPEED_HIGH(GPIOC_RMII_RXD0) | \ |
849 |
PIN_OSPEED_HIGH(GPIOC_RMII_RXD1) | \ |
850 |
PIN_OSPEED_HIGH(GPIOC_ZIO_D16) | \ |
851 |
PIN_OSPEED_HIGH(GPIOC_ZIO_D21) | \ |
852 |
PIN_OSPEED_HIGH(GPIOC_ZIO_D43) | \ |
853 |
PIN_OSPEED_HIGH(GPIOC_ZIO_D44) | \ |
854 |
PIN_OSPEED_HIGH(GPIOC_ZIO_D45) | \ |
855 |
PIN_OSPEED_HIGH(GPIOC_ZIO_D46) | \ |
856 |
PIN_OSPEED_HIGH(GPIOC_ZIO_D47) | \ |
857 |
PIN_OSPEED_HIGH(GPIOC_BUTTON) | \ |
858 |
PIN_OSPEED_VERYLOW(GPIOC_OSC32_IN) | \ |
859 |
PIN_OSPEED_VERYLOW(GPIOC_OSC32_OUT)) |
860 |
#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_ARD_A1) | \
|
861 |
PIN_PUPDR_FLOATING(GPIOC_RMII_MDC) | \ |
862 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_A7) | \ |
863 |
PIN_PUPDR_PULLUP(GPIOC_ARD_A2) | \ |
864 |
PIN_PUPDR_FLOATING(GPIOC_RMII_RXD0) | \ |
865 |
PIN_PUPDR_FLOATING(GPIOC_RMII_RXD1) | \ |
866 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_D16) | \ |
867 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_D21) | \ |
868 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_D43) | \ |
869 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_D44) | \ |
870 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_D45) | \ |
871 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_D46) | \ |
872 |
PIN_PUPDR_PULLUP(GPIOC_ZIO_D47) | \ |
873 |
PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \ |
874 |
PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ |
875 |
PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) |
876 |
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_ARD_A1) | \
|
877 |
PIN_ODR_HIGH(GPIOC_RMII_MDC) | \ |
878 |
PIN_ODR_HIGH(GPIOC_ZIO_A7) | \ |
879 |
PIN_ODR_HIGH(GPIOC_ARD_A2) | \ |
880 |
PIN_ODR_HIGH(GPIOC_RMII_RXD0) | \ |
881 |
PIN_ODR_HIGH(GPIOC_RMII_RXD1) | \ |
882 |
PIN_ODR_HIGH(GPIOC_ZIO_D16) | \ |
883 |
PIN_ODR_HIGH(GPIOC_ZIO_D21) | \ |
884 |
PIN_ODR_HIGH(GPIOC_ZIO_D43) | \ |
885 |
PIN_ODR_HIGH(GPIOC_ZIO_D44) | \ |
886 |
PIN_ODR_HIGH(GPIOC_ZIO_D45) | \ |
887 |
PIN_ODR_HIGH(GPIOC_ZIO_D46) | \ |
888 |
PIN_ODR_HIGH(GPIOC_ZIO_D47) | \ |
889 |
PIN_ODR_HIGH(GPIOC_BUTTON) | \ |
890 |
PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ |
891 |
PIN_ODR_HIGH(GPIOC_OSC32_OUT)) |
892 |
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ARD_A1, 0U) | \ |
893 |
PIN_AFIO_AF(GPIOC_RMII_MDC, 11U) | \
|
894 |
PIN_AFIO_AF(GPIOC_ZIO_A7, 0U) | \
|
895 |
PIN_AFIO_AF(GPIOC_ARD_A2, 0U) | \
|
896 |
PIN_AFIO_AF(GPIOC_RMII_RXD0, 11U) | \
|
897 |
PIN_AFIO_AF(GPIOC_RMII_RXD1, 11U) | \
|
898 |
PIN_AFIO_AF(GPIOC_ZIO_D16, 0U) | \
|
899 |
PIN_AFIO_AF(GPIOC_ZIO_D21, 0U))
|
900 |
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_ZIO_D43, 0U) | \ |
901 |
PIN_AFIO_AF(GPIOC_ZIO_D44, 0U) | \
|
902 |
PIN_AFIO_AF(GPIOC_ZIO_D45, 0U) | \
|
903 |
PIN_AFIO_AF(GPIOC_ZIO_D46, 0U) | \
|
904 |
PIN_AFIO_AF(GPIOC_ZIO_D47, 0U) | \
|
905 |
PIN_AFIO_AF(GPIOC_BUTTON, 0U) | \
|
906 |
PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
|
907 |
PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
|
908 |
|
909 |
/*
|
910 |
* GPIOD setup:
|
911 |
*
|
912 |
* PD0 - ZIO_D67 CAN1_RX (input pullup).
|
913 |
* PD1 - ZIO_D66 CAN1_TX (input pullup).
|
914 |
* PD2 - ZIO_D48 SDMMC_CMD (input pullup).
|
915 |
* PD3 - ZIO_D55 USART2_CTS (input pullup).
|
916 |
* PD4 - ZIO_D54 USART2_RTS (input pullup).
|
917 |
* PD5 - ZIO_D53 USART2_TX (input pullup).
|
918 |
* PD6 - ZIO_D52 USART2_RX (input pullup).
|
919 |
* PD7 - ZIO_D51 USART2_SCLK (input pullup).
|
920 |
* PD8 - USART3_RX STLK_RX (alternate 7).
|
921 |
* PD9 - USART3_TX STLK_TX (alternate 7).
|
922 |
* PD10 - PIN10 (input pullup).
|
923 |
* PD11 - ZIO_D30 QSPI_BK1_IO0 (input pullup).
|
924 |
* PD12 - ZIO_D29 QSPI_BK1_IO1 (input pullup).
|
925 |
* PD13 - ZIO_D28 QSPI_BK1_IO3 (input pullup).
|
926 |
* PD14 - ARD_D10 SPI1_NSS (input pullup).
|
927 |
* PD15 - ARD_D9 TIM4_CH4 (input pullup).
|
928 |
*/
|
929 |
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_ZIO_D67) | \
|
930 |
PIN_MODE_INPUT(GPIOD_ZIO_D66) | \ |
931 |
PIN_MODE_INPUT(GPIOD_ZIO_D48) | \ |
932 |
PIN_MODE_INPUT(GPIOD_ZIO_D55) | \ |
933 |
PIN_MODE_INPUT(GPIOD_ZIO_D54) | \ |
934 |
PIN_MODE_INPUT(GPIOD_ZIO_D53) | \ |
935 |
PIN_MODE_INPUT(GPIOD_ZIO_D52) | \ |
936 |
PIN_MODE_INPUT(GPIOD_ZIO_D51) | \ |
937 |
PIN_MODE_ALTERNATE(GPIOD_USART3_RX) | \ |
938 |
PIN_MODE_ALTERNATE(GPIOD_USART3_TX) | \ |
939 |
PIN_MODE_INPUT(GPIOD_PIN10) | \ |
940 |
PIN_MODE_INPUT(GPIOD_ZIO_D30) | \ |
941 |
PIN_MODE_INPUT(GPIOD_ZIO_D29) | \ |
942 |
PIN_MODE_INPUT(GPIOD_ZIO_D28) | \ |
943 |
PIN_MODE_INPUT(GPIOD_ARD_D10) | \ |
944 |
PIN_MODE_INPUT(GPIOD_ARD_D9)) |
945 |
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D67) | \
|
946 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D66) | \ |
947 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D48) | \ |
948 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D55) | \ |
949 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D54) | \ |
950 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D53) | \ |
951 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D52) | \ |
952 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D51) | \ |
953 |
PIN_OTYPE_PUSHPULL(GPIOD_USART3_RX) | \ |
954 |
PIN_OTYPE_PUSHPULL(GPIOD_USART3_TX) | \ |
955 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ |
956 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D30) | \ |
957 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D29) | \ |
958 |
PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D28) | \ |
959 |
PIN_OTYPE_PUSHPULL(GPIOD_ARD_D10) | \ |
960 |
PIN_OTYPE_PUSHPULL(GPIOD_ARD_D9)) |
961 |
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_ZIO_D67) | \
|
962 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D66) | \ |
963 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D48) | \ |
964 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D55) | \ |
965 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D54) | \ |
966 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D53) | \ |
967 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D52) | \ |
968 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D51) | \ |
969 |
PIN_OSPEED_HIGH(GPIOD_USART3_RX) | \ |
970 |
PIN_OSPEED_HIGH(GPIOD_USART3_TX) | \ |
971 |
PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ |
972 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D30) | \ |
973 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D29) | \ |
974 |
PIN_OSPEED_HIGH(GPIOD_ZIO_D28) | \ |
975 |
PIN_OSPEED_HIGH(GPIOD_ARD_D10) | \ |
976 |
PIN_OSPEED_HIGH(GPIOD_ARD_D9)) |
977 |
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_ZIO_D67) | \
|
978 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D66) | \ |
979 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D48) | \ |
980 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D55) | \ |
981 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D54) | \ |
982 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D53) | \ |
983 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D52) | \ |
984 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D51) | \ |
985 |
PIN_PUPDR_FLOATING(GPIOD_USART3_RX) | \ |
986 |
PIN_PUPDR_FLOATING(GPIOD_USART3_TX) | \ |
987 |
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ |
988 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D30) | \ |
989 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D29) | \ |
990 |
PIN_PUPDR_PULLUP(GPIOD_ZIO_D28) | \ |
991 |
PIN_PUPDR_PULLUP(GPIOD_ARD_D10) | \ |
992 |
PIN_PUPDR_PULLUP(GPIOD_ARD_D9)) |
993 |
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_ZIO_D67) | \
|
994 |
PIN_ODR_HIGH(GPIOD_ZIO_D66) | \ |
995 |
PIN_ODR_HIGH(GPIOD_ZIO_D48) | \ |
996 |
PIN_ODR_HIGH(GPIOD_ZIO_D55) | \ |
997 |
PIN_ODR_HIGH(GPIOD_ZIO_D54) | \ |
998 |
PIN_ODR_HIGH(GPIOD_ZIO_D53) | \ |
999 |
PIN_ODR_HIGH(GPIOD_ZIO_D52) | \ |
1000 |
PIN_ODR_HIGH(GPIOD_ZIO_D51) | \ |
1001 |
PIN_ODR_HIGH(GPIOD_USART3_RX) | \ |
1002 |
PIN_ODR_HIGH(GPIOD_USART3_TX) | \ |
1003 |
PIN_ODR_HIGH(GPIOD_PIN10) | \ |
1004 |
PIN_ODR_HIGH(GPIOD_ZIO_D30) | \ |
1005 |
PIN_ODR_HIGH(GPIOD_ZIO_D29) | \ |
1006 |
PIN_ODR_HIGH(GPIOD_ZIO_D28) | \ |
1007 |
PIN_ODR_HIGH(GPIOD_ARD_D10) | \ |
1008 |
PIN_ODR_HIGH(GPIOD_ARD_D9)) |
1009 |
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_ZIO_D67, 0U) | \ |
1010 |
PIN_AFIO_AF(GPIOD_ZIO_D66, 0U) | \
|
1011 |
PIN_AFIO_AF(GPIOD_ZIO_D48, 0U) | \
|
1012 |
PIN_AFIO_AF(GPIOD_ZIO_D55, 0U) | \
|
1013 |
PIN_AFIO_AF(GPIOD_ZIO_D54, 0U) | \
|
1014 |
PIN_AFIO_AF(GPIOD_ZIO_D53, 0U) | \
|
1015 |
PIN_AFIO_AF(GPIOD_ZIO_D52, 0U) | \
|
1016 |
PIN_AFIO_AF(GPIOD_ZIO_D51, 0U))
|
1017 |
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_USART3_RX, 7U) | \ |
1018 |
PIN_AFIO_AF(GPIOD_USART3_TX, 7U) | \
|
1019 |
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
|
1020 |
PIN_AFIO_AF(GPIOD_ZIO_D30, 0U) | \
|
1021 |
PIN_AFIO_AF(GPIOD_ZIO_D29, 0U) | \
|
1022 |
PIN_AFIO_AF(GPIOD_ZIO_D28, 0U) | \
|
1023 |
PIN_AFIO_AF(GPIOD_ARD_D10, 0U) | \
|
1024 |
PIN_AFIO_AF(GPIOD_ARD_D9, 0U))
|
1025 |
|
1026 |
/*
|
1027 |
* GPIOE setup:
|
1028 |
*
|
1029 |
* PE0 - ZIO_D34 TIM4_ETR (input pullup).
|
1030 |
* PE1 - PIN1 (input pullup).
|
1031 |
* PE2 - ZIO_D31 ZIO_D56 SAI1_MCLK_A(input pullup).
|
1032 |
* PE3 - ZIO_D60 SAI1_SD_B (input pullup).
|
1033 |
* PE4 - ZIO_D57 SAI1_FS_A (input pullup).
|
1034 |
* PE5 - ZIO_D58 SAI1_SCK_A (input pullup).
|
1035 |
* PE6 - ZIO_D59 SAI1_SD_A (input pullup).
|
1036 |
* PE7 - ZIO_D41 TIM1_ETR (input pullup).
|
1037 |
* PE8 - ZIO_D42 TIM1_CH1N (input pullup).
|
1038 |
* PE9 - ARD_D6 TIM1_CH1 (input pullup).
|
1039 |
* PE10 - ZIO_D40 TIM1_CH2N (input pullup).
|
1040 |
* PE11 - ARD_D5 TIM1_CH2 (input pullup).
|
1041 |
* PE12 - ZIO_D39 TIM1_CH3N (input pullup).
|
1042 |
* PE13 - ARD_D3 TIM1_CH3 (input pullup).
|
1043 |
* PE14 - ZIO_D38 (input pullup).
|
1044 |
* PE15 - ZIO_D37 TIM1_BKIN1 (input pullup).
|
1045 |
*/
|
1046 |
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_ZIO_D34) | \
|
1047 |
PIN_MODE_INPUT(GPIOE_PIN1) | \ |
1048 |
PIN_MODE_INPUT(GPIOE_ZIO_D31) | \ |
1049 |
PIN_MODE_INPUT(GPIOE_ZIO_D60) | \ |
1050 |
PIN_MODE_INPUT(GPIOE_ZIO_D57) | \ |
1051 |
PIN_MODE_INPUT(GPIOE_ZIO_D58) | \ |
1052 |
PIN_MODE_INPUT(GPIOE_ZIO_D59) | \ |
1053 |
PIN_MODE_INPUT(GPIOE_ZIO_D41) | \ |
1054 |
PIN_MODE_INPUT(GPIOE_ZIO_D42) | \ |
1055 |
PIN_MODE_INPUT(GPIOE_ARD_D6) | \ |
1056 |
PIN_MODE_INPUT(GPIOE_ZIO_D40) | \ |
1057 |
PIN_MODE_INPUT(GPIOE_ARD_D5) | \ |
1058 |
PIN_MODE_INPUT(GPIOE_ZIO_D39) | \ |
1059 |
PIN_MODE_INPUT(GPIOE_ARD_D3) | \ |
1060 |
PIN_MODE_INPUT(GPIOE_ZIO_D38) | \ |
1061 |
PIN_MODE_INPUT(GPIOE_ZIO_D37)) |
1062 |
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D34) | \
|
1063 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ |
1064 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D31) | \ |
1065 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D60) | \ |
1066 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D57) | \ |
1067 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D58) | \ |
1068 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D59) | \ |
1069 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D41) | \ |
1070 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D42) | \ |
1071 |
PIN_OTYPE_PUSHPULL(GPIOE_ARD_D6) | \ |
1072 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D40) | \ |
1073 |
PIN_OTYPE_PUSHPULL(GPIOE_ARD_D5) | \ |
1074 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D39) | \ |
1075 |
PIN_OTYPE_PUSHPULL(GPIOE_ARD_D3) | \ |
1076 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D38) | \ |
1077 |
PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D37)) |
1078 |
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_ZIO_D34) | \
|
1079 |
PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \ |
1080 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D31) | \ |
1081 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D60) | \ |
1082 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D57) | \ |
1083 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D58) | \ |
1084 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D59) | \ |
1085 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D41) | \ |
1086 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D42) | \ |
1087 |
PIN_OSPEED_HIGH(GPIOE_ARD_D6) | \ |
1088 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D40) | \ |
1089 |
PIN_OSPEED_HIGH(GPIOE_ARD_D5) | \ |
1090 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D39) | \ |
1091 |
PIN_OSPEED_HIGH(GPIOE_ARD_D3) | \ |
1092 |
PIN_OSPEED_VERYLOW(GPIOE_ZIO_D38) | \ |
1093 |
PIN_OSPEED_HIGH(GPIOE_ZIO_D37)) |
1094 |
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_ZIO_D34) | \
|
1095 |
PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ |
1096 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D31) | \ |
1097 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D60) | \ |
1098 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D57) | \ |
1099 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D58) | \ |
1100 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D59) | \ |
1101 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D41) | \ |
1102 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D42) | \ |
1103 |
PIN_PUPDR_PULLUP(GPIOE_ARD_D6) | \ |
1104 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D40) | \ |
1105 |
PIN_PUPDR_PULLUP(GPIOE_ARD_D5) | \ |
1106 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D39) | \ |
1107 |
PIN_PUPDR_PULLUP(GPIOE_ARD_D3) | \ |
1108 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D38) | \ |
1109 |
PIN_PUPDR_PULLUP(GPIOE_ZIO_D37)) |
1110 |
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_ZIO_D34) | \
|
1111 |
PIN_ODR_HIGH(GPIOE_PIN1) | \ |
1112 |
PIN_ODR_HIGH(GPIOE_ZIO_D31) | \ |
1113 |
PIN_ODR_HIGH(GPIOE_ZIO_D60) | \ |
1114 |
PIN_ODR_HIGH(GPIOE_ZIO_D57) | \ |
1115 |
PIN_ODR_HIGH(GPIOE_ZIO_D58) | \ |
1116 |
PIN_ODR_HIGH(GPIOE_ZIO_D59) | \ |
1117 |
PIN_ODR_HIGH(GPIOE_ZIO_D41) | \ |
1118 |
PIN_ODR_HIGH(GPIOE_ZIO_D42) | \ |
1119 |
PIN_ODR_HIGH(GPIOE_ARD_D6) | \ |
1120 |
PIN_ODR_HIGH(GPIOE_ZIO_D40) | \ |
1121 |
PIN_ODR_HIGH(GPIOE_ARD_D5) | \ |
1122 |
PIN_ODR_HIGH(GPIOE_ZIO_D39) | \ |
1123 |
PIN_ODR_HIGH(GPIOE_ARD_D3) | \ |
1124 |
PIN_ODR_HIGH(GPIOE_ZIO_D38) | \ |
1125 |
PIN_ODR_HIGH(GPIOE_ZIO_D37)) |
1126 |
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_ZIO_D34, 0U) | \ |
1127 |
PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
|
1128 |
PIN_AFIO_AF(GPIOE_ZIO_D31, 0U) | \
|
1129 |
PIN_AFIO_AF(GPIOE_ZIO_D60, 0U) | \
|
1130 |
PIN_AFIO_AF(GPIOE_ZIO_D57, 0U) | \
|
1131 |
PIN_AFIO_AF(GPIOE_ZIO_D58, 0U) | \
|
1132 |
PIN_AFIO_AF(GPIOE_ZIO_D59, 0U) | \
|
1133 |
PIN_AFIO_AF(GPIOE_ZIO_D41, 0U))
|
1134 |
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_ZIO_D42, 0U) | \ |
1135 |
PIN_AFIO_AF(GPIOE_ARD_D6, 0U) | \
|
1136 |
PIN_AFIO_AF(GPIOE_ZIO_D40, 0U) | \
|
1137 |
PIN_AFIO_AF(GPIOE_ARD_D5, 0U) | \
|
1138 |
PIN_AFIO_AF(GPIOE_ZIO_D39, 0U) | \
|
1139 |
PIN_AFIO_AF(GPIOE_ARD_D3, 0U) | \
|
1140 |
PIN_AFIO_AF(GPIOE_ZIO_D38, 0U) | \
|
1141 |
PIN_AFIO_AF(GPIOE_ZIO_D37, 0U))
|
1142 |
|
1143 |
/*
|
1144 |
* GPIOF setup:
|
1145 |
*
|
1146 |
* PF0 - ZIO_D68 I2C2_SDA (input pullup).
|
1147 |
* PF1 - ZIO_D69 I2C2_SCL (input pullup).
|
1148 |
* PF2 - ZIO_D70 I2C2_SMBA (input pullup).
|
1149 |
* PF3 - ARD_A3 ADC3_IN9 (input pullup).
|
1150 |
* PF4 - ZIO_A8 ADC3_IN14 (input pullup).
|
1151 |
* PF5 - ARD_A4 ADC3_IN15 (input pullup).
|
1152 |
* PF6 - PIN6 (input pullup).
|
1153 |
* PF7 - ZIO_D62 SAI1_MCLK_B (input pullup).
|
1154 |
* PF8 - ZIO_D61 SAI1_SCK_B (input pullup).
|
1155 |
* PF9 - ZIO_D63 SAI1_FS_B (input pullup).
|
1156 |
* PF10 - ARD_A5 ADC3_IN8 (input pullup).
|
1157 |
* PF11 - PIN11 (input pullup).
|
1158 |
* PF12 - ARD_D8 (input pullup).
|
1159 |
* PF13 - ARD_D7 (input pullup).
|
1160 |
* PF14 - ARD_D4 (input pullup).
|
1161 |
* PF15 - ARD_D2 (input pullup).
|
1162 |
*/
|
1163 |
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ZIO_D68) | \
|
1164 |
PIN_MODE_INPUT(GPIOF_ZIO_D69) | \ |
1165 |
PIN_MODE_INPUT(GPIOF_ZIO_D70) | \ |
1166 |
PIN_MODE_INPUT(GPIOF_ARD_A3) | \ |
1167 |
PIN_MODE_INPUT(GPIOF_ZIO_A8) | \ |
1168 |
PIN_MODE_INPUT(GPIOF_ARD_A4) | \ |
1169 |
PIN_MODE_INPUT(GPIOF_PIN6) | \ |
1170 |
PIN_MODE_INPUT(GPIOF_ZIO_D62) | \ |
1171 |
PIN_MODE_INPUT(GPIOF_ZIO_D61) | \ |
1172 |
PIN_MODE_INPUT(GPIOF_ZIO_D63) | \ |
1173 |
PIN_MODE_INPUT(GPIOF_ARD_A5) | \ |
1174 |
PIN_MODE_INPUT(GPIOF_PIN11) | \ |
1175 |
PIN_MODE_INPUT(GPIOF_ARD_D8) | \ |
1176 |
PIN_MODE_INPUT(GPIOF_ARD_D7) | \ |
1177 |
PIN_MODE_INPUT(GPIOF_ARD_D4) | \ |
1178 |
PIN_MODE_INPUT(GPIOF_ARD_D2)) |
1179 |
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D68) | \
|
1180 |
PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D69) | \ |
1181 |
PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D70) | \ |
1182 |
PIN_OTYPE_PUSHPULL(GPIOF_ARD_A3) | \ |
1183 |
PIN_OTYPE_PUSHPULL(GPIOF_ZIO_A8) | \ |
1184 |
PIN_OTYPE_PUSHPULL(GPIOF_ARD_A4) | \ |
1185 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ |
1186 |
PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D62) | \ |
1187 |
PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D61) | \ |
1188 |
PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D63) | \ |
1189 |
PIN_OTYPE_PUSHPULL(GPIOF_ARD_A5) | \ |
1190 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ |
1191 |
PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \ |
1192 |
PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \ |
1193 |
PIN_OTYPE_PUSHPULL(GPIOF_ARD_D4) | \ |
1194 |
PIN_OTYPE_PUSHPULL(GPIOF_ARD_D2)) |
1195 |
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ZIO_D68) | \
|
1196 |
PIN_OSPEED_HIGH(GPIOF_ZIO_D69) | \ |
1197 |
PIN_OSPEED_HIGH(GPIOF_ZIO_D70) | \ |
1198 |
PIN_OSPEED_HIGH(GPIOF_ARD_A3) | \ |
1199 |
PIN_OSPEED_HIGH(GPIOF_ZIO_A8) | \ |
1200 |
PIN_OSPEED_HIGH(GPIOF_ARD_A4) | \ |
1201 |
PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ |
1202 |
PIN_OSPEED_HIGH(GPIOF_ZIO_D62) | \ |
1203 |
PIN_OSPEED_HIGH(GPIOF_ZIO_D61) | \ |
1204 |
PIN_OSPEED_HIGH(GPIOF_ZIO_D63) | \ |
1205 |
PIN_OSPEED_HIGH(GPIOF_ARD_A5) | \ |
1206 |
PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ |
1207 |
PIN_OSPEED_VERYLOW(GPIOF_ARD_D8) | \ |
1208 |
PIN_OSPEED_VERYLOW(GPIOF_ARD_D7) | \ |
1209 |
PIN_OSPEED_VERYLOW(GPIOF_ARD_D4) | \ |
1210 |
PIN_OSPEED_VERYLOW(GPIOF_ARD_D2)) |
1211 |
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ZIO_D68) | \
|
1212 |
PIN_PUPDR_PULLUP(GPIOF_ZIO_D69) | \ |
1213 |
PIN_PUPDR_PULLUP(GPIOF_ZIO_D70) | \ |
1214 |
PIN_PUPDR_PULLUP(GPIOF_ARD_A3) | \ |
1215 |
PIN_PUPDR_PULLUP(GPIOF_ZIO_A8) | \ |
1216 |
PIN_PUPDR_PULLUP(GPIOF_ARD_A4) | \ |
1217 |
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ |
1218 |
PIN_PUPDR_PULLUP(GPIOF_ZIO_D62) | \ |
1219 |
PIN_PUPDR_PULLUP(GPIOF_ZIO_D61) | \ |
1220 |
PIN_PUPDR_PULLUP(GPIOF_ZIO_D63) | \ |
1221 |
PIN_PUPDR_PULLUP(GPIOF_ARD_A5) | \ |
1222 |
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ |
1223 |
PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \ |
1224 |
PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \ |
1225 |
PIN_PUPDR_PULLUP(GPIOF_ARD_D4) | \ |
1226 |
PIN_PUPDR_PULLUP(GPIOF_ARD_D2)) |
1227 |
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ZIO_D68) | \
|
1228 |
PIN_ODR_HIGH(GPIOF_ZIO_D69) | \ |
1229 |
PIN_ODR_HIGH(GPIOF_ZIO_D70) | \ |
1230 |
PIN_ODR_HIGH(GPIOF_ARD_A3) | \ |
1231 |
PIN_ODR_HIGH(GPIOF_ZIO_A8) | \ |
1232 |
PIN_ODR_HIGH(GPIOF_ARD_A4) | \ |
1233 |
PIN_ODR_HIGH(GPIOF_PIN6) | \ |
1234 |
PIN_ODR_HIGH(GPIOF_ZIO_D62) | \ |
1235 |
PIN_ODR_HIGH(GPIOF_ZIO_D61) | \ |
1236 |
PIN_ODR_HIGH(GPIOF_ZIO_D63) | \ |
1237 |
PIN_ODR_HIGH(GPIOF_ARD_A5) | \ |
1238 |
PIN_ODR_HIGH(GPIOF_PIN11) | \ |
1239 |
PIN_ODR_HIGH(GPIOF_ARD_D8) | \ |
1240 |
PIN_ODR_HIGH(GPIOF_ARD_D7) | \ |
1241 |
PIN_ODR_HIGH(GPIOF_ARD_D4) | \ |
1242 |
PIN_ODR_HIGH(GPIOF_ARD_D2)) |
1243 |
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ZIO_D68, 0U) | \ |
1244 |
PIN_AFIO_AF(GPIOF_ZIO_D69, 0U) | \
|
1245 |
PIN_AFIO_AF(GPIOF_ZIO_D70, 0U) | \
|
1246 |
PIN_AFIO_AF(GPIOF_ARD_A3, 0U) | \
|
1247 |
PIN_AFIO_AF(GPIOF_ZIO_A8, 0U) | \
|
1248 |
PIN_AFIO_AF(GPIOF_ARD_A4, 0U) | \
|
1249 |
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
|
1250 |
PIN_AFIO_AF(GPIOF_ZIO_D62, 0U))
|
1251 |
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_ZIO_D61, 0U) | \ |
1252 |
PIN_AFIO_AF(GPIOF_ZIO_D63, 0U) | \
|
1253 |
PIN_AFIO_AF(GPIOF_ARD_A5, 0U) | \
|
1254 |
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
|
1255 |
PIN_AFIO_AF(GPIOF_ARD_D8, 0U) | \
|
1256 |
PIN_AFIO_AF(GPIOF_ARD_D7, 0U) | \
|
1257 |
PIN_AFIO_AF(GPIOF_ARD_D4, 0U) | \
|
1258 |
PIN_AFIO_AF(GPIOF_ARD_D2, 0U))
|
1259 |
|
1260 |
/*
|
1261 |
* GPIOG setup:
|
1262 |
*
|
1263 |
* PG0 - ZIO_D65 (input pullup).
|
1264 |
* PG1 - ZIO_D64 (input pullup).
|
1265 |
* PG2 - ZIO_D49 (input pullup).
|
1266 |
* PG3 - ZIO_D50 (input pullup).
|
1267 |
* PG4 - PIN4 (input pullup).
|
1268 |
* PG5 - PIN5 (input pullup).
|
1269 |
* PG6 - USB_GPIO_OUT (input pullup).
|
1270 |
* PG7 - USB_GPIO_IN (input pullup).
|
1271 |
* PG8 - PIN8 (input pullup).
|
1272 |
* PG9 - ARD_D0 USART6_RX (input pullup).
|
1273 |
* PG10 - PIN10 (input pullup).
|
1274 |
* PG11 - RMII_TX_EN (alternate 11).
|
1275 |
* PG12 - PIN12 (input pullup).
|
1276 |
* PG13 - RMII_TXD0 (alternate 11).
|
1277 |
* PG14 - ARD_D1 USART6_TX (input pullup).
|
1278 |
* PG15 - PIN15 (input pullup).
|
1279 |
*/
|
1280 |
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_ZIO_D65) | \
|
1281 |
PIN_MODE_INPUT(GPIOG_ZIO_D64) | \ |
1282 |
PIN_MODE_INPUT(GPIOG_ZIO_D49) | \ |
1283 |
PIN_MODE_INPUT(GPIOG_ZIO_D50) | \ |
1284 |
PIN_MODE_INPUT(GPIOG_PIN4) | \ |
1285 |
PIN_MODE_INPUT(GPIOG_PIN5) | \ |
1286 |
PIN_MODE_INPUT(GPIOG_USB_GPIO_OUT) | \ |
1287 |
PIN_MODE_INPUT(GPIOG_USB_GPIO_IN) | \ |
1288 |
PIN_MODE_INPUT(GPIOG_PIN8) | \ |
1289 |
PIN_MODE_INPUT(GPIOG_ARD_D0) | \ |
1290 |
PIN_MODE_INPUT(GPIOG_PIN10) | \ |
1291 |
PIN_MODE_ALTERNATE(GPIOG_RMII_TX_EN) | \ |
1292 |
PIN_MODE_INPUT(GPIOG_PIN12) | \ |
1293 |
PIN_MODE_ALTERNATE(GPIOG_RMII_TXD0) | \ |
1294 |
PIN_MODE_INPUT(GPIOG_ARD_D1) | \ |
1295 |
PIN_MODE_INPUT(GPIOG_PIN15)) |
1296 |
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D65) | \
|
1297 |
PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D64) | \ |
1298 |
PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D49) | \ |
1299 |
PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D50) | \ |
1300 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ |
1301 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ |
1302 |
PIN_OTYPE_PUSHPULL(GPIOG_USB_GPIO_OUT) |\ |
1303 |
PIN_OTYPE_PUSHPULL(GPIOG_USB_GPIO_IN) |\ |
1304 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ |
1305 |
PIN_OTYPE_PUSHPULL(GPIOG_ARD_D0) | \ |
1306 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ |
1307 |
PIN_OTYPE_PUSHPULL(GPIOG_RMII_TX_EN) | \ |
1308 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ |
1309 |
PIN_OTYPE_PUSHPULL(GPIOG_RMII_TXD0) | \ |
1310 |
PIN_OTYPE_PUSHPULL(GPIOG_ARD_D1) | \ |
1311 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) |
1312 |
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_ZIO_D65) | \
|
1313 |
PIN_OSPEED_VERYLOW(GPIOG_ZIO_D64) | \ |
1314 |
PIN_OSPEED_VERYLOW(GPIOG_ZIO_D49) | \ |
1315 |
PIN_OSPEED_VERYLOW(GPIOG_ZIO_D50) | \ |
1316 |
PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \ |
1317 |
PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \ |
1318 |
PIN_OSPEED_HIGH(GPIOG_USB_GPIO_OUT) | \ |
1319 |
PIN_OSPEED_HIGH(GPIOG_USB_GPIO_IN) | \ |
1320 |
PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \ |
1321 |
PIN_OSPEED_HIGH(GPIOG_ARD_D0) | \ |
1322 |
PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \ |
1323 |
PIN_OSPEED_HIGH(GPIOG_RMII_TX_EN) | \ |
1324 |
PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \ |
1325 |
PIN_OSPEED_HIGH(GPIOG_RMII_TXD0) | \ |
1326 |
PIN_OSPEED_HIGH(GPIOG_ARD_D1) | \ |
1327 |
PIN_OSPEED_VERYLOW(GPIOG_PIN15)) |
1328 |
#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_ZIO_D65) | \
|
1329 |
PIN_PUPDR_PULLUP(GPIOG_ZIO_D64) | \ |
1330 |
PIN_PUPDR_PULLUP(GPIOG_ZIO_D49) | \ |
1331 |
PIN_PUPDR_PULLUP(GPIOG_ZIO_D50) | \ |
1332 |
PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ |
1333 |
PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ |
1334 |
PIN_PUPDR_PULLUP(GPIOG_USB_GPIO_OUT) | \ |
1335 |
PIN_PUPDR_PULLUP(GPIOG_USB_GPIO_IN) | \ |
1336 |
PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ |
1337 |
PIN_PUPDR_PULLUP(GPIOG_ARD_D0) | \ |
1338 |
PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ |
1339 |
PIN_PUPDR_FLOATING(GPIOG_RMII_TX_EN) | \ |
1340 |
PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ |
1341 |
PIN_PUPDR_FLOATING(GPIOG_RMII_TXD0) | \ |
1342 |
PIN_PUPDR_PULLUP(GPIOG_ARD_D1) | \ |
1343 |
PIN_PUPDR_PULLUP(GPIOG_PIN15)) |
1344 |
#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_ZIO_D65) | \
|
1345 |
PIN_ODR_HIGH(GPIOG_ZIO_D64) | \ |
1346 |
PIN_ODR_HIGH(GPIOG_ZIO_D49) | \ |
1347 |
PIN_ODR_HIGH(GPIOG_ZIO_D50) | \ |
1348 |
PIN_ODR_HIGH(GPIOG_PIN4) | \ |
1349 |
PIN_ODR_HIGH(GPIOG_PIN5) | \ |
1350 |
PIN_ODR_HIGH(GPIOG_USB_GPIO_OUT) | \ |
1351 |
PIN_ODR_HIGH(GPIOG_USB_GPIO_IN) | \ |
1352 |
PIN_ODR_HIGH(GPIOG_PIN8) | \ |
1353 |
PIN_ODR_HIGH(GPIOG_ARD_D0) | \ |
1354 |
PIN_ODR_HIGH(GPIOG_PIN10) | \ |
1355 |
PIN_ODR_HIGH(GPIOG_RMII_TX_EN) | \ |
1356 |
PIN_ODR_HIGH(GPIOG_PIN12) | \ |
1357 |
PIN_ODR_HIGH(GPIOG_RMII_TXD0) | \ |
1358 |
PIN_ODR_HIGH(GPIOG_ARD_D1) | \ |
1359 |
PIN_ODR_HIGH(GPIOG_PIN15)) |
1360 |
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_ZIO_D65, 0U) | \ |
1361 |
PIN_AFIO_AF(GPIOG_ZIO_D64, 0U) | \
|
1362 |
PIN_AFIO_AF(GPIOG_ZIO_D49, 0U) | \
|
1363 |
PIN_AFIO_AF(GPIOG_ZIO_D50, 0U) | \
|
1364 |
PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
|
1365 |
PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
|
1366 |
PIN_AFIO_AF(GPIOG_USB_GPIO_OUT, 0U) | \
|
1367 |
PIN_AFIO_AF(GPIOG_USB_GPIO_IN, 0U))
|
1368 |
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \ |
1369 |
PIN_AFIO_AF(GPIOG_ARD_D0, 0U) | \
|
1370 |
PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
|
1371 |
PIN_AFIO_AF(GPIOG_RMII_TX_EN, 11U) | \
|
1372 |
PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
|
1373 |
PIN_AFIO_AF(GPIOG_RMII_TXD0, 11U) | \
|
1374 |
PIN_AFIO_AF(GPIOG_ARD_D1, 0U) | \
|
1375 |
PIN_AFIO_AF(GPIOG_PIN15, 0U))
|
1376 |
|
1377 |
/*
|
1378 |
* GPIOH setup:
|
1379 |
*
|
1380 |
* PH0 - OSC_IN (input floating).
|
1381 |
* PH1 - OSC_OUT (input floating).
|
1382 |
* PH2 - PIN2 (input pullup).
|
1383 |
* PH3 - PIN3 (input pullup).
|
1384 |
* PH4 - PIN4 (input pullup).
|
1385 |
* PH5 - PIN5 (input pullup).
|
1386 |
* PH6 - PIN6 (input pullup).
|
1387 |
* PH7 - PIN7 (input pullup).
|
1388 |
* PH8 - PIN8 (input pullup).
|
1389 |
* PH9 - PIN9 (input pullup).
|
1390 |
* PH10 - PIN10 (input pullup).
|
1391 |
* PH11 - PIN11 (input pullup).
|
1392 |
* PH12 - PIN12 (input pullup).
|
1393 |
* PH13 - PIN13 (input pullup).
|
1394 |
* PH14 - PIN14 (input pullup).
|
1395 |
* PH15 - PIN15 (input pullup).
|
1396 |
*/
|
1397 |
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
|
1398 |
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ |
1399 |
PIN_MODE_INPUT(GPIOH_PIN2) | \ |
1400 |
PIN_MODE_INPUT(GPIOH_PIN3) | \ |
1401 |
PIN_MODE_INPUT(GPIOH_PIN4) | \ |
1402 |
PIN_MODE_INPUT(GPIOH_PIN5) | \ |
1403 |
PIN_MODE_INPUT(GPIOH_PIN6) | \ |
1404 |
PIN_MODE_INPUT(GPIOH_PIN7) | \ |
1405 |
PIN_MODE_INPUT(GPIOH_PIN8) | \ |
1406 |
PIN_MODE_INPUT(GPIOH_PIN9) | \ |
1407 |
PIN_MODE_INPUT(GPIOH_PIN10) | \ |
1408 |
PIN_MODE_INPUT(GPIOH_PIN11) | \ |
1409 |
PIN_MODE_INPUT(GPIOH_PIN12) | \ |
1410 |
PIN_MODE_INPUT(GPIOH_PIN13) | \ |
1411 |
PIN_MODE_INPUT(GPIOH_PIN14) | \ |
1412 |
PIN_MODE_INPUT(GPIOH_PIN15)) |
1413 |
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
|
1414 |
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ |
1415 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ |
1416 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ |
1417 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ |
1418 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ |
1419 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ |
1420 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ |
1421 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ |
1422 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ |
1423 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ |
1424 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ |
1425 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ |
1426 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ |
1427 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ |
1428 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) |
1429 |
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \
|
1430 |
PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \ |
1431 |
PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \ |
1432 |
PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \ |
1433 |
PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \ |
1434 |
PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \ |
1435 |
PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \ |
1436 |
PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \ |
1437 |
PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \ |
1438 |
PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \ |
1439 |
PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \ |
1440 |
PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \ |
1441 |
PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \ |
1442 |
PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \ |
1443 |
PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \ |
1444 |
PIN_OSPEED_VERYLOW(GPIOH_PIN15)) |
1445 |
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
1446 |
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ |
1447 |
PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ |
1448 |
PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ |
1449 |
PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ |
1450 |
PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ |
1451 |
PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ |
1452 |
PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ |
1453 |
PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ |
1454 |
PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ |
1455 |
PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ |
1456 |
PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ |
1457 |
PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ |
1458 |
PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ |
1459 |
PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ |
1460 |
PIN_PUPDR_PULLUP(GPIOH_PIN15)) |
1461 |
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
1462 |
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ |
1463 |
PIN_ODR_HIGH(GPIOH_PIN2) | \ |
1464 |
PIN_ODR_HIGH(GPIOH_PIN3) | \ |
1465 |
PIN_ODR_HIGH(GPIOH_PIN4) | \ |
1466 |
PIN_ODR_HIGH(GPIOH_PIN5) | \ |
1467 |
PIN_ODR_HIGH(GPIOH_PIN6) | \ |
1468 |
PIN_ODR_HIGH(GPIOH_PIN7) | \ |
1469 |
PIN_ODR_HIGH(GPIOH_PIN8) | \ |
1470 |
PIN_ODR_HIGH(GPIOH_PIN9) | \ |
1471 |
PIN_ODR_HIGH(GPIOH_PIN10) | \ |
1472 |
PIN_ODR_HIGH(GPIOH_PIN11) | \ |
1473 |
PIN_ODR_HIGH(GPIOH_PIN12) | \ |
1474 |
PIN_ODR_HIGH(GPIOH_PIN13) | \ |
1475 |
PIN_ODR_HIGH(GPIOH_PIN14) | \ |
1476 |
PIN_ODR_HIGH(GPIOH_PIN15)) |
1477 |
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \ |
1478 |
PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \
|
1479 |
PIN_AFIO_AF(GPIOH_PIN2, 0U) | \
|
1480 |
PIN_AFIO_AF(GPIOH_PIN3, 0U) | \
|
1481 |
PIN_AFIO_AF(GPIOH_PIN4, 0U) | \
|
1482 |
PIN_AFIO_AF(GPIOH_PIN5, 0U) | \
|
1483 |
PIN_AFIO_AF(GPIOH_PIN6, 0U) | \
|
1484 |
PIN_AFIO_AF(GPIOH_PIN7, 0U))
|
1485 |
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \ |
1486 |
PIN_AFIO_AF(GPIOH_PIN9, 0U) | \
|
1487 |
PIN_AFIO_AF(GPIOH_PIN10, 0U) | \
|
1488 |
PIN_AFIO_AF(GPIOH_PIN11, 0U) | \
|
1489 |
PIN_AFIO_AF(GPIOH_PIN12, 0U) | \
|
1490 |
PIN_AFIO_AF(GPIOH_PIN13, 0U) | \
|
1491 |
PIN_AFIO_AF(GPIOH_PIN14, 0U) | \
|
1492 |
PIN_AFIO_AF(GPIOH_PIN15, 0U))
|
1493 |
|
1494 |
/*
|
1495 |
* GPIOI setup:
|
1496 |
*
|
1497 |
* PI0 - PIN0 (input pullup).
|
1498 |
* PI1 - PIN1 (input pullup).
|
1499 |
* PI2 - PIN2 (input pullup).
|
1500 |
* PI3 - PIN3 (input pullup).
|
1501 |
* PI4 - PIN4 (input pullup).
|
1502 |
* PI5 - PIN5 (input pullup).
|
1503 |
* PI6 - PIN6 (input pullup).
|
1504 |
* PI7 - PIN7 (input pullup).
|
1505 |
* PI8 - PIN8 (input pullup).
|
1506 |
* PI9 - PIN9 (input pullup).
|
1507 |
* PI10 - PIN10 (input pullup).
|
1508 |
* PI11 - PIN11 (input pullup).
|
1509 |
* PI12 - PIN12 (input pullup).
|
1510 |
* PI13 - PIN13 (input pullup).
|
1511 |
* PI14 - PIN14 (input pullup).
|
1512 |
* PI15 - PIN15 (input pullup).
|
1513 |
*/
|
1514 |
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
|
1515 |
PIN_MODE_INPUT(GPIOI_PIN1) | \ |
1516 |
PIN_MODE_INPUT(GPIOI_PIN2) | \ |
1517 |
PIN_MODE_INPUT(GPIOI_PIN3) | \ |
1518 |
PIN_MODE_INPUT(GPIOI_PIN4) | \ |
1519 |
PIN_MODE_INPUT(GPIOI_PIN5) | \ |
1520 |
PIN_MODE_INPUT(GPIOI_PIN6) | \ |
1521 |
PIN_MODE_INPUT(GPIOI_PIN7) | \ |
1522 |
PIN_MODE_INPUT(GPIOI_PIN8) | \ |
1523 |
PIN_MODE_INPUT(GPIOI_PIN9) | \ |
1524 |
PIN_MODE_INPUT(GPIOI_PIN10) | \ |
1525 |
PIN_MODE_INPUT(GPIOI_PIN11) | \ |
1526 |
PIN_MODE_INPUT(GPIOI_PIN12) | \ |
1527 |
PIN_MODE_INPUT(GPIOI_PIN13) | \ |
1528 |
PIN_MODE_INPUT(GPIOI_PIN14) | \ |
1529 |
PIN_MODE_INPUT(GPIOI_PIN15)) |
1530 |
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
|
1531 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ |
1532 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ |
1533 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ |
1534 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ |
1535 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ |
1536 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ |
1537 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ |
1538 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ |
1539 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ |
1540 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ |
1541 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ |
1542 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ |
1543 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ |
1544 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ |
1545 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) |
1546 |
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOI_PIN0) | \
|
1547 |
PIN_OSPEED_VERYLOW(GPIOI_PIN1) | \ |
1548 |
PIN_OSPEED_VERYLOW(GPIOI_PIN2) | \ |
1549 |
PIN_OSPEED_VERYLOW(GPIOI_PIN3) | \ |
1550 |
PIN_OSPEED_VERYLOW(GPIOI_PIN4) | \ |
1551 |
PIN_OSPEED_VERYLOW(GPIOI_PIN5) | \ |
1552 |
PIN_OSPEED_VERYLOW(GPIOI_PIN6) | \ |
1553 |
PIN_OSPEED_VERYLOW(GPIOI_PIN7) | \ |
1554 |
PIN_OSPEED_VERYLOW(GPIOI_PIN8) | \ |
1555 |
PIN_OSPEED_VERYLOW(GPIOI_PIN9) | \ |
1556 |
PIN_OSPEED_VERYLOW(GPIOI_PIN10) | \ |
1557 |
PIN_OSPEED_VERYLOW(GPIOI_PIN11) | \ |
1558 |
PIN_OSPEED_VERYLOW(GPIOI_PIN12) | \ |
1559 |
PIN_OSPEED_VERYLOW(GPIOI_PIN13) | \ |
1560 |
PIN_OSPEED_VERYLOW(GPIOI_PIN14) | \ |
1561 |
PIN_OSPEED_VERYLOW(GPIOI_PIN15)) |
1562 |
#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | \
|
1563 |
PIN_PUPDR_PULLUP(GPIOI_PIN1) | \ |
1564 |
PIN_PUPDR_PULLUP(GPIOI_PIN2) | \ |
1565 |
PIN_PUPDR_PULLUP(GPIOI_PIN3) | \ |
1566 |
PIN_PUPDR_PULLUP(GPIOI_PIN4) | \ |
1567 |
PIN_PUPDR_PULLUP(GPIOI_PIN5) | \ |
1568 |
PIN_PUPDR_PULLUP(GPIOI_PIN6) | \ |
1569 |
PIN_PUPDR_PULLUP(GPIOI_PIN7) | \ |
1570 |
PIN_PUPDR_PULLUP(GPIOI_PIN8) | \ |
1571 |
PIN_PUPDR_PULLUP(GPIOI_PIN9) | \ |
1572 |
PIN_PUPDR_PULLUP(GPIOI_PIN10) | \ |
1573 |
PIN_PUPDR_PULLUP(GPIOI_PIN11) | \ |
1574 |
PIN_PUPDR_PULLUP(GPIOI_PIN12) | \ |
1575 |
PIN_PUPDR_PULLUP(GPIOI_PIN13) | \ |
1576 |
PIN_PUPDR_PULLUP(GPIOI_PIN14) | \ |
1577 |
PIN_PUPDR_PULLUP(GPIOI_PIN15)) |
1578 |
#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \
|
1579 |
PIN_ODR_HIGH(GPIOI_PIN1) | \ |
1580 |
PIN_ODR_HIGH(GPIOI_PIN2) | \ |
1581 |
PIN_ODR_HIGH(GPIOI_PIN3) | \ |
1582 |
PIN_ODR_HIGH(GPIOI_PIN4) | \ |
1583 |
PIN_ODR_HIGH(GPIOI_PIN5) | \ |
1584 |
PIN_ODR_HIGH(GPIOI_PIN6) | \ |
1585 |
PIN_ODR_HIGH(GPIOI_PIN7) | \ |
1586 |
PIN_ODR_HIGH(GPIOI_PIN8) | \ |
1587 |
PIN_ODR_HIGH(GPIOI_PIN9) | \ |
1588 |
PIN_ODR_HIGH(GPIOI_PIN10) | \ |
1589 |
PIN_ODR_HIGH(GPIOI_PIN11) | \ |
1590 |
PIN_ODR_HIGH(GPIOI_PIN12) | \ |
1591 |
PIN_ODR_HIGH(GPIOI_PIN13) | \ |
1592 |
PIN_ODR_HIGH(GPIOI_PIN14) | \ |
1593 |
PIN_ODR_HIGH(GPIOI_PIN15)) |
1594 |
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ |
1595 |
PIN_AFIO_AF(GPIOI_PIN1, 0U) | \
|
1596 |
PIN_AFIO_AF(GPIOI_PIN2, 0U) | \
|
1597 |
PIN_AFIO_AF(GPIOI_PIN3, 0U) | \
|
1598 |
PIN_AFIO_AF(GPIOI_PIN4, 0U) | \
|
1599 |
PIN_AFIO_AF(GPIOI_PIN5, 0U) | \
|
1600 |
PIN_AFIO_AF(GPIOI_PIN6, 0U) | \
|
1601 |
PIN_AFIO_AF(GPIOI_PIN7, 0U))
|
1602 |
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ |
1603 |
PIN_AFIO_AF(GPIOI_PIN9, 0U) | \
|
1604 |
PIN_AFIO_AF(GPIOI_PIN10, 0U) | \
|
1605 |
PIN_AFIO_AF(GPIOI_PIN11, 0U) | \
|
1606 |
PIN_AFIO_AF(GPIOI_PIN12, 0U) | \
|
1607 |
PIN_AFIO_AF(GPIOI_PIN13, 0U) | \
|
1608 |
PIN_AFIO_AF(GPIOI_PIN14, 0U) | \
|
1609 |
PIN_AFIO_AF(GPIOI_PIN15, 0U))
|
1610 |
|
1611 |
/*
|
1612 |
* GPIOJ setup:
|
1613 |
*
|
1614 |
* PJ0 - PIN0 (input pullup).
|
1615 |
* PJ1 - PIN1 (input pullup).
|
1616 |
* PJ2 - PIN2 (input pullup).
|
1617 |
* PJ3 - PIN3 (input pullup).
|
1618 |
* PJ4 - PIN4 (input pullup).
|
1619 |
* PJ5 - PIN5 (input pullup).
|
1620 |
* PJ6 - PIN6 (input pullup).
|
1621 |
* PJ7 - PIN7 (input pullup).
|
1622 |
* PJ8 - PIN8 (input pullup).
|
1623 |
* PJ9 - PIN9 (input pullup).
|
1624 |
* PJ10 - PIN10 (input pullup).
|
1625 |
* PJ11 - PIN11 (input pullup).
|
1626 |
* PJ12 - PIN12 (input pullup).
|
1627 |
* PJ13 - PIN13 (input pullup).
|
1628 |
* PJ14 - PIN14 (input pullup).
|
1629 |
* PJ15 - PIN15 (input pullup).
|
1630 |
*/
|
1631 |
#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(GPIOJ_PIN0) | \
|
1632 |
PIN_MODE_INPUT(GPIOJ_PIN1) | \ |
1633 |
PIN_MODE_INPUT(GPIOJ_PIN2) | \ |
1634 |
PIN_MODE_INPUT(GPIOJ_PIN3) | \ |
1635 |
PIN_MODE_INPUT(GPIOJ_PIN4) | \ |
1636 |
PIN_MODE_INPUT(GPIOJ_PIN5) | \ |
1637 |
PIN_MODE_INPUT(GPIOJ_PIN6) | \ |
1638 |
PIN_MODE_INPUT(GPIOJ_PIN7) | \ |
1639 |
PIN_MODE_INPUT(GPIOJ_PIN8) | \ |
1640 |
PIN_MODE_INPUT(GPIOJ_PIN9) | \ |
1641 |
PIN_MODE_INPUT(GPIOJ_PIN10) | \ |
1642 |
PIN_MODE_INPUT(GPIOJ_PIN11) | \ |
1643 |
PIN_MODE_INPUT(GPIOJ_PIN12) | \ |
1644 |
PIN_MODE_INPUT(GPIOJ_PIN13) | \ |
1645 |
PIN_MODE_INPUT(GPIOJ_PIN14) | \ |
1646 |
PIN_MODE_INPUT(GPIOJ_PIN15)) |
1647 |
#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(GPIOJ_PIN0) | \
|
1648 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN1) | \ |
1649 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN2) | \ |
1650 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN3) | \ |
1651 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN4) | \ |
1652 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN5) | \ |
1653 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN6) | \ |
1654 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN7) | \ |
1655 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN8) | \ |
1656 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN9) | \ |
1657 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN10) | \ |
1658 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN11) | \ |
1659 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN12) | \ |
1660 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN13) | \ |
1661 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN14) | \ |
1662 |
PIN_OTYPE_PUSHPULL(GPIOJ_PIN15)) |
1663 |
#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOJ_PIN0) | \
|
1664 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN1) | \ |
1665 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN2) | \ |
1666 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN3) | \ |
1667 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN4) | \ |
1668 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN5) | \ |
1669 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN6) | \ |
1670 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN7) | \ |
1671 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN8) | \ |
1672 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN9) | \ |
1673 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN10) | \ |
1674 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN11) | \ |
1675 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN12) | \ |
1676 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN13) | \ |
1677 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN14) | \ |
1678 |
PIN_OSPEED_VERYLOW(GPIOJ_PIN15)) |
1679 |
#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLUP(GPIOJ_PIN0) | \
|
1680 |
PIN_PUPDR_PULLUP(GPIOJ_PIN1) | \ |
1681 |
PIN_PUPDR_PULLUP(GPIOJ_PIN2) | \ |
1682 |
PIN_PUPDR_PULLUP(GPIOJ_PIN3) | \ |
1683 |
PIN_PUPDR_PULLUP(GPIOJ_PIN4) | \ |
1684 |
PIN_PUPDR_PULLUP(GPIOJ_PIN5) | \ |
1685 |
PIN_PUPDR_PULLUP(GPIOJ_PIN6) | \ |
1686 |
PIN_PUPDR_PULLUP(GPIOJ_PIN7) | \ |
1687 |
PIN_PUPDR_PULLUP(GPIOJ_PIN8) | \ |
1688 |
PIN_PUPDR_PULLUP(GPIOJ_PIN9) | \ |
1689 |
PIN_PUPDR_PULLUP(GPIOJ_PIN10) | \ |
1690 |
PIN_PUPDR_PULLUP(GPIOJ_PIN11) | \ |
1691 |
PIN_PUPDR_PULLUP(GPIOJ_PIN12) | \ |
1692 |
PIN_PUPDR_PULLUP(GPIOJ_PIN13) | \ |
1693 |
PIN_PUPDR_PULLUP(GPIOJ_PIN14) | \ |
1694 |
PIN_PUPDR_PULLUP(GPIOJ_PIN15)) |
1695 |
#define VAL_GPIOJ_ODR (PIN_ODR_HIGH(GPIOJ_PIN0) | \
|
1696 |
PIN_ODR_HIGH(GPIOJ_PIN1) | \ |
1697 |
PIN_ODR_HIGH(GPIOJ_PIN2) | \ |
1698 |
PIN_ODR_HIGH(GPIOJ_PIN3) | \ |
1699 |
PIN_ODR_HIGH(GPIOJ_PIN4) | \ |
1700 |
PIN_ODR_HIGH(GPIOJ_PIN5) | \ |
1701 |
PIN_ODR_HIGH(GPIOJ_PIN6) | \ |
1702 |
PIN_ODR_HIGH(GPIOJ_PIN7) | \ |
1703 |
PIN_ODR_HIGH(GPIOJ_PIN8) | \ |
1704 |
PIN_ODR_HIGH(GPIOJ_PIN9) | \ |
1705 |
PIN_ODR_HIGH(GPIOJ_PIN10) | \ |
1706 |
PIN_ODR_HIGH(GPIOJ_PIN11) | \ |
1707 |
PIN_ODR_HIGH(GPIOJ_PIN12) | \ |
1708 |
PIN_ODR_HIGH(GPIOJ_PIN13) | \ |
1709 |
PIN_ODR_HIGH(GPIOJ_PIN14) | \ |
1710 |
PIN_ODR_HIGH(GPIOJ_PIN15)) |
1711 |
#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(GPIOJ_PIN0, 0U) | \ |
1712 |
PIN_AFIO_AF(GPIOJ_PIN1, 0U) | \
|
1713 |
PIN_AFIO_AF(GPIOJ_PIN2, 0U) | \
|
1714 |
PIN_AFIO_AF(GPIOJ_PIN3, 0U) | \
|
1715 |
PIN_AFIO_AF(GPIOJ_PIN4, 0U) | \
|
1716 |
PIN_AFIO_AF(GPIOJ_PIN5, 0U) | \
|
1717 |
PIN_AFIO_AF(GPIOJ_PIN6, 0U) | \
|
1718 |
PIN_AFIO_AF(GPIOJ_PIN7, 0U))
|
1719 |
#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(GPIOJ_PIN8, 0U) | \ |
1720 |
PIN_AFIO_AF(GPIOJ_PIN9, 0U) | \
|
1721 |
PIN_AFIO_AF(GPIOJ_PIN10, 0U) | \
|
1722 |
PIN_AFIO_AF(GPIOJ_PIN11, 0U) | \
|
1723 |
PIN_AFIO_AF(GPIOJ_PIN12, 0U) | \
|
1724 |
PIN_AFIO_AF(GPIOJ_PIN13, 0U) | \
|
1725 |
PIN_AFIO_AF(GPIOJ_PIN14, 0U) | \
|
1726 |
PIN_AFIO_AF(GPIOJ_PIN15, 0U))
|
1727 |
|
1728 |
/*
|
1729 |
* GPIOK setup:
|
1730 |
*
|
1731 |
* PK0 - PIN0 (input pullup).
|
1732 |
* PK1 - PIN1 (input pullup).
|
1733 |
* PK2 - PIN2 (input pullup).
|
1734 |
* PK3 - PIN3 (input pullup).
|
1735 |
* PK4 - PIN4 (input pullup).
|
1736 |
* PK5 - PIN5 (input pullup).
|
1737 |
* PK6 - PIN6 (input pullup).
|
1738 |
* PK7 - PIN7 (input pullup).
|
1739 |
* PK8 - PIN8 (input pullup).
|
1740 |
* PK9 - PIN9 (input pullup).
|
1741 |
* PK10 - PIN10 (input pullup).
|
1742 |
* PK11 - PIN11 (input pullup).
|
1743 |
* PK12 - PIN12 (input pullup).
|
1744 |
* PK13 - PIN13 (input pullup).
|
1745 |
* PK14 - PIN14 (input pullup).
|
1746 |
* PK15 - PIN15 (input pullup).
|
1747 |
*/
|
1748 |
#define VAL_GPIOK_MODER (PIN_MODE_INPUT(GPIOK_PIN0) | \
|
1749 |
PIN_MODE_INPUT(GPIOK_PIN1) | \ |
1750 |
PIN_MODE_INPUT(GPIOK_PIN2) | \ |
1751 |
PIN_MODE_INPUT(GPIOK_PIN3) | \ |
1752 |
PIN_MODE_INPUT(GPIOK_PIN4) | \ |
1753 |
PIN_MODE_INPUT(GPIOK_PIN5) | \ |
1754 |
PIN_MODE_INPUT(GPIOK_PIN6) | \ |
1755 |
PIN_MODE_INPUT(GPIOK_PIN7) | \ |
1756 |
PIN_MODE_INPUT(GPIOK_PIN8) | \ |
1757 |
PIN_MODE_INPUT(GPIOK_PIN9) | \ |
1758 |
PIN_MODE_INPUT(GPIOK_PIN10) | \ |
1759 |
PIN_MODE_INPUT(GPIOK_PIN11) | \ |
1760 |
PIN_MODE_INPUT(GPIOK_PIN12) | \ |
1761 |
PIN_MODE_INPUT(GPIOK_PIN13) | \ |
1762 |
PIN_MODE_INPUT(GPIOK_PIN14) | \ |
1763 |
PIN_MODE_INPUT(GPIOK_PIN15)) |
1764 |
#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(GPIOK_PIN0) | \
|
1765 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN1) | \ |
1766 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN2) | \ |
1767 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN3) | \ |
1768 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN4) | \ |
1769 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN5) | \ |
1770 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN6) | \ |
1771 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN7) | \ |
1772 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN8) | \ |
1773 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN9) | \ |
1774 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN10) | \ |
1775 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN11) | \ |
1776 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN12) | \ |
1777 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN13) | \ |
1778 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN14) | \ |
1779 |
PIN_OTYPE_PUSHPULL(GPIOK_PIN15)) |
1780 |
#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOK_PIN0) | \
|
1781 |
PIN_OSPEED_VERYLOW(GPIOK_PIN1) | \ |
1782 |
PIN_OSPEED_VERYLOW(GPIOK_PIN2) | \ |
1783 |
PIN_OSPEED_VERYLOW(GPIOK_PIN3) | \ |
1784 |
PIN_OSPEED_VERYLOW(GPIOK_PIN4) | \ |
1785 |
PIN_OSPEED_VERYLOW(GPIOK_PIN5) | \ |
1786 |
PIN_OSPEED_VERYLOW(GPIOK_PIN6) | \ |
1787 |
PIN_OSPEED_VERYLOW(GPIOK_PIN7) | \ |
1788 |
PIN_OSPEED_VERYLOW(GPIOK_PIN8) | \ |
1789 |
PIN_OSPEED_VERYLOW(GPIOK_PIN9) | \ |
1790 |
PIN_OSPEED_VERYLOW(GPIOK_PIN10) | \ |
1791 |
PIN_OSPEED_VERYLOW(GPIOK_PIN11) | \ |
1792 |
PIN_OSPEED_VERYLOW(GPIOK_PIN12) | \ |
1793 |
PIN_OSPEED_VERYLOW(GPIOK_PIN13) | \ |
1794 |
PIN_OSPEED_VERYLOW(GPIOK_PIN14) | \ |
1795 |
PIN_OSPEED_VERYLOW(GPIOK_PIN15)) |
1796 |
#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLUP(GPIOK_PIN0) | \
|
1797 |
PIN_PUPDR_PULLUP(GPIOK_PIN1) | \ |
1798 |
PIN_PUPDR_PULLUP(GPIOK_PIN2) | \ |
1799 |
PIN_PUPDR_PULLUP(GPIOK_PIN3) | \ |
1800 |
PIN_PUPDR_PULLUP(GPIOK_PIN4) | \ |
1801 |
PIN_PUPDR_PULLUP(GPIOK_PIN5) | \ |
1802 |
PIN_PUPDR_PULLUP(GPIOK_PIN6) | \ |
1803 |
PIN_PUPDR_PULLUP(GPIOK_PIN7) | \ |
1804 |
PIN_PUPDR_PULLUP(GPIOK_PIN8) | \ |
1805 |
PIN_PUPDR_PULLUP(GPIOK_PIN9) | \ |
1806 |
PIN_PUPDR_PULLUP(GPIOK_PIN10) | \ |
1807 |
PIN_PUPDR_PULLUP(GPIOK_PIN11) | \ |
1808 |
PIN_PUPDR_PULLUP(GPIOK_PIN12) | \ |
1809 |
PIN_PUPDR_PULLUP(GPIOK_PIN13) | \ |
1810 |
PIN_PUPDR_PULLUP(GPIOK_PIN14) | \ |
1811 |
PIN_PUPDR_PULLUP(GPIOK_PIN15)) |
1812 |
#define VAL_GPIOK_ODR (PIN_ODR_HIGH(GPIOK_PIN0) | \
|
1813 |
PIN_ODR_HIGH(GPIOK_PIN1) | \ |
1814 |
PIN_ODR_HIGH(GPIOK_PIN2) | \ |
1815 |
PIN_ODR_HIGH(GPIOK_PIN3) | \ |
1816 |
PIN_ODR_HIGH(GPIOK_PIN4) | \ |
1817 |
PIN_ODR_HIGH(GPIOK_PIN5) | \ |
1818 |
PIN_ODR_HIGH(GPIOK_PIN6) | \ |
1819 |
PIN_ODR_HIGH(GPIOK_PIN7) | \ |
1820 |
PIN_ODR_HIGH(GPIOK_PIN8) | \ |
1821 |
PIN_ODR_HIGH(GPIOK_PIN9) | \ |
1822 |
PIN_ODR_HIGH(GPIOK_PIN10) | \ |
1823 |
PIN_ODR_HIGH(GPIOK_PIN11) | \ |
1824 |
PIN_ODR_HIGH(GPIOK_PIN12) | \ |
1825 |
PIN_ODR_HIGH(GPIOK_PIN13) | \ |
1826 |
PIN_ODR_HIGH(GPIOK_PIN14) | \ |
1827 |
PIN_ODR_HIGH(GPIOK_PIN15)) |
1828 |
#define VAL_GPIOK_AFRL (PIN_AFIO_AF(GPIOK_PIN0, 0U) | \ |
1829 |
PIN_AFIO_AF(GPIOK_PIN1, 0U) | \
|
1830 |
PIN_AFIO_AF(GPIOK_PIN2, 0U) | \
|
1831 |
PIN_AFIO_AF(GPIOK_PIN3, 0U) | \
|
1832 |
PIN_AFIO_AF(GPIOK_PIN4, 0U) | \
|
1833 |
PIN_AFIO_AF(GPIOK_PIN5, 0U) | \
|
1834 |
PIN_AFIO_AF(GPIOK_PIN6, 0U) | \
|
1835 |
PIN_AFIO_AF(GPIOK_PIN7, 0U))
|
1836 |
#define VAL_GPIOK_AFRH (PIN_AFIO_AF(GPIOK_PIN8, 0U) | \ |
1837 |
PIN_AFIO_AF(GPIOK_PIN9, 0U) | \
|
1838 |
PIN_AFIO_AF(GPIOK_PIN10, 0U) | \
|
1839 |
PIN_AFIO_AF(GPIOK_PIN11, 0U) | \
|
1840 |
PIN_AFIO_AF(GPIOK_PIN12, 0U) | \
|
1841 |
PIN_AFIO_AF(GPIOK_PIN13, 0U) | \
|
1842 |
PIN_AFIO_AF(GPIOK_PIN14, 0U) | \
|
1843 |
PIN_AFIO_AF(GPIOK_PIN15, 0U))
|
1844 |
|
1845 |
/*===========================================================================*/
|
1846 |
/* External declarations. */
|
1847 |
/*===========================================================================*/
|
1848 |
|
1849 |
#if !defined(_FROM_ASM_)
|
1850 |
#ifdef __cplusplus
|
1851 |
extern "C" { |
1852 |
#endif
|
1853 |
void boardInit(void); |
1854 |
#ifdef __cplusplus
|
1855 |
} |
1856 |
#endif
|
1857 |
#endif /* _FROM_ASM_ */ |
1858 |
|
1859 |
#endif /* BOARD_H */ |