amiro-os / modules / PowerManagement_1-2 / board.h @ bc7aed20
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/*
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AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2019 Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file
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* @brief PowerManagement v1.2 Board specific macros.
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*
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* @addtogroup powermanagement_board
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* @{
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* Setup for AMiRo PowerManagement v1.2 board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_POWERMANAGEMENT_1_2
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#define BOARD_NAME "AMiRo PowerManagement v1.2" |
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0U |
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#endif
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000U |
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 330U |
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F405xx
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/*
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* STM32F4 alternate function definitions
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*/
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#define STM32F4xx_AF_system 0U |
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#define STM32F4xx_AF_TIM1to2 1U |
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#define STM32F4xx_AF_TIM3to5 2U |
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#define STM32F4xx_AF_TIM8to11 3U |
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#define STM32F4xx_AF_I2C1to3 4U |
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#define STM32F4xx_AF_SPI1to2 5U |
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#define STM32F4xx_AF_SPI3 6U |
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#define STM32F4xx_AF_USART1to3 7U |
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#define STM32F4xx_AF_USART4to6 8U |
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#define STM32F4xx_AF_CAN1to2_TIM12to14 9U |
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#define STM32F4xx_AF_OTG_HSFS 10U |
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#define STM32F4xx_AF_ETH 11U |
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#define STM32F4xx_AF_FSMC_SDIO_OTGHS 12U |
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#define STM32F4xx_AF_DCMI 13U |
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#define STM32F4xx_AF_EVENTOUT 15U |
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/*
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* Identifiers for the several sensor rings, which can be attached to the PowerManagement v1.2 module.
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*/
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#define BOARD_NOSENSORRING 0 |
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#define BOARD_PROXIMITYSENSOR 1 |
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#define BOARD_DISTANCESENSOR_VL53L0X 2 |
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#define BOARD_DISTANCESENSOR_VL53L1X 3 |
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/*
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* Configuration macro to define which type of sensor ring is attached.
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*/
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#if !defined(BOARD_SENSORRING) || defined(__DOXYGEN__)
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#define BOARD_SENSORRING BOARD_NOSENSORRING
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#endif
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/*
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* IO pins assignments.
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*/
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#define GPIOA_WKUP 0U |
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#define GPIOA_SWITCH_STATUS_N 1U |
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#define GPIOA_SYS_UART_TX 2U |
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#define GPIOA_SYS_UART_RX 3U |
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#define GPIOA_SYS_SPI_SS0_N 4U |
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#define GPIOA_SYS_SPI_SCLK 5U |
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#define GPIOA_SYS_SPI_MISO 6U |
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#define GPIOA_SYS_SPI_MOSI 7U |
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#define GPIOA_SYS_REG_EN 8U |
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#define GPIOA_PROG_RX 9U |
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#define GPIOA_PROG_TX 10U |
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#define GPIOA_CAN_RX 11U |
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#define GPIOA_CAN_TX 12U |
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#define GPIOA_SWDIO 13U |
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#define GPIOA_SWCLK 14U |
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#define GPIOA_SYS_SPI_SS1_N 15U |
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#define GPIOB_IR_INT1_N 0U |
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#define GPIOB_VSYS_SENSE 1U |
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#define GPIOB_POWER_EN 2U |
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#define GPIOB_SYS_UART_DN 3U |
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#define GPIOB_CHARGE_STAT2A 4U |
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#define GPIOB_BUZZER 5U |
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#define GPIOB_GAUGE_BATLOW2 6U |
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#define GPIOB_GAUGE_BATGD2_N 7U |
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#define GPIOB_GAUGE_SCL2 8U |
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#define GPIOB_GAUGE_SDA2 9U |
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#define GPIOB_GAUGE_SCL1 10U |
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#define GPIOB_GAUGE_SDA1 11U |
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#define GPIOB_LED 12U |
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#define GPIOB_BT_RTS 13U |
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#define GPIOB_BT_CTS 14U |
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#define GPIOB_SYS_UART_UP 15U |
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#define GPIOC_CHARGE_STAT1A 0U |
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#define GPIOC_GAUGE_BATLOW1 1U |
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#define GPIOC_GAUGE_BATGD1_N 2U |
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#define GPIOC_CHARGE_EN1_N 3U |
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#define GPIOC_IR_INT2_N 4U |
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#define GPIOC_TOUCH_INT_N 5U |
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#define GPIOC_SYS_DONE 6U |
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#define GPIOC_SYS_PROG_N 7U |
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#define GPIOC_PATH_DC 8U |
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#define GPIOC_SYS_SPI_DIR 9U |
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#define GPIOC_BT_RX 10U |
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#define GPIOC_BT_TX 11U |
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#define GPIOC_SYS_INT_N 12U |
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#define GPIOC_SYS_PD_N 13U |
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#define GPIOC_SYS_WARMRST_N 14U |
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#define GPIOC_BT_RST 15U |
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#define GPIOD_PIN0 0U |
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#define GPIOD_PIN1 1U |
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#define GPIOD_CHARGE_EN2_N 2U |
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#define GPIOD_PIN3 3U |
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#define GPIOD_PIN4 4U |
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#define GPIOD_PIN5 5U |
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#define GPIOD_PIN6 6U |
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#define GPIOD_PIN7 7U |
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#define GPIOD_PIN8 8U |
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#define GPIOD_PIN9 9U |
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#define GPIOD_PIN10 10U |
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#define GPIOD_PIN11 11U |
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#define GPIOD_PIN12 12U |
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#define GPIOD_PIN13 13U |
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#define GPIOD_PIN14 14U |
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#define GPIOD_PIN15 15U |
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#define GPIOE_PIN0 0U |
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#define GPIOE_PIN1 1U |
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#define GPIOE_PIN2 2U |
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#define GPIOE_PIN3 3U |
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#define GPIOE_PIN4 4U |
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#define GPIOE_PIN5 5U |
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#define GPIOE_PIN6 6U |
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#define GPIOE_PIN7 7U |
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#define GPIOE_PIN8 8U |
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#define GPIOE_PIN9 9U |
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#define GPIOE_PIN10 10U |
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#define GPIOE_PIN11 11U |
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#define GPIOE_PIN12 12U |
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#define GPIOE_PIN13 13U |
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#define GPIOE_PIN14 14U |
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#define GPIOE_PIN15 15U |
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#define GPIOF_PIN0 0U |
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#define GPIOF_PIN1 1U |
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#define GPIOF_PIN2 2U |
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#define GPIOF_PIN3 3U |
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#define GPIOF_PIN4 4U |
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#define GPIOF_PIN5 5U |
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#define GPIOF_PIN6 6U |
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#define GPIOF_PIN7 7U |
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#define GPIOF_PIN8 8U |
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#define GPIOF_PIN9 9U |
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#define GPIOF_PIN10 10U |
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#define GPIOF_PIN11 11U |
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#define GPIOF_PIN12 12U |
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#define GPIOF_PIN13 13U |
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#define GPIOF_PIN14 14U |
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#define GPIOF_PIN15 15U |
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#define GPIOG_PIN0 0U |
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#define GPIOG_PIN1 1U |
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#define GPIOG_PIN2 2U |
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#define GPIOG_PIN3 3U |
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#define GPIOG_PIN4 4U |
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#define GPIOG_PIN5 5U |
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#define GPIOG_PIN6 6U |
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#define GPIOG_PIN7 7U |
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#define GPIOG_PIN8 8U |
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#define GPIOG_PIN9 9U |
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#define GPIOG_PIN10 10U |
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#define GPIOG_PIN11 11U |
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#define GPIOG_PIN12 12U |
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#define GPIOG_PIN13 13U |
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#define GPIOG_PIN14 14U |
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#define GPIOG_PIN15 15U |
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#define GPIOH_OSC_IN 0U |
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#define GPIOH_OSC_OUT 1U |
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#define GPIOH_PIN2 2U |
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#define GPIOH_PIN3 3U |
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#define GPIOH_PIN4 4U |
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#define GPIOH_PIN5 5U |
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#define GPIOH_PIN6 6U |
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#define GPIOH_PIN7 7U |
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#define GPIOH_PIN8 8U |
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#define GPIOH_PIN9 9U |
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#define GPIOH_PIN10 10U |
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#define GPIOH_PIN11 11U |
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#define GPIOH_PIN12 12U |
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#define GPIOH_PIN13 13U |
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#define GPIOH_PIN14 14U |
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#define GPIOH_PIN15 15U |
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#define GPIOI_PIN0 0U |
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#define GPIOI_PIN1 1U |
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#define GPIOI_PIN2 2U |
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#define GPIOI_PIN3 3U |
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#define GPIOI_PIN4 4U |
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#define GPIOI_PIN5 5U |
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#define GPIOI_PIN6 6U |
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#define GPIOI_PIN7 7U |
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#define GPIOI_PIN8 8U |
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#define GPIOI_PIN9 9U |
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#define GPIOI_PIN10 10U |
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#define GPIOI_PIN11 11U |
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#define GPIOI_PIN12 12U |
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#define GPIOI_PIN13 13U |
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#define GPIOI_PIN14 14U |
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#define GPIOI_PIN15 15U |
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/*
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* IO lines assignments.
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*/
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#define LINE_WKUP PAL_LINE(GPIOA, GPIOA_WKUP)
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#define LINE_SWITCH_STATUS_N PAL_LINE(GPIOA, GPIOA_SWITCH_STATUS_N)
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#define LINE_SYS_UART_TX PAL_LINE(GPIOA, GPIOA_SYS_UART_TX)
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#define LINE_SYS_UART_RX PAL_LINE(GPIOA, GPIOA_SYS_UART_RX)
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#define LINE_SYS_SPI_SS0_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N)
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#define LINE_SYS_SPI_SCLK PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK)
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#define LINE_SYS_SPI_MISO PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO)
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#define LINE_SYS_SPI_MOSI PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI)
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#define LINE_SYS_REG_EN PAL_LINE(GPIOA, GPIOA_SYS_REG_EN)
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#define LINE_PROG_RX PAL_LINE(GPIOA, GPIOA_PROG_RX)
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#define LINE_PROG_TX PAL_LINE(GPIOA, GPIOA_PROG_TX)
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#define LINE_CAN_RX PAL_LINE(GPIOA, GPIOA_CAN_RX)
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#define LINE_CAN_TX PAL_LINE(GPIOA, GPIOA_CAN_TX)
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#define LINE_SWDIO PAL_LINE(GPIOA, GPIOA_SWDIO)
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#define LINE_SWCLK PAL_LINE(GPIOA, GPIOA_SWCLK)
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#define LINE_SYS_SPI_SS1_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N)
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#define LINE_IR_INT1_N PAL_LINE(GPIOB, GPIOB_IR_INT1_N)
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#define LINE_VSYS_SENSE PAL_LINE(GPIOB, GPIOB_VSYS_SENSE)
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#define LINE_POWER_EN PAL_LINE(GPIOB, GPIOB_POWER_EN)
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#define LINE_SYS_UART_DN PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
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#define LINE_CHARGE_STAT2A PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A)
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#define LINE_BUZZER PAL_LINE(GPIOB, GPIOB_BUZZER)
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#define LINE_GAUGE_BATLOW2 PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2)
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#define LINE_GAUGE_BATGD2_N PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N)
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#define LINE_GAUGE_SCL2 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2)
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#define LINE_GAUGE_SDA2 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2)
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#define LINE_GAUGE_SCL1 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1)
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#define LINE_GAUGE_SDA1 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1)
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#define LINE_LED PAL_LINE(GPIOB, GPIOB_LED)
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#define LINE_BT_RTS PAL_LINE(GPIOB, GPIOB_BT_RTS)
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#define LINE_BT_CTS PAL_LINE(GPIOB, GPIOB_BT_CTS)
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#define LINE_SYS_UART_UP PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
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#define LINE_CHARGE_STAT1A PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A)
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#define LINE_GAUGE_BATLOW1 PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1)
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#define LINE_GAUGE_BATGD1_N PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N)
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#define LINE_CHARGE_EN1_N PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N)
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#define LINE_IR_INT2_N PAL_LINE(GPIOC, GPIOC_IR_INT2_N)
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#define LINE_TOUCH_INT_N PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N)
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#define LINE_SYS_DONE PAL_LINE(GPIOC, GPIOC_SYS_DONE)
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#define LINE_SYS_PROG_N PAL_LINE(GPIOC, GPIOC_SYS_PROG_N)
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#define LINE_PATH_DC PAL_LINE(GPIOC, GPIOC_PATH_DC)
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#define LINE_SYS_SPI_DIR PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR)
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#define LINE_BT_RX PAL_LINE(GPIOC, GPIOC_BT_RX)
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#define LINE_BT_TX PAL_LINE(GPIOC, GPIOC_BT_TX)
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#define LINE_SYS_INT_N PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
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#define LINE_SYS_PD_N PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
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#define LINE_SYS_WARMRST_N PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N)
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#define LINE_BT_RST PAL_LINE(GPIOC, GPIOC_BT_RST)
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#define LINE_CHARGE_EN2_N PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N)
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#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) |
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#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) |
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
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#define PIN_ODR_LOW(n) (0U << (n)) |
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#define PIN_ODR_HIGH(n) (1U << (n)) |
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
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#define PIN_OSPEED_LOW(n) (0U << ((n) * 2U)) |
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#define PIN_OSPEED_MEDIUM(n) (1U << ((n) * 2U)) |
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#define PIN_OSPEED_HIGH(n) (2U << ((n) * 2U)) |
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#define PIN_OSPEED_VERYHIGH(n) (3U << ((n) * 2U)) |
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
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/*
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* GPIOA setup:
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*
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* PA0 - WKUP (input floating)
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* PA1 - SWITCH_STATUS_N (input floating)
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* PA2 - SYS_UART_TX (input floating)
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* PA3 - SYS_UART_RX (alternate 7 pushpull floating)
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* PA4 - SYS_SPI_SS0_N (input floating)
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* PA5 - SYS_SPI_SCLK (alternate 5 pushpull floating)
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* PA6 - SYS_SPI_MISO (alternate 5 pushpull floating)
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* PA7 - SYS_SPI_MOSI (alternate 5 pushpull floating)
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* PA8 - SYS_REG_EN (output pushpull high)
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* PA9 - PROG_RX (alternate 7 pushpull floating)
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* PA10 - PROG_TX (alternate 7 pushpull pullup)
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* PA11 - CAN_RX (alternate 9 pushpull floating)
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* PA12 - CAN_TX (alternate 9 pushpull floating)
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* PA13 - SWDIO (alternate 0 pushpull floating)
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* PA14 - SWCLK (alternate 0 pushpull floating)
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* PA15 - SYS_SPI_SS1_N (input floating)
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_WKUP) | \
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PIN_MODE_INPUT(GPIOA_SWITCH_STATUS_N) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_UART_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) | \ |
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PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) | \ |
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PIN_MODE_ALTERNATE(GPIOA_PROG_RX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_PROG_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_CAN_RX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_CAN_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N)) |
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWITCH_STATUS_N) | \ |
| 392 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) | \ |
| 393 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) | \ |
| 394 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) | \ |
| 395 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) | \ |
| 396 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) | \ |
| 397 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) | \ |
| 398 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) | \ |
| 399 |
PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) | \ |
| 400 |
PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) | \ |
| 401 |
PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) | \ |
| 402 |
PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) | \ |
| 403 |
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ |
| 404 |
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ |
| 405 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N)) |
| 406 |
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) | \
|
| 407 |
PIN_OSPEED_VERYHIGH(GPIOA_SWITCH_STATUS_N) | \ |
| 408 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) | \ |
| 409 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) | \ |
| 410 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) | \ |
| 411 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) | \ |
| 412 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) | \ |
| 413 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) | \ |
| 414 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) | \ |
| 415 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) | \ |
| 416 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) | \ |
| 417 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) | \ |
| 418 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) | \ |
| 419 |
PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) | \ |
| 420 |
PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) | \ |
| 421 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N)) |
| 422 |
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_WKUP) | \
|
| 423 |
PIN_PUPDR_FLOATING(GPIOA_SWITCH_STATUS_N) | \ |
| 424 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) | \ |
| 425 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) | \ |
| 426 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) | \ |
| 427 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) | \ |
| 428 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) | \ |
| 429 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) | \ |
| 430 |
PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) | \ |
| 431 |
PIN_PUPDR_FLOATING(GPIOA_PROG_RX) | \ |
| 432 |
PIN_PUPDR_PULLUP(GPIOA_PROG_TX) | \ |
| 433 |
PIN_PUPDR_FLOATING(GPIOA_CAN_RX) | \ |
| 434 |
PIN_PUPDR_FLOATING(GPIOA_CAN_TX) | \ |
| 435 |
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ |
| 436 |
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ |
| 437 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N)) |
| 438 |
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_WKUP) | \
|
| 439 |
PIN_ODR_HIGH(GPIOA_SWITCH_STATUS_N) | \ |
| 440 |
PIN_ODR_HIGH(GPIOA_SYS_UART_TX) | \ |
| 441 |
PIN_ODR_HIGH(GPIOA_SYS_UART_RX) | \ |
| 442 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) | \ |
| 443 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) | \ |
| 444 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) | \ |
| 445 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) | \ |
| 446 |
PIN_ODR_HIGH(GPIOA_SYS_REG_EN) | \ |
| 447 |
PIN_ODR_HIGH(GPIOA_PROG_RX) | \ |
| 448 |
PIN_ODR_HIGH(GPIOA_PROG_TX) | \ |
| 449 |
PIN_ODR_HIGH(GPIOA_CAN_RX) | \ |
| 450 |
PIN_ODR_HIGH(GPIOA_CAN_TX) | \ |
| 451 |
PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
| 452 |
PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
| 453 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N)) |
| 454 |
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) | \
|
| 455 |
PIN_AFIO_AF(GPIOA_SWITCH_STATUS_N, STM32F4xx_AF_system) | \ |
| 456 |
PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) | \ |
| 457 |
PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) | \ |
| 458 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) | \ |
| 459 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) | \ |
| 460 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) | \ |
| 461 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2)) |
| 462 |
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) | \
|
| 463 |
PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) | \ |
| 464 |
PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) | \ |
| 465 |
PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
| 466 |
PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
| 467 |
PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) | \ |
| 468 |
PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) | \ |
| 469 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system)) |
| 470 |
|
| 471 |
/*
|
| 472 |
* GPIOB setup:
|
| 473 |
*
|
| 474 |
* PB0 - IR_INT1_N (input floating)
|
| 475 |
* PB1 - VSYS_SENSE (analog)
|
| 476 |
* PB2 - POWER_EN (output pushpull high)
|
| 477 |
* PB3 - SYS_UART_DN (output opendrain high)
|
| 478 |
* PB4 - CHARGE_STAT2A (inout floating)
|
| 479 |
* PB5 - BUZZER (alternate 2 pushpull floating)
|
| 480 |
* PB6 - GAUGE_BATLOW2 (input floating)
|
| 481 |
* PB7 - GAUGE_BATGD2_N (input floating)
|
| 482 |
* PB8 - GAUGE_SCL2 (alternate 4 opendrain floating)
|
| 483 |
* PB9 - GAUGE_SDA2 (alternate 4 opendrain floating)
|
| 484 |
* PB10 - GAUGE_SCL1 (alternate 4 opendrain floating)
|
| 485 |
* PB11 - GAUGE_SDA1 (alternate 4 opendrain floating)
|
| 486 |
* PB12 - LED (output opendrain high)
|
| 487 |
* PB13 - BT_RTS (alternate 7 pushpull floating)
|
| 488 |
* PB14 - BT_CTS (inout floating)
|
| 489 |
* PB15 - SYS_UART_UP (output opendrain high)
|
| 490 |
*/
|
| 491 |
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_IR_INT1_N) | \
|
| 492 |
PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) | \ |
| 493 |
PIN_MODE_OUTPUT(GPIOB_POWER_EN) | \ |
| 494 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) | \ |
| 495 |
PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) | \ |
| 496 |
PIN_MODE_ALTERNATE(GPIOB_BUZZER) | \ |
| 497 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) | \ |
| 498 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) | \ |
| 499 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) | \ |
| 500 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) | \ |
| 501 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) | \ |
| 502 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) | \ |
| 503 |
PIN_MODE_OUTPUT(GPIOB_LED) | \ |
| 504 |
PIN_MODE_ALTERNATE(GPIOB_BT_RTS) | \ |
| 505 |
PIN_MODE_INPUT(GPIOB_BT_CTS) | \ |
| 506 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP)) |
| 507 |
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) | \
|
| 508 |
PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) | \ |
| 509 |
PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) | \ |
| 510 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) | \ |
| 511 |
PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) | \ |
| 512 |
PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) | \ |
| 513 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) | \ |
| 514 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) | \ |
| 515 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) | \ |
| 516 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) | \ |
| 517 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) | \ |
| 518 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) | \ |
| 519 |
PIN_OTYPE_OPENDRAIN(GPIOB_LED) | \ |
| 520 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) | \ |
| 521 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) | \ |
| 522 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP)) |
| 523 |
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) | \
|
| 524 |
PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) | \ |
| 525 |
PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) | \ |
| 526 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) | \ |
| 527 |
PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) | \ |
| 528 |
PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) | \ |
| 529 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) | \ |
| 530 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) | \ |
| 531 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) | \ |
| 532 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) | \ |
| 533 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) | \ |
| 534 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) | \ |
| 535 |
PIN_OSPEED_VERYHIGH(GPIOB_LED) | \ |
| 536 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) | \ |
| 537 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) | \ |
| 538 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP)) |
| 539 |
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) | \
|
| 540 |
PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) | \ |
| 541 |
PIN_PUPDR_FLOATING(GPIOB_POWER_EN) | \ |
| 542 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) | \ |
| 543 |
PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) | \ |
| 544 |
PIN_PUPDR_FLOATING(GPIOB_BUZZER) | \ |
| 545 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) | \ |
| 546 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) | \ |
| 547 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) | \ |
| 548 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) | \ |
| 549 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) | \ |
| 550 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) | \ |
| 551 |
PIN_PUPDR_FLOATING(GPIOB_LED) | \ |
| 552 |
PIN_PUPDR_FLOATING(GPIOB_BT_RTS) | \ |
| 553 |
PIN_PUPDR_FLOATING(GPIOB_BT_CTS) | \ |
| 554 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP)) |
| 555 |
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_IR_INT1_N) | \
|
| 556 |
PIN_ODR_HIGH(GPIOB_VSYS_SENSE) | \ |
| 557 |
PIN_ODR_HIGH(GPIOB_POWER_EN) | \ |
| 558 |
PIN_ODR_HIGH(GPIOB_SYS_UART_DN) | \ |
| 559 |
PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) | \ |
| 560 |
PIN_ODR_HIGH(GPIOB_BUZZER) | \ |
| 561 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) | \ |
| 562 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) | \ |
| 563 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) | \ |
| 564 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) | \ |
| 565 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL1) | \ |
| 566 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA1) | \ |
| 567 |
PIN_ODR_HIGH(GPIOB_LED) | \ |
| 568 |
PIN_ODR_HIGH(GPIOB_BT_RTS) | \ |
| 569 |
PIN_ODR_HIGH(GPIOB_BT_CTS) | \ |
| 570 |
PIN_ODR_HIGH(GPIOB_SYS_UART_UP)) |
| 571 |
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_IR_INT1_N, STM32F4xx_AF_system) | \
|
| 572 |
PIN_AFIO_AF(GPIOB_VSYS_SENSE, STM32F4xx_AF_system) | \ |
| 573 |
PIN_AFIO_AF(GPIOB_POWER_EN, STM32F4xx_AF_system) | \ |
| 574 |
PIN_AFIO_AF(GPIOB_SYS_UART_DN, STM32F4xx_AF_system) | \ |
| 575 |
PIN_AFIO_AF(GPIOB_CHARGE_STAT2A, STM32F4xx_AF_system) | \ |
| 576 |
PIN_AFIO_AF(GPIOB_BUZZER, STM32F4xx_AF_TIM3to5) | \ |
| 577 |
PIN_AFIO_AF(GPIOB_GAUGE_BATLOW2, STM32F4xx_AF_system) | \ |
| 578 |
PIN_AFIO_AF(GPIOB_GAUGE_BATGD2_N, STM32F4xx_AF_system)) |
| 579 |
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, STM32F4xx_AF_I2C1to3) | \
|
| 580 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA2, STM32F4xx_AF_I2C1to3) | \ |
| 581 |
PIN_AFIO_AF(GPIOB_GAUGE_SCL1, STM32F4xx_AF_I2C1to3) | \ |
| 582 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA1, STM32F4xx_AF_I2C1to3) | \ |
| 583 |
PIN_AFIO_AF(GPIOB_LED, STM32F4xx_AF_system) | \ |
| 584 |
PIN_AFIO_AF(GPIOB_BT_RTS, STM32F4xx_AF_USART1to3) | \ |
| 585 |
PIN_AFIO_AF(GPIOB_BT_CTS, STM32F4xx_AF_USART1to3) | \ |
| 586 |
PIN_AFIO_AF(GPIOB_SYS_UART_UP, STM32F4xx_AF_system)) |
| 587 |
|
| 588 |
/*
|
| 589 |
* GPIOC setup:
|
| 590 |
*
|
| 591 |
* PC0 - CHARGE_STAT1A (input floating)
|
| 592 |
* PC1 - GAUGE_BATLOW1 (input floating)
|
| 593 |
* PC2 - GAUGE_BATGD1_N (input floating)
|
| 594 |
* PC3 - CHARGE_EN1_N (output opendrain high)
|
| 595 |
* PC4 - IR_INT2_N (input floating)
|
| 596 |
* PC5 - TOUCH_INT_N (input floating)
|
| 597 |
* PC6 - SYS_DONE (input floating)
|
| 598 |
* PC7 - SYS_PROG_N (output opendrain high)
|
| 599 |
* PC8 - PATH_DC (input floating)
|
| 600 |
* PC9 - SYS_SPI_DIR (output opendrain high)
|
| 601 |
* PC10 - BT_RX (alternate 7 pushpull floating)
|
| 602 |
* PC11 - BT_TX (alternate 7 pushpull floating)
|
| 603 |
* PC12 - SYS_INT_N (output opendrain low)
|
| 604 |
* PC13 - SYS_PD_N (output opendrain high)
|
| 605 |
* PC14 - SYS_WARMRST_N (output opendrain high)
|
| 606 |
* PC15 - BT_RST (output opendrain high)
|
| 607 |
*/
|
| 608 |
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) | \
|
| 609 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) | \ |
| 610 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) | \ |
| 611 |
PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) | \ |
| 612 |
PIN_MODE_INPUT(GPIOC_IR_INT2_N) | \ |
| 613 |
PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) | \ |
| 614 |
PIN_MODE_INPUT(GPIOC_SYS_DONE) | \ |
| 615 |
PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) | \ |
| 616 |
PIN_MODE_INPUT(GPIOC_PATH_DC) | \ |
| 617 |
PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) | \ |
| 618 |
PIN_MODE_ALTERNATE(GPIOC_BT_RX) | \ |
| 619 |
PIN_MODE_ALTERNATE(GPIOC_BT_TX) | \ |
| 620 |
PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) | \ |
| 621 |
PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) | \ |
| 622 |
PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) | \ |
| 623 |
PIN_MODE_OUTPUT(GPIOC_BT_RST)) |
| 624 |
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_CHARGE_STAT1A) | \
|
| 625 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATLOW1) | \ |
| 626 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATGD1_N) | \ |
| 627 |
PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) | \ |
| 628 |
PIN_OTYPE_PUSHPULL(GPIOC_IR_INT2_N) | \ |
| 629 |
PIN_OTYPE_PUSHPULL(GPIOC_TOUCH_INT_N) | \ |
| 630 |
PIN_OTYPE_PUSHPULL(GPIOC_SYS_DONE) | \ |
| 631 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) | \ |
| 632 |
PIN_OTYPE_PUSHPULL(GPIOC_PATH_DC) | \ |
| 633 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) | \ |
| 634 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) | \ |
| 635 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_TX) | \ |
| 636 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) | \ |
| 637 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) | \ |
| 638 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) | \ |
| 639 |
PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST)) |
| 640 |
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_STAT1A) | \
|
| 641 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATLOW1) | \ |
| 642 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATGD1_N) | \ |
| 643 |
PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_EN1_N) | \ |
| 644 |
PIN_OSPEED_VERYHIGH(GPIOC_IR_INT2_N) | \ |
| 645 |
PIN_OSPEED_VERYHIGH(GPIOC_TOUCH_INT_N) | \ |
| 646 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_DONE) | \ |
| 647 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PROG_N) | \ |
| 648 |
PIN_OSPEED_VERYHIGH(GPIOC_PATH_DC) | \ |
| 649 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_SPI_DIR) | \ |
| 650 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RX) | \ |
| 651 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_TX) | \ |
| 652 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_INT_N) | \ |
| 653 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PD_N) | \ |
| 654 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_WARMRST_N) | \ |
| 655 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RST)) |
| 656 |
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_CHARGE_STAT1A) | \
|
| 657 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATLOW1) | \ |
| 658 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATGD1_N) | \ |
| 659 |
PIN_PUPDR_FLOATING(GPIOC_CHARGE_EN1_N) | \ |
| 660 |
PIN_PUPDR_FLOATING(GPIOC_IR_INT2_N) | \ |
| 661 |
PIN_PUPDR_FLOATING(GPIOC_TOUCH_INT_N) | \ |
| 662 |
PIN_PUPDR_FLOATING(GPIOC_SYS_DONE) | \ |
| 663 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PROG_N) | \ |
| 664 |
PIN_PUPDR_FLOATING(GPIOC_PATH_DC) | \ |
| 665 |
PIN_PUPDR_FLOATING(GPIOC_SYS_SPI_DIR) | \ |
| 666 |
PIN_PUPDR_FLOATING(GPIOC_BT_RX) | \ |
| 667 |
PIN_PUPDR_FLOATING(GPIOC_BT_TX) | \ |
| 668 |
PIN_PUPDR_FLOATING(GPIOC_SYS_INT_N) | \ |
| 669 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PD_N) | \ |
| 670 |
PIN_PUPDR_FLOATING(GPIOC_SYS_WARMRST_N) | \ |
| 671 |
PIN_PUPDR_FLOATING(GPIOC_BT_RST)) |
| 672 |
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_CHARGE_STAT1A) | \
|
| 673 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATLOW1) | \ |
| 674 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATGD1_N) | \ |
| 675 |
PIN_ODR_HIGH(GPIOC_CHARGE_EN1_N) | \ |
| 676 |
PIN_ODR_HIGH(GPIOC_IR_INT2_N) | \ |
| 677 |
PIN_ODR_HIGH(GPIOC_TOUCH_INT_N) | \ |
| 678 |
PIN_ODR_HIGH(GPIOC_SYS_DONE) | \ |
| 679 |
PIN_ODR_HIGH(GPIOC_SYS_PROG_N) | \ |
| 680 |
PIN_ODR_LOW(GPIOC_PATH_DC) | \ |
| 681 |
PIN_ODR_HIGH(GPIOC_SYS_SPI_DIR) | \ |
| 682 |
PIN_ODR_HIGH(GPIOC_BT_RX) | \ |
| 683 |
PIN_ODR_HIGH(GPIOC_BT_TX) | \ |
| 684 |
PIN_ODR_LOW(GPIOC_SYS_INT_N) | \ |
| 685 |
PIN_ODR_HIGH(GPIOC_SYS_PD_N) | \ |
| 686 |
PIN_ODR_HIGH(GPIOC_SYS_WARMRST_N) | \ |
| 687 |
PIN_ODR_HIGH(GPIOC_BT_RST)) |
| 688 |
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_CHARGE_STAT1A, STM32F4xx_AF_system) | \
|
| 689 |
PIN_AFIO_AF(GPIOC_GAUGE_BATLOW1, STM32F4xx_AF_system) | \ |
| 690 |
PIN_AFIO_AF(GPIOC_GAUGE_BATGD1_N, STM32F4xx_AF_system) | \ |
| 691 |
PIN_AFIO_AF(GPIOC_CHARGE_EN1_N, STM32F4xx_AF_system) | \ |
| 692 |
PIN_AFIO_AF(GPIOC_IR_INT2_N, STM32F4xx_AF_system) | \ |
| 693 |
PIN_AFIO_AF(GPIOC_TOUCH_INT_N, STM32F4xx_AF_system) | \ |
| 694 |
PIN_AFIO_AF(GPIOC_SYS_DONE, STM32F4xx_AF_system) | \ |
| 695 |
PIN_AFIO_AF(GPIOC_SYS_PROG_N, STM32F4xx_AF_system)) |
| 696 |
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PATH_DC, STM32F4xx_AF_system) | \
|
| 697 |
PIN_AFIO_AF(GPIOC_SYS_SPI_DIR, STM32F4xx_AF_system) | \ |
| 698 |
PIN_AFIO_AF(GPIOC_BT_RX, STM32F4xx_AF_USART1to3) | \ |
| 699 |
PIN_AFIO_AF(GPIOC_BT_TX, STM32F4xx_AF_USART1to3) | \ |
| 700 |
PIN_AFIO_AF(GPIOC_SYS_INT_N, STM32F4xx_AF_system) | \ |
| 701 |
PIN_AFIO_AF(GPIOC_SYS_PD_N, STM32F4xx_AF_system) | \ |
| 702 |
PIN_AFIO_AF(GPIOC_SYS_WARMRST_N, STM32F4xx_AF_system) | \ |
| 703 |
PIN_AFIO_AF(GPIOC_BT_RST, STM32F4xx_AF_system)) |
| 704 |
|
| 705 |
/*
|
| 706 |
* GPIOD setup:
|
| 707 |
*
|
| 708 |
* PD0 - PIN0 (input floating)
|
| 709 |
* PD1 - PIN1 (input floating)
|
| 710 |
* PD2 - CHARGE_EN2_N (output opendrain high)
|
| 711 |
* PD3 - PIN3 (input floating)
|
| 712 |
* PD4 - PIN4 (input floating)
|
| 713 |
* PD5 - PIN5 (input floating)
|
| 714 |
* PD6 - PIN6 (input floating)
|
| 715 |
* PD7 - PIN7 (input floating)
|
| 716 |
* PD8 - PIN8 (input floating)
|
| 717 |
* PD9 - PIN9 (input floating)
|
| 718 |
* PD10 - PIN10 (input floating)
|
| 719 |
* PD11 - PIN11 (input floating)
|
| 720 |
* PD12 - PIN12 (input floating)
|
| 721 |
* PD13 - PIN13 (input floating)
|
| 722 |
* PD14 - PIN14 (input floating)
|
| 723 |
* PD15 - PIN15 (input floating)
|
| 724 |
*/
|
| 725 |
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
| 726 |
PIN_MODE_INPUT(GPIOD_PIN1) | \ |
| 727 |
PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) | \ |
| 728 |
PIN_MODE_INPUT(GPIOD_PIN3) | \ |
| 729 |
PIN_MODE_INPUT(GPIOD_PIN4) | \ |
| 730 |
PIN_MODE_INPUT(GPIOD_PIN5) | \ |
| 731 |
PIN_MODE_INPUT(GPIOD_PIN6) | \ |
| 732 |
PIN_MODE_INPUT(GPIOD_PIN7) | \ |
| 733 |
PIN_MODE_INPUT(GPIOD_PIN8) | \ |
| 734 |
PIN_MODE_INPUT(GPIOD_PIN9) | \ |
| 735 |
PIN_MODE_INPUT(GPIOD_PIN10) | \ |
| 736 |
PIN_MODE_INPUT(GPIOD_PIN11) | \ |
| 737 |
PIN_MODE_INPUT(GPIOD_PIN12) | \ |
| 738 |
PIN_MODE_INPUT(GPIOD_PIN13) | \ |
| 739 |
PIN_MODE_INPUT(GPIOD_PIN14) | \ |
| 740 |
PIN_MODE_INPUT(GPIOD_PIN15)) |
| 741 |
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
| 742 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ |
| 743 |
PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N) | \ |
| 744 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ |
| 745 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ |
| 746 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ |
| 747 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ |
| 748 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ |
| 749 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ |
| 750 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ |
| 751 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ |
| 752 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ |
| 753 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ |
| 754 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ |
| 755 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ |
| 756 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) |
| 757 |
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOD_PIN0) | \
|
| 758 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN1) | \ |
| 759 |
PIN_OSPEED_VERYHIGH(GPIOD_CHARGE_EN2_N) | \ |
| 760 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN3) | \ |
| 761 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN4) | \ |
| 762 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN5) | \ |
| 763 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN6) | \ |
| 764 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN7) | \ |
| 765 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN8) | \ |
| 766 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN9) | \ |
| 767 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN10) | \ |
| 768 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN11) | \ |
| 769 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN12) | \ |
| 770 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN13) | \ |
| 771 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN14) | \ |
| 772 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN15)) |
| 773 |
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
| 774 |
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ |
| 775 |
PIN_PUPDR_FLOATING(GPIOD_CHARGE_EN2_N) | \ |
| 776 |
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ |
| 777 |
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ |
| 778 |
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ |
| 779 |
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ |
| 780 |
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ |
| 781 |
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ |
| 782 |
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ |
| 783 |
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ |
| 784 |
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ |
| 785 |
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ |
| 786 |
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ |
| 787 |
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ |
| 788 |
PIN_PUPDR_PULLUP(GPIOD_PIN15)) |
| 789 |
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
| 790 |
PIN_ODR_HIGH(GPIOD_PIN1) | \ |
| 791 |
PIN_ODR_HIGH(GPIOD_CHARGE_EN2_N) | \ |
| 792 |
PIN_ODR_HIGH(GPIOD_PIN3) | \ |
| 793 |
PIN_ODR_HIGH(GPIOD_PIN4) | \ |
| 794 |
PIN_ODR_HIGH(GPIOD_PIN5) | \ |
| 795 |
PIN_ODR_HIGH(GPIOD_PIN6) | \ |
| 796 |
PIN_ODR_HIGH(GPIOD_PIN7) | \ |
| 797 |
PIN_ODR_HIGH(GPIOD_PIN8) | \ |
| 798 |
PIN_ODR_HIGH(GPIOD_PIN9) | \ |
| 799 |
PIN_ODR_HIGH(GPIOD_PIN10) | \ |
| 800 |
PIN_ODR_HIGH(GPIOD_PIN11) | \ |
| 801 |
PIN_ODR_HIGH(GPIOD_PIN12) | \ |
| 802 |
PIN_ODR_HIGH(GPIOD_PIN13) | \ |
| 803 |
PIN_ODR_HIGH(GPIOD_PIN14) | \ |
| 804 |
PIN_ODR_HIGH(GPIOD_PIN15)) |
| 805 |
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, STM32F4xx_AF_system) | \
|
| 806 |
PIN_AFIO_AF(GPIOD_PIN1, STM32F4xx_AF_system) | \ |
| 807 |
PIN_AFIO_AF(GPIOD_CHARGE_EN2_N, STM32F4xx_AF_system) | \ |
| 808 |
PIN_AFIO_AF(GPIOD_PIN3, STM32F4xx_AF_system) | \ |
| 809 |
PIN_AFIO_AF(GPIOD_PIN4, STM32F4xx_AF_system) | \ |
| 810 |
PIN_AFIO_AF(GPIOD_PIN5, STM32F4xx_AF_system) | \ |
| 811 |
PIN_AFIO_AF(GPIOD_PIN6, STM32F4xx_AF_system) | \ |
| 812 |
PIN_AFIO_AF(GPIOD_PIN7, STM32F4xx_AF_system)) |
| 813 |
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, STM32F4xx_AF_system) | \
|
| 814 |
PIN_AFIO_AF(GPIOD_PIN9, STM32F4xx_AF_system) | \ |
| 815 |
PIN_AFIO_AF(GPIOD_PIN10, STM32F4xx_AF_system) | \ |
| 816 |
PIN_AFIO_AF(GPIOD_PIN11, STM32F4xx_AF_system) | \ |
| 817 |
PIN_AFIO_AF(GPIOD_PIN12, STM32F4xx_AF_system) | \ |
| 818 |
PIN_AFIO_AF(GPIOD_PIN13, STM32F4xx_AF_system) | \ |
| 819 |
PIN_AFIO_AF(GPIOD_PIN14, STM32F4xx_AF_system) | \ |
| 820 |
PIN_AFIO_AF(GPIOD_PIN15, STM32F4xx_AF_system)) |
| 821 |
|
| 822 |
/*
|
| 823 |
* GPIOE setup:
|
| 824 |
*
|
| 825 |
* PE0 - PIN0 (input floating)
|
| 826 |
* PE1 - PIN1 (input floating)
|
| 827 |
* PE2 - PIN2 (input floating)
|
| 828 |
* PE3 - PIN3 (input floating)
|
| 829 |
* PE4 - PIN4 (input floating)
|
| 830 |
* PE5 - PIN5 (input floating)
|
| 831 |
* PE6 - PIN6 (input floating)
|
| 832 |
* PE7 - PIN7 (input floating)
|
| 833 |
* PE8 - PIN8 (input floating)
|
| 834 |
* PE9 - PIN9 (input floating)
|
| 835 |
* PE10 - PIN10 (input floating)
|
| 836 |
* PE11 - PIN11 (input floating)
|
| 837 |
* PE12 - PIN12 (input floating)
|
| 838 |
* PE13 - PIN13 (input floating)
|
| 839 |
* PE14 - PIN14 (input floating)
|
| 840 |
* PE15 - PIN15 (input floating)
|
| 841 |
*/
|
| 842 |
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
| 843 |
PIN_MODE_INPUT(GPIOE_PIN1) | \ |
| 844 |
PIN_MODE_INPUT(GPIOE_PIN2) | \ |
| 845 |
PIN_MODE_INPUT(GPIOE_PIN3) | \ |
| 846 |
PIN_MODE_INPUT(GPIOE_PIN4) | \ |
| 847 |
PIN_MODE_INPUT(GPIOE_PIN5) | \ |
| 848 |
PIN_MODE_INPUT(GPIOE_PIN6) | \ |
| 849 |
PIN_MODE_INPUT(GPIOE_PIN7) | \ |
| 850 |
PIN_MODE_INPUT(GPIOE_PIN8) | \ |
| 851 |
PIN_MODE_INPUT(GPIOE_PIN9) | \ |
| 852 |
PIN_MODE_INPUT(GPIOE_PIN10) | \ |
| 853 |
PIN_MODE_INPUT(GPIOE_PIN11) | \ |
| 854 |
PIN_MODE_INPUT(GPIOE_PIN12) | \ |
| 855 |
PIN_MODE_INPUT(GPIOE_PIN13) | \ |
| 856 |
PIN_MODE_INPUT(GPIOE_PIN14) | \ |
| 857 |
PIN_MODE_INPUT(GPIOE_PIN15)) |
| 858 |
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
|
| 859 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ |
| 860 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ |
| 861 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ |
| 862 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ |
| 863 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ |
| 864 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ |
| 865 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ |
| 866 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ |
| 867 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ |
| 868 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ |
| 869 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ |
| 870 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ |
| 871 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ |
| 872 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ |
| 873 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) |
| 874 |
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_LOW(GPIOE_PIN0) | \
|
| 875 |
PIN_OSPEED_LOW(GPIOE_PIN1) | \ |
| 876 |
PIN_OSPEED_LOW(GPIOE_PIN2) | \ |
| 877 |
PIN_OSPEED_LOW(GPIOE_PIN3) | \ |
| 878 |
PIN_OSPEED_LOW(GPIOE_PIN4) | \ |
| 879 |
PIN_OSPEED_LOW(GPIOE_PIN5) | \ |
| 880 |
PIN_OSPEED_LOW(GPIOE_PIN6) | \ |
| 881 |
PIN_OSPEED_LOW(GPIOE_PIN7) | \ |
| 882 |
PIN_OSPEED_LOW(GPIOE_PIN8) | \ |
| 883 |
PIN_OSPEED_LOW(GPIOE_PIN9) | \ |
| 884 |
PIN_OSPEED_LOW(GPIOE_PIN10) | \ |
| 885 |
PIN_OSPEED_LOW(GPIOE_PIN11) | \ |
| 886 |
PIN_OSPEED_LOW(GPIOE_PIN12) | \ |
| 887 |
PIN_OSPEED_LOW(GPIOE_PIN13) | \ |
| 888 |
PIN_OSPEED_LOW(GPIOE_PIN14) | \ |
| 889 |
PIN_OSPEED_LOW(GPIOE_PIN15)) |
| 890 |
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \
|
| 891 |
PIN_PUPDR_FLOATING(GPIOE_PIN1) | \ |
| 892 |
PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ |
| 893 |
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ |
| 894 |
PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ |
| 895 |
PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ |
| 896 |
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ |
| 897 |
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ |
| 898 |
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ |
| 899 |
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ |
| 900 |
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ |
| 901 |
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ |
| 902 |
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ |
| 903 |
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ |
| 904 |
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ |
| 905 |
PIN_PUPDR_FLOATING(GPIOE_PIN15)) |
| 906 |
#define VAL_GPIOE_ODR (PIN_ODR_LOW(GPIOE_PIN0) | \
|
| 907 |
PIN_ODR_LOW(GPIOE_PIN1) | \ |
| 908 |
PIN_ODR_LOW(GPIOE_PIN2) | \ |
| 909 |
PIN_ODR_LOW(GPIOE_PIN3) | \ |
| 910 |
PIN_ODR_LOW(GPIOE_PIN4) | \ |
| 911 |
PIN_ODR_LOW(GPIOE_PIN5) | \ |
| 912 |
PIN_ODR_LOW(GPIOE_PIN6) | \ |
| 913 |
PIN_ODR_LOW(GPIOE_PIN7) | \ |
| 914 |
PIN_ODR_LOW(GPIOE_PIN8) | \ |
| 915 |
PIN_ODR_LOW(GPIOE_PIN9) | \ |
| 916 |
PIN_ODR_LOW(GPIOE_PIN10) | \ |
| 917 |
PIN_ODR_LOW(GPIOE_PIN11) | \ |
| 918 |
PIN_ODR_LOW(GPIOE_PIN12) | \ |
| 919 |
PIN_ODR_LOW(GPIOE_PIN13) | \ |
| 920 |
PIN_ODR_LOW(GPIOE_PIN14) | \ |
| 921 |
PIN_ODR_LOW(GPIOE_PIN15)) |
| 922 |
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, STM32F4xx_AF_system) | \
|
| 923 |
PIN_AFIO_AF(GPIOE_PIN1, STM32F4xx_AF_system) | \ |
| 924 |
PIN_AFIO_AF(GPIOE_PIN2, STM32F4xx_AF_system) | \ |
| 925 |
PIN_AFIO_AF(GPIOE_PIN3, STM32F4xx_AF_system) | \ |
| 926 |
PIN_AFIO_AF(GPIOE_PIN4, STM32F4xx_AF_system) | \ |
| 927 |
PIN_AFIO_AF(GPIOE_PIN5, STM32F4xx_AF_system) | \ |
| 928 |
PIN_AFIO_AF(GPIOE_PIN6, STM32F4xx_AF_system) | \ |
| 929 |
PIN_AFIO_AF(GPIOE_PIN7, STM32F4xx_AF_system)) |
| 930 |
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, STM32F4xx_AF_system) | \
|
| 931 |
PIN_AFIO_AF(GPIOE_PIN9, STM32F4xx_AF_system) | \ |
| 932 |
PIN_AFIO_AF(GPIOE_PIN10, STM32F4xx_AF_system) | \ |
| 933 |
PIN_AFIO_AF(GPIOE_PIN11, STM32F4xx_AF_system) | \ |
| 934 |
PIN_AFIO_AF(GPIOE_PIN12, STM32F4xx_AF_system) | \ |
| 935 |
PIN_AFIO_AF(GPIOE_PIN13, STM32F4xx_AF_system) | \ |
| 936 |
PIN_AFIO_AF(GPIOE_PIN14, STM32F4xx_AF_system) | \ |
| 937 |
PIN_AFIO_AF(GPIOE_PIN15, STM32F4xx_AF_system)) |
| 938 |
|
| 939 |
/*
|
| 940 |
* GPIOF setup:
|
| 941 |
*
|
| 942 |
* PF0 - PIN0 (input floating)
|
| 943 |
* PF1 - PIN1 (input floating)
|
| 944 |
* PF2 - PIN2 (input floating)
|
| 945 |
* PF3 - PIN3 (input floating)
|
| 946 |
* PF4 - PIN4 (input floating)
|
| 947 |
* PF5 - PIN5 (input floating)
|
| 948 |
* PF6 - PIN6 (input floating)
|
| 949 |
* PF7 - PIN7 (input floating)
|
| 950 |
* PF8 - PIN8 (input floating)
|
| 951 |
* PF9 - PIN9 (input floating)
|
| 952 |
* PF10 - PIN10 (input floating)
|
| 953 |
* PF11 - PIN11 (input floating)
|
| 954 |
* PF12 - PIN12 (input floating)
|
| 955 |
* PF13 - PIN13 (input floating)
|
| 956 |
* PF14 - PIN14 (input floating)
|
| 957 |
* PF15 - PIN15 (input floating)
|
| 958 |
*/
|
| 959 |
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \
|
| 960 |
PIN_MODE_INPUT(GPIOF_PIN1) | \ |
| 961 |
PIN_MODE_INPUT(GPIOF_PIN2) | \ |
| 962 |
PIN_MODE_INPUT(GPIOF_PIN3) | \ |
| 963 |
PIN_MODE_INPUT(GPIOF_PIN4) | \ |
| 964 |
PIN_MODE_INPUT(GPIOF_PIN5) | \ |
| 965 |
PIN_MODE_INPUT(GPIOF_PIN6) | \ |
| 966 |
PIN_MODE_INPUT(GPIOF_PIN7) | \ |
| 967 |
PIN_MODE_INPUT(GPIOF_PIN8) | \ |
| 968 |
PIN_MODE_INPUT(GPIOF_PIN9) | \ |
| 969 |
PIN_MODE_INPUT(GPIOF_PIN10) | \ |
| 970 |
PIN_MODE_INPUT(GPIOF_PIN11) | \ |
| 971 |
PIN_MODE_INPUT(GPIOF_PIN12) | \ |
| 972 |
PIN_MODE_INPUT(GPIOF_PIN13) | \ |
| 973 |
PIN_MODE_INPUT(GPIOF_PIN14) | \ |
| 974 |
PIN_MODE_INPUT(GPIOF_PIN15)) |
| 975 |
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
|
| 976 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ |
| 977 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ |
| 978 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ |
| 979 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ |
| 980 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ |
| 981 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ |
| 982 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ |
| 983 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ |
| 984 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ |
| 985 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ |
| 986 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ |
| 987 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ |
| 988 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ |
| 989 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ |
| 990 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) |
| 991 |
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_LOW(GPIOF_PIN0) | \
|
| 992 |
PIN_OSPEED_LOW(GPIOF_PIN1) | \ |
| 993 |
PIN_OSPEED_LOW(GPIOF_PIN2) | \ |
| 994 |
PIN_OSPEED_LOW(GPIOF_PIN3) | \ |
| 995 |
PIN_OSPEED_LOW(GPIOF_PIN4) | \ |
| 996 |
PIN_OSPEED_LOW(GPIOF_PIN5) | \ |
| 997 |
PIN_OSPEED_LOW(GPIOF_PIN6) | \ |
| 998 |
PIN_OSPEED_LOW(GPIOF_PIN7) | \ |
| 999 |
PIN_OSPEED_LOW(GPIOF_PIN8) | \ |
| 1000 |
PIN_OSPEED_LOW(GPIOF_PIN9) | \ |
| 1001 |
PIN_OSPEED_LOW(GPIOF_PIN10) | \ |
| 1002 |
PIN_OSPEED_LOW(GPIOF_PIN11) | \ |
| 1003 |
PIN_OSPEED_LOW(GPIOF_PIN12) | \ |
| 1004 |
PIN_OSPEED_LOW(GPIOF_PIN13) | \ |
| 1005 |
PIN_OSPEED_LOW(GPIOF_PIN14) | \ |
| 1006 |
PIN_OSPEED_LOW(GPIOF_PIN15)) |
| 1007 |
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \
|
| 1008 |
PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ |
| 1009 |
PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ |
| 1010 |
PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ |
| 1011 |
PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ |
| 1012 |
PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ |
| 1013 |
PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ |
| 1014 |
PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ |
| 1015 |
PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ |
| 1016 |
PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ |
| 1017 |
PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ |
| 1018 |
PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ |
| 1019 |
PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ |
| 1020 |
PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ |
| 1021 |
PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ |
| 1022 |
PIN_PUPDR_FLOATING(GPIOF_PIN15)) |
| 1023 |
#define VAL_GPIOF_ODR (PIN_ODR_LOW(GPIOF_PIN0) | \
|
| 1024 |
PIN_ODR_LOW(GPIOF_PIN1) | \ |
| 1025 |
PIN_ODR_LOW(GPIOF_PIN2) | \ |
| 1026 |
PIN_ODR_LOW(GPIOF_PIN3) | \ |
| 1027 |
PIN_ODR_LOW(GPIOF_PIN4) | \ |
| 1028 |
PIN_ODR_LOW(GPIOF_PIN5) | \ |
| 1029 |
PIN_ODR_LOW(GPIOF_PIN6) | \ |
| 1030 |
PIN_ODR_LOW(GPIOF_PIN7) | \ |
| 1031 |
PIN_ODR_LOW(GPIOF_PIN8) | \ |
| 1032 |
PIN_ODR_LOW(GPIOF_PIN9) | \ |
| 1033 |
PIN_ODR_LOW(GPIOF_PIN10) | \ |
| 1034 |
PIN_ODR_LOW(GPIOF_PIN11) | \ |
| 1035 |
PIN_ODR_LOW(GPIOF_PIN12) | \ |
| 1036 |
PIN_ODR_LOW(GPIOF_PIN13) | \ |
| 1037 |
PIN_ODR_LOW(GPIOF_PIN14) | \ |
| 1038 |
PIN_ODR_LOW(GPIOF_PIN15)) |
| 1039 |
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, STM32F4xx_AF_system) | \
|
| 1040 |
PIN_AFIO_AF(GPIOF_PIN1, STM32F4xx_AF_system) | \ |
| 1041 |
PIN_AFIO_AF(GPIOF_PIN2, STM32F4xx_AF_system) | \ |
| 1042 |
PIN_AFIO_AF(GPIOF_PIN3, STM32F4xx_AF_system) | \ |
| 1043 |
PIN_AFIO_AF(GPIOF_PIN4, STM32F4xx_AF_system) | \ |
| 1044 |
PIN_AFIO_AF(GPIOF_PIN5, STM32F4xx_AF_system) | \ |
| 1045 |
PIN_AFIO_AF(GPIOF_PIN6, STM32F4xx_AF_system) | \ |
| 1046 |
PIN_AFIO_AF(GPIOF_PIN7, STM32F4xx_AF_system)) |
| 1047 |
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, STM32F4xx_AF_system) | \
|
| 1048 |
PIN_AFIO_AF(GPIOF_PIN9, STM32F4xx_AF_system) | \ |
| 1049 |
PIN_AFIO_AF(GPIOF_PIN10, STM32F4xx_AF_system) | \ |
| 1050 |
PIN_AFIO_AF(GPIOF_PIN11, STM32F4xx_AF_system) | \ |
| 1051 |
PIN_AFIO_AF(GPIOF_PIN12, STM32F4xx_AF_system) | \ |
| 1052 |
PIN_AFIO_AF(GPIOF_PIN13, STM32F4xx_AF_system) | \ |
| 1053 |
PIN_AFIO_AF(GPIOF_PIN14, STM32F4xx_AF_system) | \ |
| 1054 |
PIN_AFIO_AF(GPIOF_PIN15, STM32F4xx_AF_system)) |
| 1055 |
|
| 1056 |
/*
|
| 1057 |
* GPIOG setup:
|
| 1058 |
*
|
| 1059 |
* PG0 - PIN0 (input floating)
|
| 1060 |
* PG1 - PIN1 (input floating)
|
| 1061 |
* PG2 - PIN2 (input floating)
|
| 1062 |
* PG3 - PIN3 (input floating)
|
| 1063 |
* PG4 - PIN4 (input floating)
|
| 1064 |
* PG5 - PIN5 (input floating)
|
| 1065 |
* PG6 - PIN6 (input floating)
|
| 1066 |
* PG7 - PIN7 (input floating)
|
| 1067 |
* PG8 - PIN8 (input floating)
|
| 1068 |
* PG9 - PIN9 (input floating)
|
| 1069 |
* PG10 - PIN10 (input floating)
|
| 1070 |
* PG11 - PIN11 (input floating)
|
| 1071 |
* PG12 - PIN12 (input floating)
|
| 1072 |
* PG13 - PIN13 (input floating)
|
| 1073 |
* PG14 - PIN14 (input floating)
|
| 1074 |
* PG15 - PIN15 (input floating)
|
| 1075 |
*/
|
| 1076 |
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
|
| 1077 |
PIN_MODE_INPUT(GPIOG_PIN1) | \ |
| 1078 |
PIN_MODE_INPUT(GPIOG_PIN2) | \ |
| 1079 |
PIN_MODE_INPUT(GPIOG_PIN3) | \ |
| 1080 |
PIN_MODE_INPUT(GPIOG_PIN4) | \ |
| 1081 |
PIN_MODE_INPUT(GPIOG_PIN5) | \ |
| 1082 |
PIN_MODE_INPUT(GPIOG_PIN6) | \ |
| 1083 |
PIN_MODE_INPUT(GPIOG_PIN7) | \ |
| 1084 |
PIN_MODE_INPUT(GPIOG_PIN8) | \ |
| 1085 |
PIN_MODE_INPUT(GPIOG_PIN9) | \ |
| 1086 |
PIN_MODE_INPUT(GPIOG_PIN10) | \ |
| 1087 |
PIN_MODE_INPUT(GPIOG_PIN11) | \ |
| 1088 |
PIN_MODE_INPUT(GPIOG_PIN12) | \ |
| 1089 |
PIN_MODE_INPUT(GPIOG_PIN13) | \ |
| 1090 |
PIN_MODE_INPUT(GPIOG_PIN14) | \ |
| 1091 |
PIN_MODE_INPUT(GPIOG_PIN15)) |
| 1092 |
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
|
| 1093 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ |
| 1094 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ |
| 1095 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ |
| 1096 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ |
| 1097 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ |
| 1098 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ |
| 1099 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ |
| 1100 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ |
| 1101 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ |
| 1102 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ |
| 1103 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ |
| 1104 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ |
| 1105 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ |
| 1106 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ |
| 1107 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) |
| 1108 |
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_LOW(GPIOG_PIN0) | \
|
| 1109 |
PIN_OSPEED_LOW(GPIOG_PIN1) | \ |
| 1110 |
PIN_OSPEED_LOW(GPIOG_PIN2) | \ |
| 1111 |
PIN_OSPEED_LOW(GPIOG_PIN3) | \ |
| 1112 |
PIN_OSPEED_LOW(GPIOG_PIN4) | \ |
| 1113 |
PIN_OSPEED_LOW(GPIOG_PIN5) | \ |
| 1114 |
PIN_OSPEED_LOW(GPIOG_PIN6) | \ |
| 1115 |
PIN_OSPEED_LOW(GPIOG_PIN7) | \ |
| 1116 |
PIN_OSPEED_LOW(GPIOG_PIN8) | \ |
| 1117 |
PIN_OSPEED_LOW(GPIOG_PIN9) | \ |
| 1118 |
PIN_OSPEED_LOW(GPIOG_PIN10) | \ |
| 1119 |
PIN_OSPEED_LOW(GPIOG_PIN11) | \ |
| 1120 |
PIN_OSPEED_LOW(GPIOG_PIN12) | \ |
| 1121 |
PIN_OSPEED_LOW(GPIOG_PIN13) | \ |
| 1122 |
PIN_OSPEED_LOW(GPIOG_PIN14) | \ |
| 1123 |
PIN_OSPEED_LOW(GPIOG_PIN15)) |
| 1124 |
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
|
| 1125 |
PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ |
| 1126 |
PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ |
| 1127 |
PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ |
| 1128 |
PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ |
| 1129 |
PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ |
| 1130 |
PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ |
| 1131 |
PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ |
| 1132 |
PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ |
| 1133 |
PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ |
| 1134 |
PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ |
| 1135 |
PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ |
| 1136 |
PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ |
| 1137 |
PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ |
| 1138 |
PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ |
| 1139 |
PIN_PUPDR_FLOATING(GPIOG_PIN15)) |
| 1140 |
#define VAL_GPIOG_ODR (PIN_ODR_LOW(GPIOG_PIN0) | \
|
| 1141 |
PIN_ODR_LOW(GPIOG_PIN1) | \ |
| 1142 |
PIN_ODR_LOW(GPIOG_PIN2) | \ |
| 1143 |
PIN_ODR_LOW(GPIOG_PIN3) | \ |
| 1144 |
PIN_ODR_LOW(GPIOG_PIN4) | \ |
| 1145 |
PIN_ODR_LOW(GPIOG_PIN5) | \ |
| 1146 |
PIN_ODR_LOW(GPIOG_PIN6) | \ |
| 1147 |
PIN_ODR_LOW(GPIOG_PIN7) | \ |
| 1148 |
PIN_ODR_LOW(GPIOG_PIN8) | \ |
| 1149 |
PIN_ODR_LOW(GPIOG_PIN9) | \ |
| 1150 |
PIN_ODR_LOW(GPIOG_PIN10) | \ |
| 1151 |
PIN_ODR_LOW(GPIOG_PIN11) | \ |
| 1152 |
PIN_ODR_LOW(GPIOG_PIN12) | \ |
| 1153 |
PIN_ODR_LOW(GPIOG_PIN13) | \ |
| 1154 |
PIN_ODR_LOW(GPIOG_PIN14) | \ |
| 1155 |
PIN_ODR_LOW(GPIOG_PIN15)) |
| 1156 |
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, STM32F4xx_AF_system) | \
|
| 1157 |
PIN_AFIO_AF(GPIOG_PIN1, STM32F4xx_AF_system) | \ |
| 1158 |
PIN_AFIO_AF(GPIOG_PIN2, STM32F4xx_AF_system) | \ |
| 1159 |
PIN_AFIO_AF(GPIOG_PIN3, STM32F4xx_AF_system) | \ |
| 1160 |
PIN_AFIO_AF(GPIOG_PIN4, STM32F4xx_AF_system) | \ |
| 1161 |
PIN_AFIO_AF(GPIOG_PIN5, STM32F4xx_AF_system) | \ |
| 1162 |
PIN_AFIO_AF(GPIOG_PIN6, STM32F4xx_AF_system) | \ |
| 1163 |
PIN_AFIO_AF(GPIOG_PIN7, STM32F4xx_AF_system)) |
| 1164 |
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, STM32F4xx_AF_system) | \
|
| 1165 |
PIN_AFIO_AF(GPIOG_PIN9, STM32F4xx_AF_system) | \ |
| 1166 |
PIN_AFIO_AF(GPIOG_PIN10, STM32F4xx_AF_system) | \ |
| 1167 |
PIN_AFIO_AF(GPIOG_PIN11, STM32F4xx_AF_system) | \ |
| 1168 |
PIN_AFIO_AF(GPIOG_PIN12, STM32F4xx_AF_system) | \ |
| 1169 |
PIN_AFIO_AF(GPIOG_PIN13, STM32F4xx_AF_system) | \ |
| 1170 |
PIN_AFIO_AF(GPIOG_PIN14, STM32F4xx_AF_system) | \ |
| 1171 |
PIN_AFIO_AF(GPIOG_PIN15, STM32F4xx_AF_system)) |
| 1172 |
|
| 1173 |
/*
|
| 1174 |
* GPIOH setup:
|
| 1175 |
*
|
| 1176 |
* PH0 - OSC_IN (input floating)
|
| 1177 |
* PH1 - OSC_OUT (input floating)
|
| 1178 |
* PH2 - PIN2 (input floating)
|
| 1179 |
* PH3 - PIN3 (input floating)
|
| 1180 |
* PH4 - PIN4 (input floating)
|
| 1181 |
* PH5 - PIN5 (input floating)
|
| 1182 |
* PH6 - PIN6 (input floating)
|
| 1183 |
* PH7 - PIN7 (input floating)
|
| 1184 |
* PH8 - PIN8 (input floating)
|
| 1185 |
* PH9 - PIN9 (input floating)
|
| 1186 |
* PH10 - PIN10 (input floating)
|
| 1187 |
* PH11 - PIN11 (input floating)
|
| 1188 |
* PH12 - PIN12 (input floating)
|
| 1189 |
* PH13 - PIN13 (input floating)
|
| 1190 |
* PH14 - PIN14 (input floating)
|
| 1191 |
* PH15 - PIN15 (input floating)
|
| 1192 |
*/
|
| 1193 |
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
|
| 1194 |
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ |
| 1195 |
PIN_MODE_INPUT(GPIOH_PIN2) | \ |
| 1196 |
PIN_MODE_INPUT(GPIOH_PIN3) | \ |
| 1197 |
PIN_MODE_INPUT(GPIOH_PIN4) | \ |
| 1198 |
PIN_MODE_INPUT(GPIOH_PIN5) | \ |
| 1199 |
PIN_MODE_INPUT(GPIOH_PIN6) | \ |
| 1200 |
PIN_MODE_INPUT(GPIOH_PIN7) | \ |
| 1201 |
PIN_MODE_INPUT(GPIOH_PIN8) | \ |
| 1202 |
PIN_MODE_INPUT(GPIOH_PIN9) | \ |
| 1203 |
PIN_MODE_INPUT(GPIOH_PIN10) | \ |
| 1204 |
PIN_MODE_INPUT(GPIOH_PIN11) | \ |
| 1205 |
PIN_MODE_INPUT(GPIOH_PIN12) | \ |
| 1206 |
PIN_MODE_INPUT(GPIOH_PIN13) | \ |
| 1207 |
PIN_MODE_INPUT(GPIOH_PIN14) | \ |
| 1208 |
PIN_MODE_INPUT(GPIOH_PIN15)) |
| 1209 |
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
|
| 1210 |
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ |
| 1211 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ |
| 1212 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ |
| 1213 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ |
| 1214 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ |
| 1215 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ |
| 1216 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ |
| 1217 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ |
| 1218 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ |
| 1219 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ |
| 1220 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ |
| 1221 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ |
| 1222 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ |
| 1223 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ |
| 1224 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) |
| 1225 |
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOH_OSC_IN) | \
|
| 1226 |
PIN_OSPEED_VERYHIGH(GPIOH_OSC_OUT) | \ |
| 1227 |
PIN_OSPEED_LOW(GPIOH_PIN2) | \ |
| 1228 |
PIN_OSPEED_LOW(GPIOH_PIN3) | \ |
| 1229 |
PIN_OSPEED_LOW(GPIOH_PIN4) | \ |
| 1230 |
PIN_OSPEED_LOW(GPIOH_PIN5) | \ |
| 1231 |
PIN_OSPEED_LOW(GPIOH_PIN6) | \ |
| 1232 |
PIN_OSPEED_LOW(GPIOH_PIN7) | \ |
| 1233 |
PIN_OSPEED_LOW(GPIOH_PIN8) | \ |
| 1234 |
PIN_OSPEED_LOW(GPIOH_PIN9) | \ |
| 1235 |
PIN_OSPEED_LOW(GPIOH_PIN10) | \ |
| 1236 |
PIN_OSPEED_LOW(GPIOH_PIN11) | \ |
| 1237 |
PIN_OSPEED_LOW(GPIOH_PIN12) | \ |
| 1238 |
PIN_OSPEED_LOW(GPIOH_PIN13) | \ |
| 1239 |
PIN_OSPEED_LOW(GPIOH_PIN14) | \ |
| 1240 |
PIN_OSPEED_LOW(GPIOH_PIN15)) |
| 1241 |
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
| 1242 |
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ |
| 1243 |
PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ |
| 1244 |
PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ |
| 1245 |
PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ |
| 1246 |
PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ |
| 1247 |
PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ |
| 1248 |
PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ |
| 1249 |
PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ |
| 1250 |
PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ |
| 1251 |
PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ |
| 1252 |
PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ |
| 1253 |
PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ |
| 1254 |
PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ |
| 1255 |
PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ |
| 1256 |
PIN_PUPDR_FLOATING(GPIOH_PIN15)) |
| 1257 |
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
| 1258 |
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ |
| 1259 |
PIN_ODR_HIGH(GPIOH_PIN2) | \ |
| 1260 |
PIN_ODR_HIGH(GPIOH_PIN3) | \ |
| 1261 |
PIN_ODR_HIGH(GPIOH_PIN4) | \ |
| 1262 |
PIN_ODR_HIGH(GPIOH_PIN5) | \ |
| 1263 |
PIN_ODR_HIGH(GPIOH_PIN6) | \ |
| 1264 |
PIN_ODR_HIGH(GPIOH_PIN7) | \ |
| 1265 |
PIN_ODR_HIGH(GPIOH_PIN8) | \ |
| 1266 |
PIN_ODR_HIGH(GPIOH_PIN9) | \ |
| 1267 |
PIN_ODR_HIGH(GPIOH_PIN10) | \ |
| 1268 |
PIN_ODR_HIGH(GPIOH_PIN11) | \ |
| 1269 |
PIN_ODR_HIGH(GPIOH_PIN12) | \ |
| 1270 |
PIN_ODR_HIGH(GPIOH_PIN13) | \ |
| 1271 |
PIN_ODR_HIGH(GPIOH_PIN14) | \ |
| 1272 |
PIN_ODR_HIGH(GPIOH_PIN15)) |
| 1273 |
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, STM32F4xx_AF_system) | \
|
| 1274 |
PIN_AFIO_AF(GPIOH_OSC_OUT, STM32F4xx_AF_system) | \ |
| 1275 |
PIN_AFIO_AF(GPIOH_PIN2, STM32F4xx_AF_system) | \ |
| 1276 |
PIN_AFIO_AF(GPIOH_PIN3, STM32F4xx_AF_system) | \ |
| 1277 |
PIN_AFIO_AF(GPIOH_PIN4, STM32F4xx_AF_system) | \ |
| 1278 |
PIN_AFIO_AF(GPIOH_PIN5, STM32F4xx_AF_system) | \ |
| 1279 |
PIN_AFIO_AF(GPIOH_PIN6, STM32F4xx_AF_system) | \ |
| 1280 |
PIN_AFIO_AF(GPIOH_PIN7, STM32F4xx_AF_system)) |
| 1281 |
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, STM32F4xx_AF_system) | \
|
| 1282 |
PIN_AFIO_AF(GPIOH_PIN9, STM32F4xx_AF_system) | \ |
| 1283 |
PIN_AFIO_AF(GPIOH_PIN10, STM32F4xx_AF_system) | \ |
| 1284 |
PIN_AFIO_AF(GPIOH_PIN11, STM32F4xx_AF_system) | \ |
| 1285 |
PIN_AFIO_AF(GPIOH_PIN12, STM32F4xx_AF_system) | \ |
| 1286 |
PIN_AFIO_AF(GPIOH_PIN13, STM32F4xx_AF_system) | \ |
| 1287 |
PIN_AFIO_AF(GPIOH_PIN14, STM32F4xx_AF_system) | \ |
| 1288 |
PIN_AFIO_AF(GPIOH_PIN15, STM32F4xx_AF_system)) |
| 1289 |
|
| 1290 |
/*
|
| 1291 |
* GPIOI setup:
|
| 1292 |
*
|
| 1293 |
* PI0 - PIN0 (input floating)
|
| 1294 |
* PI1 - PIN1 (input floating)
|
| 1295 |
* PI2 - PIN2 (input floating)
|
| 1296 |
* PI3 - PIN3 (input floating)
|
| 1297 |
* PI4 - PIN4 (input floating)
|
| 1298 |
* PI5 - PIN5 (input floating)
|
| 1299 |
* PI6 - PIN6 (input floating)
|
| 1300 |
* PI7 - PIN7 (input floating)
|
| 1301 |
* PI8 - PIN8 (input floating)
|
| 1302 |
* PI9 - PIN9 (input floating)
|
| 1303 |
* PI10 - PIN10 (input floating)
|
| 1304 |
* PI11 - PIN11 (input floating)
|
| 1305 |
* PI12 - PIN12 (input floating)
|
| 1306 |
* PI13 - PIN13 (input floating)
|
| 1307 |
* PI14 - PIN14 (input floating)
|
| 1308 |
* PI15 - PIN15 (input floating)
|
| 1309 |
*/
|
| 1310 |
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
|
| 1311 |
PIN_MODE_INPUT(GPIOI_PIN1) | \ |
| 1312 |
PIN_MODE_INPUT(GPIOI_PIN2) | \ |
| 1313 |
PIN_MODE_INPUT(GPIOI_PIN3) | \ |
| 1314 |
PIN_MODE_INPUT(GPIOI_PIN4) | \ |
| 1315 |
PIN_MODE_INPUT(GPIOI_PIN5) | \ |
| 1316 |
PIN_MODE_INPUT(GPIOI_PIN6) | \ |
| 1317 |
PIN_MODE_INPUT(GPIOI_PIN7) | \ |
| 1318 |
PIN_MODE_INPUT(GPIOI_PIN8) | \ |
| 1319 |
PIN_MODE_INPUT(GPIOI_PIN9) | \ |
| 1320 |
PIN_MODE_INPUT(GPIOI_PIN10) | \ |
| 1321 |
PIN_MODE_INPUT(GPIOI_PIN11) | \ |
| 1322 |
PIN_MODE_INPUT(GPIOI_PIN12) | \ |
| 1323 |
PIN_MODE_INPUT(GPIOI_PIN13) | \ |
| 1324 |
PIN_MODE_INPUT(GPIOI_PIN14) | \ |
| 1325 |
PIN_MODE_INPUT(GPIOI_PIN15)) |
| 1326 |
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
|
| 1327 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ |
| 1328 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ |
| 1329 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ |
| 1330 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ |
| 1331 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ |
| 1332 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ |
| 1333 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ |
| 1334 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ |
| 1335 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ |
| 1336 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ |
| 1337 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ |
| 1338 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ |
| 1339 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ |
| 1340 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ |
| 1341 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) |
| 1342 |
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_LOW(GPIOI_PIN0) | \
|
| 1343 |
PIN_OSPEED_LOW(GPIOI_PIN1) | \ |
| 1344 |
PIN_OSPEED_LOW(GPIOI_PIN2) | \ |
| 1345 |
PIN_OSPEED_LOW(GPIOI_PIN3) | \ |
| 1346 |
PIN_OSPEED_LOW(GPIOI_PIN4) | \ |
| 1347 |
PIN_OSPEED_LOW(GPIOI_PIN5) | \ |
| 1348 |
PIN_OSPEED_LOW(GPIOI_PIN6) | \ |
| 1349 |
PIN_OSPEED_LOW(GPIOI_PIN7) | \ |
| 1350 |
PIN_OSPEED_LOW(GPIOI_PIN8) | \ |
| 1351 |
PIN_OSPEED_LOW(GPIOI_PIN9) | \ |
| 1352 |
PIN_OSPEED_LOW(GPIOI_PIN10) | \ |
| 1353 |
PIN_OSPEED_LOW(GPIOI_PIN11) | \ |
| 1354 |
PIN_OSPEED_LOW(GPIOI_PIN12) | \ |
| 1355 |
PIN_OSPEED_LOW(GPIOI_PIN13) | \ |
| 1356 |
PIN_OSPEED_LOW(GPIOI_PIN14) | \ |
| 1357 |
PIN_OSPEED_LOW(GPIOI_PIN15)) |
| 1358 |
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \
|
| 1359 |
PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ |
| 1360 |
PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ |
| 1361 |
PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ |
| 1362 |
PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ |
| 1363 |
PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ |
| 1364 |
PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ |
| 1365 |
PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ |
| 1366 |
PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ |
| 1367 |
PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ |
| 1368 |
PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ |
| 1369 |
PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ |
| 1370 |
PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ |
| 1371 |
PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ |
| 1372 |
PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ |
| 1373 |
PIN_PUPDR_FLOATING(GPIOI_PIN15)) |
| 1374 |
#define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \
|
| 1375 |
PIN_ODR_LOW(GPIOI_PIN1) | \ |
| 1376 |
PIN_ODR_LOW(GPIOI_PIN2) | \ |
| 1377 |
PIN_ODR_LOW(GPIOI_PIN3) | \ |
| 1378 |
PIN_ODR_LOW(GPIOI_PIN4) | \ |
| 1379 |
PIN_ODR_LOW(GPIOI_PIN5) | \ |
| 1380 |
PIN_ODR_LOW(GPIOI_PIN6) | \ |
| 1381 |
PIN_ODR_LOW(GPIOI_PIN7) | \ |
| 1382 |
PIN_ODR_LOW(GPIOI_PIN8) | \ |
| 1383 |
PIN_ODR_LOW(GPIOI_PIN9) | \ |
| 1384 |
PIN_ODR_LOW(GPIOI_PIN10) | \ |
| 1385 |
PIN_ODR_LOW(GPIOI_PIN11) | \ |
| 1386 |
PIN_ODR_LOW(GPIOI_PIN12) | \ |
| 1387 |
PIN_ODR_LOW(GPIOI_PIN13) | \ |
| 1388 |
PIN_ODR_LOW(GPIOI_PIN14) | \ |
| 1389 |
PIN_ODR_LOW(GPIOI_PIN15)) |
| 1390 |
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, STM32F4xx_AF_system) | \
|
| 1391 |
PIN_AFIO_AF(GPIOI_PIN1, STM32F4xx_AF_system) | \ |
| 1392 |
PIN_AFIO_AF(GPIOI_PIN2, STM32F4xx_AF_system) | \ |
| 1393 |
PIN_AFIO_AF(GPIOI_PIN3, STM32F4xx_AF_system) | \ |
| 1394 |
PIN_AFIO_AF(GPIOI_PIN4, STM32F4xx_AF_system) | \ |
| 1395 |
PIN_AFIO_AF(GPIOI_PIN5, STM32F4xx_AF_system) | \ |
| 1396 |
PIN_AFIO_AF(GPIOI_PIN6, STM32F4xx_AF_system) | \ |
| 1397 |
PIN_AFIO_AF(GPIOI_PIN7, STM32F4xx_AF_system)) |
| 1398 |
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, STM32F4xx_AF_system) | \
|
| 1399 |
PIN_AFIO_AF(GPIOI_PIN9, STM32F4xx_AF_system) | \ |
| 1400 |
PIN_AFIO_AF(GPIOI_PIN10, STM32F4xx_AF_system) | \ |
| 1401 |
PIN_AFIO_AF(GPIOI_PIN11, STM32F4xx_AF_system) | \ |
| 1402 |
PIN_AFIO_AF(GPIOI_PIN12, STM32F4xx_AF_system) | \ |
| 1403 |
PIN_AFIO_AF(GPIOI_PIN13, STM32F4xx_AF_system) | \ |
| 1404 |
PIN_AFIO_AF(GPIOI_PIN14, STM32F4xx_AF_system) | \ |
| 1405 |
PIN_AFIO_AF(GPIOI_PIN15, STM32F4xx_AF_system)) |
| 1406 |
|
| 1407 |
/*===========================================================================*/
|
| 1408 |
/* External declarations. */
|
| 1409 |
/*===========================================================================*/
|
| 1410 |
|
| 1411 |
#if !defined(_FROM_ASM_)
|
| 1412 |
#ifdef __cplusplus
|
| 1413 |
extern "C" { |
| 1414 |
#endif
|
| 1415 |
void boardInit(void); |
| 1416 |
#ifdef __cplusplus
|
| 1417 |
} |
| 1418 |
#endif
|
| 1419 |
#endif /* _FROM_ASM_ */ |
| 1420 |
|
| 1421 |
#endif /* BOARD_H */ |
| 1422 |
|
| 1423 |
/** @} */
|