697 |
697 |
/* XTalkCompensationRangeMilliMeter */ 0,
|
698 |
698 |
/* XTalkCompensationRateMegaCps */ 0,
|
699 |
699 |
/* RangeOffsetMicroMeters */ 0,
|
700 |
|
/* !! LimitChecksEnable */ 0,
|
701 |
|
/* LimitChecksStatus */ 0,
|
|
700 |
/* !! LimitChecksEnable */ {0},
|
|
701 |
/* LimitChecksStatus */ {0},
|
|
702 |
/* LimitChecksValue */ {0},
|
702 |
703 |
/* !! WrapAroundCheckEnable */ 0,
|
703 |
704 |
|
704 |
705 |
},
|
... | ... | |
749 |
750 |
},
|
750 |
751 |
/* VL53L0X_SpadData_t */
|
751 |
752 |
{
|
752 |
|
/* RefSpadEnables */ 0,
|
753 |
|
/* RefGoodSpadMap */ 0,
|
|
753 |
/* RefSpadEnables */ {0},
|
|
754 |
/* RefGoodSpadMap */ {0},
|
754 |
755 |
|
755 |
756 |
},
|
756 |
757 |
/* SequenceConfig */ 0,
|
... | ... | |
802 |
803 |
/* XTalkCompensationRangeMilliMeter */ 0,
|
803 |
804 |
/* XTalkCompensationRateMegaCps */ 0,
|
804 |
805 |
/* RangeOffsetMicroMeters */ 0,
|
805 |
|
/* !! LimitChecksEnable */ 0,
|
806 |
|
/* LimitChecksStatus */ 0,
|
|
806 |
/* !! LimitChecksEnable */ {0},
|
|
807 |
/* LimitChecksStatus */ {0},
|
|
808 |
/* LimitChecksValue */ {0},
|
807 |
809 |
/* !! WrapAroundCheckEnable */ 0,
|
808 |
810 |
|
809 |
811 |
},
|
... | ... | |
822 |
824 |
},
|
823 |
825 |
/* VL53L0X_HistogramMeasurementData_t */
|
824 |
826 |
{
|
825 |
|
/* HistogramData */ 0,
|
|
827 |
/* HistogramData */ {0},
|
826 |
828 |
/* HistogramType */ 0,
|
827 |
829 |
/* FirstBin */ 0,
|
828 |
830 |
/* BufferSize */ 0,
|
... | ... | |
854 |
856 |
},
|
855 |
857 |
/* VL53L0X_SpadData_t */
|
856 |
858 |
{
|
857 |
|
/* RefSpadEnables */ 0,
|
858 |
|
/* RefGoodSpadMap */ 0,
|
|
859 |
/* RefSpadEnables */ {0},
|
|
860 |
/* RefGoodSpadMap */ {0},
|
859 |
861 |
|
860 |
862 |
},
|
861 |
863 |
/* SequenceConfig */ 0,
|
... | ... | |
1608 |
1610 |
mux1 = &moduleLldGpioExtender1;
|
1609 |
1611 |
mux2 = &moduleLldGpioExtender2;
|
1610 |
1612 |
|
1611 |
|
// set the XHUT Pins (P0_0 ... P0_7 P1_0 ... P1_3 ) from first GPIO-Extender to LOW (Pull-down)
|
1612 |
|
// first set Pull-up/pull-down enable register port to 1
|
1613 |
|
status = pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1614 |
|
// second set Pull-up/pull-down selection register for all XSHUT to pull-down (write a 0 in every bitmask)
|
1615 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1616 |
|
|
1617 |
|
|
1618 |
|
// first 4 register are XSHUT, last 4 are Interrupt, all need pull-up/pull-down
|
1619 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P1,0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1620 |
|
// XSHUT need pull-down and Interrupt need pull-up 11110000
|
1621 |
|
// 0xF0
|
1622 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1623 |
|
//set the interrupt register to input, write a 1 to configuration port registers (0Ch, 0Dh, 0Eh)
|
1624 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INPUT_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1625 |
1613 |
|
1626 |
|
// all Interrupt register need pull-up/pull-down
|
|
1614 |
/* 1.1
|
|
1615 |
set XSHUT as output(0) and GPIO/interrzpt as input(1)
|
|
1616 |
XSHUT are P0_0 ... P0_7 P1_0 ... P1_3
|
|
1617 |
intertupt are P1_4 ... P1_7 P2_0 ... P2_7
|
|
1618 |
*/
|
|
1619 |
//P0_0...P0_7: 0x00 == 00000000
|
|
1620 |
status = pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_CONFIGURATION_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1621 |
//P1_0...P1_7: 0xF0==11110000
|
|
1622 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_CONFIGURATION_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1623 |
//P2_0...P2_7: 0xFF==11111111
|
|
1624 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_CONFIGURATION_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1625 |
|
|
1626 |
/* 1.2
|
|
1627 |
to set all VL53L0X to standby, you must set the XSHUT to low through pull-down.A better way is to set for all a pull-up and write the value 0 (low) to
|
|
1628 |
Output port registers.
|
|
1629 |
Therefore you must active the pull-ups/pull-downs for all XSHUT anf GPIO pins.
|
|
1630 |
Set all XSHUT to low with a pull-down and all interrupts to high with a pull-up.
|
|
1631 |
*/
|
|
1632 |
|
|
1633 |
//activte pull-up/pull-down for all pins
|
|
1634 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1635 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P1, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1627 |
1636 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1628 |
|
// all interrupt register need Pull-up (set to 1)
|
1629 |
|
//0xFF == 11111111, we set all interrupt register to 00000000 == pull-down and only the register we need is pulled up
|
1630 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1631 |
|
//set the interrupt register to input, write a 1 to configuration port registers (0Ch, 0Dh, 0Eh)
|
1632 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INPUT_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1633 |
|
|
1634 |
|
// set the XHUT Pins (P0_0 ... P0_7 P1_0 ... P1_3 ) from second GPIO-Extender to LOW
|
1635 |
|
// same as first GPIO-Extender
|
|
1637 |
//set pins to pull-up(1) or pull-down(0)
|
|
1638 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1639 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1640 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1641 |
//set output ports to logical 0 to set VL53L0X to standby. If the port is an input port nothing happens.
|
|
1642 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1643 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P1, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1644 |
|
|
1645 |
|
|
1646 |
/* 2.1
|
|
1647 |
Configuration of the interrupt handling on GPIO Extander.
|
|
1648 |
The Interrupt pins are already set as Input (pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_CONFIGURATION_P1, 0xF0,...); for Pins P1_0...P1_7).
|
|
1649 |
To enable interrupts you must set the interrupt mask register to 0 for the GPIO pins (P1_4...P1_7 P2_0...P2_7).
|
|
1650 |
Set for unittest all pins to 1 and only enable the one used pin.
|
|
1651 |
*/
|
|
1652 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1653 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1654 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1655 |
|
|
1656 |
|
|
1657 |
/* 2.2
|
|
1658 |
Set the interrupt edge register (60h to 65h) after you set the interrupt mask register (we unset this a step before) to declare if a rising edge (01)
|
|
1659 |
or a falling edge (10) or other is an interrupt.
|
|
1660 |
The GPIO1 pin from the VL53L0X is low and goes high if an interrupt is detected, you must use 01 for the pins P1_4...P1_7 P2_0...P2_7.
|
|
1661 |
|
|
1662 |
*/
|
|
1663 |
//P1_4...P1_7: 0x55==01010101
|
|
1664 |
//status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1665 |
//P2_3...P2_0: 0x55==01010101
|
|
1666 |
//status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1667 |
//P2_4...P2_7: 0x55==01010101
|
|
1668 |
//status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1669 |
|
|
1670 |
/* 3
|
|
1671 |
Latch the input register (48h,49h,4Ah) enable and disable the input latch of the I/O pins. Write a 0 == not lachted and every read from the Input registers (00h,01h,02h)
|
|
1672 |
and every change from the VL53L0X will clear the interrupt. Write a 1 == lachted and only a read from the Input registers (00h,01h,02h) will clear the interrupt.
|
|
1673 |
Therefore it is not important what is set in step 2.1 and 2.2.
|
|
1674 |
*/
|
|
1675 |
//P1_7...P1_4 set to 1 and P1_3...P1_0 set to 0: 0xF0==11110000
|
|
1676 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INPUTLATCH_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1677 |
//P2_7...P2_0 set to 1: 0xFF==11111111
|
|
1678 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INPUTLATCH_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1679 |
|
|
1680 |
|
|
1681 |
|
|
1682 |
|
|
1683 |
// same as second GPIO-Extender
|
|
1684 |
// set input/output
|
|
1685 |
status = pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_CONFIGURATION_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1686 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_CONFIGURATION_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1687 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_CONFIGURATION_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1688 |
|
|
1689 |
//activte pull-up/pull-down for all pins
|
1636 |
1690 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDENABLE_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1637 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1638 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDENABLE_P1,0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1639 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1640 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INPUT_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1641 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDENABLE_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1642 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1643 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INPUT_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1691 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDENABLE_P1, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1692 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDENABLE_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1693 |
//set pins to pull-up(1) or pull-down(0)
|
|
1694 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1695 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1696 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1697 |
//set output ports to logical 0 to set VL53L0X to standby. If the port is an input port nothing happens.
|
|
1698 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1699 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P1, 0x00, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1700 |
//un enable all interrupts
|
|
1701 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P0, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1702 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1703 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1704 |
// set interrupt to latch
|
|
1705 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INPUTLATCH_P1, 0xF0, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1706 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INPUTLATCH_P2, 0xFF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1707 |
|
|
1708 |
|
1644 |
1709 |
|
1645 |
1710 |
|
1646 |
1711 |
|
... | ... | |
1661 |
1726 |
GP == GPIO Extender
|
1662 |
1727 |
*/
|
1663 |
1728 |
if (argc == 2) {
|
|
1729 |
|
|
1730 |
/* scheme to set VL53L0X with the GPIO Extender:
|
|
1731 |
* set bitmask for XSHUT, e.g. XSHUT at 0.3 => 00001000 == buffer[0] = 0x8;
|
|
1732 |
* find the corresponding interrupt pin, e.g. 0.3 with interrupt 1.7
|
|
1733 |
* 1.1 start the sensor, e.g for XSHUT at 0.3
|
|
1734 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1735 |
* 2.1 set the interrupt, e.g. for 1.7 == 011111111 == 0x7F
|
|
1736 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1737 |
* 2.2 set interrupt edge register, e.g. interrupt at 1.7
|
|
1738 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1739 |
*/
|
|
1740 |
|
|
1741 |
|
1664 |
1742 |
if (strcmp(argv[1], "#11") == 0) {
|
1665 |
1743 |
buffer[0] = 0x8; // == P1.3 => Interrupt 2.7
|
1666 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1667 |
|
// enable pull-up for the one used interrupt register
|
1668 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1669 |
|
// only one pin is set to 0 as interrupt mask register => M2.7 == 01111111
|
|
1744 |
//start the sensor
|
|
1745 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1746 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1747 |
// 011111111 == 0x7F
|
1670 |
1748 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1671 |
|
// interrupt edge register IE2.7 with falling edge (from HIGH to LOW) == 10 00 00 00on adress 64h
|
1672 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1749 |
// set interrupt edge register, see step 2.2
|
|
1750 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1751 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1752 |
|
1673 |
1753 |
|
1674 |
1754 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1675 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1755 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1676 |
1756 |
|
1677 |
1757 |
//set GPIO extender
|
1678 |
1758 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1679 |
1759 |
} else if (strcmp(argv[1], "#12") == 0) {
|
1680 |
1760 |
buffer[0] = 0x4; // PUD1.2 with interrupt P2_6
|
1681 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1682 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1683 |
|
// only one pin is set to 0 as interrupt mask register M2.6 == 0xBF == 10111111
|
|
1761 |
//start the sensor
|
|
1762 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1763 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1764 |
// 1011111111 == 0xBF
|
1684 |
1765 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1685 |
|
// interrupt edge register IE2.6 with falling edge (from HIGH to LOW) == 00100000
|
1686 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1766 |
// set interrupt edge register, see step 2.2
|
|
1767 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1768 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1769 |
|
1687 |
1770 |
|
1688 |
1771 |
|
1689 |
1772 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1690 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1773 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1691 |
1774 |
|
1692 |
1775 |
//set GPIO extender
|
1693 |
1776 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1694 |
1777 |
} else if (strcmp(argv[1], "#13") == 0) {
|
1695 |
1778 |
buffer[0] = 0x2; // PUD1.1 with Interrupt P2_5
|
1696 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1697 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1698 |
|
// only one pin is set to 0 as interrupt mask register M2.5 == 0xDF == 11011111
|
1699 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1700 |
|
// interrupt edge register IE2.5 with falling edge (from HIGH to LOW) == 0x8 == 00001000
|
1701 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1779 |
//start the sensor
|
|
1780 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1781 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1782 |
// 1101111111 == 0xDF == M2.5
|
|
1783 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xDF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1784 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_5, but the are ignored.
|
|
1785 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1702 |
1786 |
|
1703 |
1787 |
|
1704 |
1788 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1705 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1789 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1706 |
1790 |
//set GPIO extender
|
1707 |
1791 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1708 |
1792 |
} else if (strcmp(argv[1], "#14") == 0) {
|
1709 |
1793 |
buffer[0] = 0x1; // PUD1.0 with Interrupt P2_4
|
1710 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1711 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1712 |
|
// only one pin is set to 0 as interrupt mask register M2.4 == 0xEF == 11101111
|
|
1794 |
//start the sensor
|
|
1795 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1796 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1797 |
// 11101111 == 0xEF
|
1713 |
1798 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1714 |
|
// interrupt edge register IE2.4 with falling edge (from HIGH to LOW) == 0x8 == 00000010
|
1715 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1799 |
// set interrupt edge register, see step 2.2
|
|
1800 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1801 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1716 |
1802 |
|
1717 |
1803 |
|
1718 |
1804 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1719 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1805 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1720 |
1806 |
//set GPIO extender
|
1721 |
1807 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1722 |
1808 |
} else if (strcmp(argv[1], "#15") == 0) {
|
1723 |
1809 |
buffer[0] = 0x80; // PUD0.7 with interrupt P2.3
|
1724 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1725 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00001000
|
1726 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1727 |
|
// only one pin is set to 0 as interrupt mask register => M2.3 == 11110111
|
|
1810 |
//start the sensor
|
|
1811 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1812 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1813 |
// 11110111 == 0xF7
|
1728 |
1814 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xF7, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1729 |
|
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 10000000 on adress 64h
|
1730 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1731 |
|
|
|
1815 |
// set interrupt edge register, see step 2.2
|
|
1816 |
// P2_0...P2_3: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1817 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1732 |
1818 |
|
1733 |
1819 |
|
1734 |
1820 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1735 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1821 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1736 |
1822 |
//set GPIO extender
|
1737 |
1823 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1738 |
1824 |
} else if (strcmp(argv[1], "#16") == 0) {
|
1739 |
1825 |
buffer[0] = 0x40; // PUD0.6 with interrupt P2.2
|
1740 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1741 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00000100
|
1742 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x4, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1743 |
|
// only one pin is set to 0 as interrupt mask register => M2.2 == 11111011
|
|
1826 |
//start the sensor
|
|
1827 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1828 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1829 |
// 11111011 == 0xFB
|
1744 |
1830 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFB, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1745 |
|
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 00100000 on adress 64h
|
1746 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1831 |
// set interrupt edge register, see step 2.2
|
|
1832 |
// P2_0...P2_3: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1833 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1834 |
|
1747 |
1835 |
|
1748 |
1836 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1749 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1837 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1750 |
1838 |
//set GPIO extender
|
1751 |
1839 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1752 |
1840 |
} else if (strcmp(argv[1], "#17") == 0) {
|
1753 |
1841 |
buffer[0] = 0x20; // PUD0.5 wirh interrupt P2.1
|
1754 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1755 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00000010
|
1756 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1757 |
|
// only one pin is set to 0 as interrupt mask register => M2.1 == 11111101
|
|
1842 |
//start the sensor
|
|
1843 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1844 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1845 |
// 11111101 == 0xFD
|
1758 |
1846 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFD, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1759 |
|
// interrupt edge register IE2.1 with falling edge (from HIGH to LOW) == 00001000 on adress 64h
|
1760 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1847 |
// set interrupt edge register, see step 2.2
|
|
1848 |
// P2_0...P2_3: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1849 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1850 |
|
1761 |
1851 |
|
1762 |
1852 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1763 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1853 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1764 |
1854 |
//set GPIO extender
|
1765 |
1855 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1766 |
1856 |
} else if (strcmp(argv[1], "#18") == 0) {
|
1767 |
1857 |
buffer[0] = 0x10; // PUD0.4 with interrupt P2.0
|
1768 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1769 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00000001
|
1770 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x1, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1771 |
|
// only one pin is set to 0 as interrupt mask register => M2.0 == 11111110
|
|
1858 |
//start the sensor
|
|
1859 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1860 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1861 |
// 11111110 == 0xFE
|
1772 |
1862 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFE, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1773 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00000010 on adress 64h
|
1774 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1863 |
// set interrupt edge register, see step 2.2
|
|
1864 |
// P2_3...P2_0: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1865 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1775 |
1866 |
|
1776 |
1867 |
|
1777 |
1868 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1778 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1869 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1779 |
1870 |
//set GPIO extender
|
1780 |
1871 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1781 |
1872 |
} else if (strcmp(argv[1], "#19") == 0) {
|
1782 |
|
|
1783 |
1873 |
buffer[0] = 0x8; // PUD0.3 with interrupt P1_7
|
1784 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1785 |
|
// enable pull-up for the one used interrupt register (set to 1) == 10000000
|
1786 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1787 |
|
// only one pin is set to 0 as interrupt mask register => M1.7 == 01111111
|
|
1874 |
//start the sensor
|
|
1875 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1876 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1877 |
// 011111111 == 0x7F
|
1788 |
1878 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1789 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 10000000 on adress 63h
|
1790 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1879 |
// set interrupt edge register, see step 2.2
|
|
1880 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1881 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1791 |
1882 |
|
1792 |
1883 |
|
1793 |
1884 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1794 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1885 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1795 |
1886 |
//set GPIO extender
|
1796 |
1887 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1797 |
1888 |
} else if (strcmp(argv[1], "#110") == 0) {
|
1798 |
|
|
1799 |
1889 |
buffer[0] = 0x4; //PUD0.2 with interrupt P1_6
|
1800 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1801 |
|
// enable pull-up for the one used interrupt register (set to 1) == 01000000
|
1802 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x40, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1803 |
|
// only one pin is set to 0 as interrupt mask register => M1.6 == 10111111
|
|
1890 |
//start the sensor
|
|
1891 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1892 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1893 |
// 10111111 == 0xBF
|
1804 |
1894 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1805 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00100000 on adress 63h
|
1806 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1895 |
// set interrupt edge register, see step 2.2
|
|
1896 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1897 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1807 |
1898 |
|
1808 |
1899 |
|
1809 |
1900 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1810 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1901 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1811 |
1902 |
//set GPIO extender
|
1812 |
1903 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1813 |
1904 |
} else if (strcmp(argv[1], "#111") == 0) {
|
1814 |
1905 |
buffer[0] = 0x2; // PUD0.1 with interrupt P1_5
|
1815 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1816 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00100000
|
1817 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1818 |
|
// only one pin is set to 0 as interrupt mask register => M1.5 == 11011111
|
|
1906 |
//start the sensor
|
|
1907 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1908 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1909 |
// 11011111 == 0xDF
|
1819 |
1910 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xDF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1820 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00001000 on adress 63h
|
1821 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1822 |
|
|
|
1911 |
// set interrupt edge register, see step 2.2
|
|
1912 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1913 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1823 |
1914 |
|
1824 |
1915 |
|
1825 |
1916 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1826 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1917 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1827 |
1918 |
//set GPIO extender
|
1828 |
1919 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1829 |
1920 |
} else if (strcmp(argv[1], "#112") == 0) {
|
1830 |
|
|
1831 |
1921 |
buffer[0] = 0x1; // PUD0.0 with interrupt P1_4
|
1832 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1833 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00010000
|
1834 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1835 |
|
// only one pin is set to 0 as interrupt mask register => M1.4 == 11101111
|
|
1922 |
//start the sensor
|
|
1923 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1924 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1925 |
// 11101111 == 0xEF
|
1836 |
1926 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1837 |
|
// interrupt edge register IE1.4 with falling edge (from HIGH to LOW) == 00 00 00 10 on adress 63h
|
1838 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1927 |
// set interrupt edge register, see step 2.2
|
|
1928 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1929 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1930 |
|
1839 |
1931 |
|
1840 |
1932 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
1841 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
1933 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
1842 |
1934 |
//set GPIO extender
|
1843 |
1935 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|
1844 |
1936 |
|
1845 |
1937 |
} else if (strcmp(argv[1], "#21") == 0) {
|
1846 |
1938 |
buffer[0] = 0x8; // == P1.3 => Interrupt 2.7
|
1847 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1848 |
|
// enable pull-up for the one used interrupt register
|
1849 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1850 |
|
// only one pin is set to 0 as interrupt mask register => M2.7 == 01111111
|
|
1939 |
//start the sensor
|
|
1940 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1941 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1942 |
// 011111111 == 0x7F
|
1851 |
1943 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1852 |
|
// interrupt edge register IE2.7 with falling edge (from HIGH to LOW) == 10 00 00 00on adress 64h
|
1853 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1944 |
// set interrupt edge register, see step 2.2
|
|
1945 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1946 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1854 |
1947 |
|
1855 |
1948 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1856 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
1949 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1857 |
1950 |
//set GPIO extender
|
1858 |
1951 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1859 |
1952 |
} else if (strcmp(argv[1], "#22") == 0) {
|
1860 |
1953 |
buffer[0] = 0x4; // PUD1.2 with interrupt P2_6
|
1861 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1862 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1863 |
|
// only one pin is set to 0 as interrupt mask register M2.6 == 0xBF == 10111111
|
|
1954 |
//start the sensor
|
|
1955 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1956 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1957 |
// 1011111111 == 0xBF
|
1864 |
1958 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1865 |
|
// interrupt edge register IE2.6 with falling edge (from HIGH to LOW) == 00100000
|
1866 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1959 |
// set interrupt edge register, see step 2.2
|
|
1960 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1961 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1867 |
1962 |
|
1868 |
1963 |
|
1869 |
1964 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1870 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
1965 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1871 |
1966 |
//set GPIO extender
|
1872 |
1967 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1873 |
1968 |
|
1874 |
1969 |
} else if (strcmp(argv[1], "#23") == 0) {
|
1875 |
1970 |
buffer[0] = 0x2; // PUD1.1 with Interrupt P2_5
|
1876 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1877 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1878 |
|
// only one pin is set to 0 as interrupt mask register M2.5 == 0xDF == 11011111
|
1879 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1880 |
|
// interrupt edge register IE2.5 with falling edge (from HIGH to LOW) == 0x8 == 00001000
|
1881 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1882 |
|
|
|
1971 |
//start the sensor
|
|
1972 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1973 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1974 |
// 1101111111 == 0xDF == M2.5
|
|
1975 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xDF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1976 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_5, but the are ignored.
|
|
1977 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1883 |
1978 |
|
1884 |
1979 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1885 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
1980 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1886 |
1981 |
//set GPIO extender
|
1887 |
1982 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1888 |
1983 |
} else if (strcmp(argv[1], "#24") == 0) {
|
1889 |
1984 |
buffer[0] = 0x1; // PUD1.0 with Interrupt P2_4
|
1890 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1891 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1892 |
|
// only one pin is set to 0 as interrupt mask register M2.4 == 0xEF == 11101111
|
|
1985 |
//start the sensor
|
|
1986 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1987 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
1988 |
// 11101111 == 0xEF
|
1893 |
1989 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1894 |
|
// interrupt edge register IE2.4 with falling edge (from HIGH to LOW) == 0x8 == 00000010
|
1895 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
1990 |
// set interrupt edge register, see step 2.2
|
|
1991 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
1992 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1896 |
1993 |
|
1897 |
1994 |
|
1898 |
1995 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1899 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
1996 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1900 |
1997 |
//set GPIO extender
|
1901 |
1998 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1902 |
1999 |
} else if (strcmp(argv[1], "#25") == 0) {
|
1903 |
2000 |
buffer[0] = 0x80; // PUD0.7 with interrupt P2.3
|
1904 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1905 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00001000
|
1906 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1907 |
|
// only one pin is set to 0 as interrupt mask register => M2.3 == 11110111
|
|
2001 |
//start the sensor
|
|
2002 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2003 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2004 |
// 11110111 == 0xF7
|
1908 |
2005 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xF7, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1909 |
|
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 10000000 on adress 64h
|
1910 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2006 |
// set interrupt edge register, see step 2.2
|
|
2007 |
// P2_0...P2_3: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2008 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1911 |
2009 |
|
1912 |
2010 |
|
1913 |
2011 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1914 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2012 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1915 |
2013 |
//set GPIO extender
|
1916 |
2014 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1917 |
2015 |
} else if (strcmp(argv[1], "#26") == 0) {
|
1918 |
2016 |
buffer[0] = 0x40; // PUD0.6 with interrupt P2.2
|
1919 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1920 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00000100
|
1921 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x4, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1922 |
|
// only one pin is set to 0 as interrupt mask register => M2.2 == 11111011
|
|
2017 |
//start the sensor
|
|
2018 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2019 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2020 |
// 11111011 == 0xFB
|
1923 |
2021 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFB, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1924 |
|
// interrupt edge register IE2.2 with falling edge (from HIGH to LOW) == 00100000 on adress 64h
|
1925 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2022 |
// set interrupt edge register, see step 2.2
|
|
2023 |
// P2_0...P2_3: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2024 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1926 |
2025 |
|
1927 |
2026 |
|
1928 |
2027 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1929 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2028 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1930 |
2029 |
//set GPIO extender
|
1931 |
2030 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1932 |
2031 |
} else if (strcmp(argv[1], "#27") == 0) {
|
1933 |
2032 |
buffer[0] = 0x20; // PUD0.5 wirh interrupt P2.1
|
1934 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1935 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00000010
|
1936 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1937 |
|
// only one pin is set to 0 as interrupt mask register => M2.1 == 11111101
|
|
2033 |
//start the sensor
|
|
2034 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2035 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2036 |
// 11111101 == 0xFD
|
1938 |
2037 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFD, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1939 |
|
// interrupt edge register IE2.1 with falling edge (from HIGH to LOW) == 00001000 on adress 64h
|
1940 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1941 |
|
|
|
2038 |
// set interrupt edge register, see step 2.2
|
|
2039 |
// P2_0...P2_3: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2040 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1942 |
2041 |
|
1943 |
2042 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1944 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2043 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1945 |
2044 |
//set GPIO extender
|
1946 |
2045 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1947 |
2046 |
} else if (strcmp(argv[1], "#28") == 0) {
|
1948 |
2047 |
buffer[0] = 0x10; // PUD0.4 with interrupt P2.0
|
1949 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1950 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00000001
|
1951 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x1, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1952 |
|
// only one pin is set to 0 as interrupt mask register => M2.0 == 11111110
|
|
2048 |
//start the sensor
|
|
2049 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2050 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2051 |
// 11111110 == 0xFE
|
1953 |
2052 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0xFE, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1954 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00000010 on adress 64h
|
1955 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2053 |
// set interrupt edge register, see step 2.2
|
|
2054 |
// P2_3...P2_0: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2055 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2A, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1956 |
2056 |
|
1957 |
2057 |
|
1958 |
2058 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1959 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2059 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1960 |
2060 |
//set GPIO extender
|
1961 |
2061 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1962 |
2062 |
} else if (strcmp(argv[1], "#29") == 0) {
|
1963 |
|
|
1964 |
2063 |
buffer[0] = 0x8; // PUD0.3 with interrupt P1_7
|
1965 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1966 |
|
// enable pull-up for the one used interrupt register (set to 1) == 10000000
|
1967 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1968 |
|
// only one pin is set to 0 as interrupt mask register => M1.7 == 01111111
|
|
2064 |
//start the sensor
|
|
2065 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2066 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2067 |
// 011111111 == 0x7F
|
1969 |
2068 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1970 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 10000000 on adress 63h
|
1971 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2069 |
// set interrupt edge register, see step 2.2
|
|
2070 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2071 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1972 |
2072 |
|
1973 |
2073 |
|
1974 |
2074 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1975 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2075 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1976 |
2076 |
//set GPIO extender
|
1977 |
2077 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1978 |
2078 |
} else if (strcmp(argv[1], "#210") == 0) {
|
1979 |
|
|
1980 |
2079 |
buffer[0] = 0x4; //PUD0.2 with interrupt P1_6
|
1981 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1982 |
|
// enable pull-up for the one used interrupt register (set to 1) == 01000000
|
1983 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x40, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1984 |
|
// only one pin is set to 0 as interrupt mask register => M1.6 == 10111111
|
|
2080 |
//start the sensor
|
|
2081 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2082 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2083 |
// 10111111 == 0xBF
|
1985 |
2084 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xBF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1986 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00100000 on adress 63h
|
1987 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2085 |
// set interrupt edge register, see step 2.2
|
|
2086 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2087 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1988 |
2088 |
|
1989 |
2089 |
|
1990 |
2090 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
1991 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2091 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
1992 |
2092 |
//set GPIO extender
|
1993 |
2093 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
1994 |
2094 |
} else if (strcmp(argv[1], "#211") == 0) {
|
1995 |
2095 |
buffer[0] = 0x2; // PUD0.1 with interrupt P1_5
|
1996 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1997 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00100000
|
1998 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x20, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
1999 |
|
// only one pin is set to 0 as interrupt mask register => M1.5 == 11011111
|
|
2096 |
//start the sensor
|
|
2097 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2098 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2099 |
// 11011111 == 0xDF
|
2000 |
2100 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xDF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2001 |
|
// interrupt edge register IE1.5 with falling edge (from HIGH to LOW) == 00001000 on adress 63h
|
2002 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x8, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2101 |
// set interrupt edge register, see step 2.2
|
|
2102 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2103 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2003 |
2104 |
|
2004 |
2105 |
|
2005 |
2106 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
2006 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2107 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
2007 |
2108 |
//set GPIO extender
|
2008 |
2109 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
2009 |
2110 |
} else if (strcmp(argv[1], "#212") == 0) {
|
2010 |
|
|
2011 |
2111 |
buffer[0] = 0x1; // PUD0.0 with interrupt P1_4
|
2012 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2013 |
|
// enable pull-up for the one used interrupt register (set to 1) == 00010000
|
2014 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_PUPDSELECTION_P1, 0x10, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2015 |
|
// only one pin is set to 0 as interrupt mask register => M1.4 == 11101111
|
|
2112 |
//start the sensor
|
|
2113 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_OUTPUT_P0, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2114 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2115 |
// 11101111 == 0xEF
|
2016 |
2116 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTMASK_P1, 0xEF, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2017 |
|
// interrupt edge register IE1.4 with falling edge (from HIGH to LOW) == 00 00 00 10 on adress 63h
|
2018 |
|
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x2, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2019 |
|
|
|
2117 |
// set interrupt edge register, see step 2.2
|
|
2118 |
// P1_4...P1_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2119 |
status |= pcal6524_lld_write_reg(mux2, PCAL6524_LLD_CMD_INTERRUPTEDGE_P1B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2020 |
2120 |
|
2021 |
2121 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity2;
|
2022 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
|
2122 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
2023 |
2123 |
//set GPIO extender
|
2024 |
2124 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender2;
|
2025 |
|
} else{
|
|
2125 |
} else {
|
2026 |
2126 |
//use first sensor
|
2027 |
2127 |
chprintf(stream, "unknown argument, use first sensor\n");
|
2028 |
2128 |
usleep(2000000);
|
2029 |
2129 |
buffer[0] = 0x8; // == P1.3 => Interrupt 2.7
|
2030 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2031 |
|
// enable pull-up for the one used interrupt register
|
2032 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_PUPDSELECTION_P2, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2033 |
|
// only one pin is set to 0 as interrupt mask register => M2.7 == 01111111
|
|
2130 |
//start the sensor
|
|
2131 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_OUTPUT_P1, buffer[0], ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2132 |
//In step 2.1 the interrupt pins were unenabled, so enable the one necessary interrupt pin.
|
|
2133 |
// 011111111 == 0x7F
|
2034 |
2134 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTMASK_P2, 0x7F, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
2035 |
|
// interrupt edge register IE2.7 with falling edge (from HIGH to LOW) == 10 00 00 00on adress 64h
|
2036 |
|
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x80, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2135 |
// set interrupt edge register, see step 2.2
|
|
2136 |
// P2_4...P2_7: 0x55==01010101, although we need only the register 2_6, but the are ignored.
|
|
2137 |
status |= pcal6524_lld_write_reg(mux1, PCAL6524_LLD_CMD_INTERRUPTEDGE_P2B, 0x55, ((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->timeout);
|
|
2138 |
|
2037 |
2139 |
|
2038 |
2140 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->vl53d = &moduleLldProximity1;
|
2039 |
|
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
|
|
2141 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
|
2040 |
2142 |
|
2041 |
2143 |
//set GPIO extender
|
2042 |
2144 |
((ut_vl53l0xdata_t*)moduleUtAlldVl53l0x.data)->gpio = &moduleLldGpioExtender1;
|