Statistics
| Branch: | Tag: | Revision:

amiro-os / modules / PowerManagement_1-2 / board.c @ c7dcc892

History | View | Annotate | Download (6.227 KB)

1 b010278f Thomas Schöpping
/*
2
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
3
Copyright (C) 2016..2019  Thomas Schöpping et al.
4

5
This program is free software: you can redistribute it and/or modify
6
it under the terms of the GNU General Public License as published by
7
the Free Software Foundation, either version 3 of the License, or
8
(at your option) any later version.
9

10
This program is distributed in the hope that it will be useful,
11
but WITHOUT ANY WARRANTY; without even the implied warranty of
12
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
GNU General Public License for more details.
14

15
You should have received a copy of the GNU General Public License
16
along with this program.  If not, see <http://www.gnu.org/licenses/>.
17
*/
18
19
/**
20
 * @file
21
 * @brief   PowerManagement v1.2 Board specific initializations.
22
 *
23
 * @addtogroup powermanagement_board
24
 * @{
25
 */
26
27
#include <hal.h>
28
#include <stm32_gpio.h>
29
30
/**
31
 * @brief   GPIO initialization.
32
 *
33
 * @param[in]   gpiop   GPIO register block.
34
 * @param[in]   config  GPIO configuration.
35
 */
36
37
38
39
/**
40
 * @brief   GPIO initialization.
41
 *
42
 * @param[in] gpiop     GPIO register block.
43
 * @param[in] moder     Mode register configuration.
44
 * @param[in] otyper    Otype register configuration.
45
 * @param[in] ospeedr   Ospeed register configuration.
46
 * @param[in] pupdr     Pupd register configuration.
47
 * @param[in] odr       OD register configuration.
48
 * @param[in] afrl      AF register (low) configuration.
49
 * @param[in] afrh      AF register (high ) configuration.
50
 * @param[in] ignmask   Mask to ignore individual pads.
51
 */
52
static void _gpio_init(stm32_gpio_t *gpiop,
53
                      const uint32_t moder,
54
                      const uint32_t otyper,
55
                      const uint32_t ospeedr,
56
                      const uint32_t pupdr,
57
                      const uint32_t odr,
58
                      const uint32_t afrl,
59
                      const uint32_t afrh,
60
                      const uint16_t ignmask) {
61
62
  const uint8_t lut[] = {0x00, 0x03, 0x0C, 0x0F,
63
                         0x30, 0x33, 0x3C, 0x3F,
64
                         0xC0, 0xC3, 0xCC, 0xCF,
65
                         0xF0, 0xF3, 0xFC, 0xFF};
66
67
  /* some bit-magic to fan out the mask */
68
  const uint32_t ignmask2 = (lut[(ignmask >> 12)       ] << 24) |
69
                            (lut[(ignmask >>  8) & 0x0F] << 16) |
70
                            (lut[(ignmask >>  4) & 0x0F] <<  8) |
71
                            (lut[(ignmask      ) & 0x0F]);
72
  const uint32_t ignmask4_low = (lut[lut[(ignmask >> 6) & 0x03]] << 24) |
73
                                (lut[lut[(ignmask >> 4) & 0x03]] << 16) |
74
                                (lut[lut[(ignmask >> 2) & 0x03]] <<  8) |
75
                                (lut[lut[(ignmask     ) & 0x03]]);
76
  const uint32_t ignmask4_high = (lut[lut[(ignmask >> 14)       ]] << 24) |
77
                                 (lut[lut[(ignmask >> 12) & 0x03]] << 16) |
78
                                 (lut[lut[(ignmask >> 10) & 0x03]] <<  8) |
79
                                 (lut[lut[(ignmask >>  8) & 0x03]]);
80
81
  gpiop->OTYPER  = (gpiop->OTYPER  & ignmask      ) | (otyper  & ~ignmask      );
82
  gpiop->OSPEEDR = (gpiop->OSPEEDR & ignmask2     ) | (ospeedr & ~ignmask2     );
83
  gpiop->PUPDR   = (gpiop->PUPDR   & ignmask2     ) | (pupdr   & ~ignmask2     );
84
  gpiop->ODR     = (gpiop->ODR     & ignmask      ) | (odr     & ~ignmask      );
85
  gpiop->AFRL    = (gpiop->AFRL    & ignmask4_low ) | (afrl    & ~ignmask4_low );
86
  gpiop->AFRH    = (gpiop->AFRH    & ignmask4_high) | (afrh    & ~ignmask4_high);
87
  gpiop->MODER   = (gpiop->MODER   & ignmask2     ) | (moder   & ~ignmask2     );
88
}
89
90
/**
91
 * @brief   GPIO initilization for all ports.
92
 */
93
static void _stm32_gpio_init(void) {
94
95
  /* Enabling GPIO-related clocks, the mask comes from the
96
     registry header file.*/
97
  rccResetAHB1(STM32_GPIO_EN_MASK);
98
  rccEnableAHB1(STM32_GPIO_EN_MASK, true);
99
100
  /* Initializing all the defined GPIO ports.*/
101
#if STM32_HAS_GPIOA
102
  _gpio_init(GPIOA, VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_IGNORE);
103
#endif
104
#if STM32_HAS_GPIOB
105
  _gpio_init(GPIOB, VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_IGNORE);
106
#endif
107
#if STM32_HAS_GPIOC
108
  _gpio_init(GPIOC, VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_IGNORE);
109
#endif
110
#if STM32_HAS_GPIOD
111
  _gpio_init(GPIOD, VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_IGNORE);
112
#endif
113
#if STM32_HAS_GPIOE
114
  _gpio_init(GPIOE, VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_IGNORE);
115
#endif
116
#if STM32_HAS_GPIOF
117
  _gpio_init(GPIOF, VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_IGNORE);
118
#endif
119
#if STM32_HAS_GPIOG
120
  _gpio_init(GPIOG, VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_IGNORE);
121
#endif
122
#if STM32_HAS_GPIOH
123
  _gpio_init(GPIOH, VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_IGNORE);
124
#endif
125
#if STM32_HAS_GPIOI
126
  _gpio_init(GPIOI, VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_IGNORE);
127
#endif
128
#if STM32_HAS_GPIOJ
129
  _gpio_init(GPIOJ, VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_IGNORE);
130
#endif
131
#if STM32_HAS_GPIOK
132
  _gpio_init(GPIOK, VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_IGNORE);
133
#endif
134
}
135
136
/**
137
 * @brief   Early initialization code.
138
 * @details This initialization must be performed just after stack setup
139
 *          and before any other initialization.
140
 */
141
void __early_init(void) {
142
143
  _stm32_gpio_init();
144
  stm32_clock_init();
145
}
146
147
/**
148
 * @brief   Board-specific initialization code.
149
 * @todo    Add your board-specific code, if any.
150
 */
151
void boardInit(void) {
152
}
153
154
/** @} */