amiro-os / modules / STM32F4Discovery / STM32F407xG.ld @ cca61a53
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1 | cca61a53 | Simon Welzel | /* |
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2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
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3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); |
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5 | you may not use this file except in compliance with the License. |
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6 | You may obtain a copy of the License at |
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7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 |
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9 | |||
10 | Unless required by applicable law or agreed to in writing, software |
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11 | distributed under the License is distributed on an "AS IS" BASIS, |
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12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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13 | See the License for the specific language governing permissions and |
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14 | limitations under the License. |
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15 | */ |
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16 | |||
17 | /* |
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18 | * STM32F407xG memory setup. |
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19 | * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. |
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20 | */ |
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21 | MEMORY |
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22 | { |
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23 | flash0 : org = 0x08000000, len = 1M |
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24 | flash1 : org = 0x00000000, len = 0 |
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25 | flash2 : org = 0x00000000, len = 0 |
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26 | flash3 : org = 0x00000000, len = 0 |
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27 | flash4 : org = 0x00000000, len = 0 |
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28 | flash5 : org = 0x00000000, len = 0 |
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29 | flash6 : org = 0x00000000, len = 0 |
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30 | flash7 : org = 0x00000000, len = 0 |
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31 | ram0 : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ |
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32 | ram1 : org = 0x20000000, len = 112k /* SRAM1 */ |
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33 | ram2 : org = 0x2001C000, len = 16k /* SRAM2 */ |
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34 | ram3 : org = 0x00000000, len = 0 |
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35 | ram4 : org = 0x10000000, len = 64k /* CCM SRAM */ |
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36 | ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ |
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37 | ram6 : org = 0x00000000, len = 0 |
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38 | ram7 : org = 0x00000000, len = 0 |
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39 | } |
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40 | |||
41 | /* For each data/text section two region are defined, a virtual region |
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42 | and a load region (_LMA suffix).*/ |
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43 | |||
44 | /* Flash region to be used for exception vectors.*/ |
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45 | REGION_ALIAS("VECTORS_FLASH", flash0); |
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46 | REGION_ALIAS("VECTORS_FLASH_LMA", flash0); |
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47 | |||
48 | /* Flash region to be used for constructors and destructors.*/ |
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49 | REGION_ALIAS("XTORS_FLASH", flash0); |
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50 | REGION_ALIAS("XTORS_FLASH_LMA", flash0); |
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51 | |||
52 | /* Flash region to be used for code text.*/ |
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53 | REGION_ALIAS("TEXT_FLASH", flash0); |
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54 | REGION_ALIAS("TEXT_FLASH_LMA", flash0); |
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55 | |||
56 | /* Flash region to be used for read only data.*/ |
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57 | REGION_ALIAS("RODATA_FLASH", flash0); |
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58 | REGION_ALIAS("RODATA_FLASH_LMA", flash0); |
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59 | |||
60 | /* Flash region to be used for various.*/ |
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61 | REGION_ALIAS("VARIOUS_FLASH", flash0); |
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62 | REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); |
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63 | |||
64 | /* Flash region to be used for RAM(n) initialization data.*/ |
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65 | REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); |
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66 | |||
67 | /* RAM region to be used for Main stack. This stack accommodates the processing |
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68 | of all exceptions and interrupts.*/ |
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69 | REGION_ALIAS("MAIN_STACK_RAM", ram0); |
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70 | |||
71 | /* RAM region to be used for the process stack. This is the stack used by |
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72 | the main() function.*/ |
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73 | REGION_ALIAS("PROCESS_STACK_RAM", ram0); |
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74 | |||
75 | /* RAM region to be used for data segment.*/ |
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76 | REGION_ALIAS("DATA_RAM", ram0); |
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77 | REGION_ALIAS("DATA_RAM_LMA", flash0); |
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78 | |||
79 | /* RAM region to be used for BSS segment.*/ |
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80 | REGION_ALIAS("BSS_RAM", ram0); |
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81 | |||
82 | /* RAM region to be used for the default heap.*/ |
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83 | REGION_ALIAS("HEAP_RAM", ram0); |
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84 | |||
85 | /* Generic rules inclusion.*/ |
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86 | INCLUDE rules.ld |