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modules/STM32F4Discovery/Makefile
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################################################################################
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# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
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# (AMiRo) platform.                                                            #
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# Copyright (C) 2016..2019  Thomas Schöpping et al.                            #
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#                                                                              #
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# This program is free software: you can redistribute it and/or modify         #
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# it under the terms of the GNU General Public License as published by         #
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# the Free Software Foundation, either version 3 of the License, or            #
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# (at your option) any later version.                                          #
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#                                                                              #
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# This program is distributed in the hope that it will be useful,              #
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# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
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# GNU General Public License for more details.                                 #
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#                                                                              #
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# You should have received a copy of the GNU General Public License            #
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# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
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#                                                                              #
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# This research/work was supported by the Cluster of Excellence Cognitive      #
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# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
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# funded by the German Research Foundation (DFG).                              #
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################################################################################
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################################################################################
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# Build global options                                                         #
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# NOTE: Can be overridden externally.                                          #
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#                                                                              #
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# Compiler options here.
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ifeq ($(USE_OPT),)
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  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
34
endif
35

  
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# C specific options here (added to USE_OPT).
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ifeq ($(USE_COPT),)
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  USE_COPT = -std=c11
39
endif
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# C++ specific options here (added to USE_OPT).
42
ifeq ($(USE_CPPOPT),)
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  USE_CPPOPT = -fno-rtti -std=c++17
44
endif
45

  
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# Enable this if you want the linker to remove unused code and data
47
ifeq ($(USE_LINK_GC),)
48
  USE_LINK_GC = yes
49
endif
50

  
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# Linker extra options here.
52
ifeq ($(USE_LDOPT),)
53
  USE_LDOPT =
54
endif
55

  
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# Enable this if you want link time optimizations (LTO)
57
ifeq ($(USE_LTO),)
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  USE_LTO = yes
59
endif
60

  
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# If enabled, this option allows to compile the application in THUMB mode.
62
ifeq ($(USE_THUMB),)
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  USE_THUMB = yes
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endif
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# Enable this if you want to see the full log while compiling.
67
ifeq ($(USE_VERBOSE_COMPILE),)
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  USE_VERBOSE_COMPILE = no
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endif
70

  
71
# If enabled, this option makes the build process faster by not compiling
72
# modules not used in the current configuration.
73
ifeq ($(USE_SMART_BUILD),)
74
  USE_SMART_BUILD = no
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endif
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#                                                                              #
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# Build global options                                                         #
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################################################################################
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################################################################################
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# Architecture or project specific options                                     #
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#                                                                              #
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85
# Stack size to be allocated to the Cortex-M process stack. This stack is
86
# the stack used by the main() thread.
87
ifeq ($(USE_PROCESS_STACKSIZE),)
88
  USE_PROCESS_STACKSIZE = 0x400
89
endif
90

  
91
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
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# stack is used for processing interrupts and exceptions.
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ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
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  USE_EXCEPTIONS_STACKSIZE = 0x400
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endif
96

  
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# Enables the use of FPU on Cortex-M4.
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# Possible selections are:
99
#   no     - no FPU is used (probably equals 'soft')
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#   soft   - does not use the FPU, thus all floating point operations are emulated
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#   softfp - uses the FPU, but uses the integer registers only
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#   hard   - uses the FPU and passes data via the FPU registers
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ifeq ($(USE_FPU),)
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  USE_FPU = softfp
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endif
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107
#                                                                              #
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# Architecture or project specific options                                     #
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################################################################################
110

  
111
################################################################################
112
# Project, sources and paths                                                   #
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#                                                                              #
114

  
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# Define project name here
116
PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
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118
# Imported source files and paths
119
include ../../kernel/kernel.mk
120
CHIBIOS := $(AMIROOS_KERNEL)
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AMIROOS = ../..
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# Licensing files
123
include $(CHIBIOS)/os/license/license.mk
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# Startup files
125
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
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# HAL-OSAL files
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
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include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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# RTOS files
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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# Other files (optional).
134
include $(CHIBIOS)/test/lib/test.mk
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include $(CHIBIOS)/test/rt/rt_test.mk
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include $(CHIBIOS)/test/oslib/oslib_test.mk
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# AMiRo-BLT files
138
include ../../bootloader/bootloader.mk
139
# AMiRo-LLD files
140
include ../../periphery-lld/periphery-lld.mk
141
# AMiRo-OS files
142
include ../modules.mk
143
include $(AMIROOS)/core/core.mk
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include $(AMIROOS)/unittests/unittests.mk
145

  
146
# Define linker script file here
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LDSCRIPT= STM32F407xG.ld
148

  
149
# C sources that can be compiled in ARM or THUMB mode depending on the global
150
# setting.
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CSRC = $(LICSRC) \
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       $(STARTUPSRC) \
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       $(KERNSRC) \
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       $(PORTSRC) \
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       $(OSALSRC) \
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       $(HALSRC) \
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       $(PLATFORMSRC) \
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       $(MODULESCSRC) \
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       $(TESTSRC) \
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       $(PERIPHERYLLDCSRC) \
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       $(AMIROOSCORECSRC) \
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       $(UNITTESTSCSRC) \
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       $(CHIBIOS)/os/various/evtimer.c \
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       $(CHIBIOS)/os/various/syscalls.c \
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       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
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       board.c \
167
       module.c \
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       $(APPSCSRC)
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# C++ sources that can be compiled in ARM or THUMB mode depending on the global
171
# setting.
172
CPPSRC = $(AMIROOSCORECPPSRC) \
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         $(CHIBIOS)/os/various/cpp_wrappers/syscalls_cpp.cpp \
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         $(APPSCPPSRC)
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# C sources to be compiled in ARM mode regardless of the global setting.
177
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
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#       option that results in lower performance and larger code size.
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ACSRC = $(APPSACSRC)
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181
# C++ sources to be compiled in ARM mode regardless of the global setting.
182
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
183
#       option that results in lower performance and larger code size.
184
ACPPSRC = $(APPSACPPSRC)
185

  
186
# C sources to be compiled in THUMB mode regardless of the global setting.
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# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
188
#       option that results in lower performance and larger code size.
189
TCSRC = $(APPSTCSRC)
190

  
191
# C sources to be compiled in THUMB mode regardless of the global setting.
192
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
193
#       option that results in lower performance and larger code size.
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TCPPSRC = $(APPSTCPPSRC)
195

  
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# List ASM source files here
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ASMSRC = $(APPSASMSRC)
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ASMXSRC = $(STARTUPASM) \
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          $(PORTASM) \
200
          $(OSALASM) \
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          $(APPSASMXSRC)
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203
INCDIR = $(LICINC) \
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         $(STARTUPINC) \
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         $(KERNINC) \
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         $(PORTINC) \
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         $(OSALINC) \
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         $(HALINC) \
209
         $(PLATFORMINC) \
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         $(MODULESINC) \
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         $(TESTINC) \
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         $(BOOTLOADERINC) \
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         $(CHIBIOS)/os/hal/lib/streams \
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         $(PERIPHERYLLDINC) \
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         $(AMIROOS) \
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         $(AMIROOSCOREINC) \
217
         $(UNITTESTSINC) \
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         $(APPSINC)
219

  
220
#                                                                              #
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# Project, sources and paths                                                   #
222
################################################################################
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################################################################################
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# Compiler settings                                                            #
226
# NOTE: Some can be overridden externally.                                     #
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#                                                                              #
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MCU  = cortex-m4
230

  
231
#TRGT = arm-elf-
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TRGT = arm-none-eabi-
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CC   = $(TRGT)gcc
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CPPC = $(TRGT)g++
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# Enable loading with g++ only if you need C++ runtime support.
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# NOTE: You can use C++ even without C++ support if you are careful. C++
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#       runtime support makes code size explode.
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LD   = $(TRGT)gcc
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#LD   = $(TRGT)g++
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CP   = $(TRGT)objcopy
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AS   = $(TRGT)gcc -x assembler-with-cpp
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AR   = $(TRGT)ar
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OD   = $(TRGT)objdump
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SZ   = $(TRGT)size
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HEX  = $(CP) -O ihex
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BIN  = $(CP) -O binary
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SREC = $(CP) -O srec --srec-len=248
248

  
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# ARM-specific options here
250
ifeq ($(AOPT),)
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  AOPT =
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endif
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# THUMB-specific options here
255
ifeq ($(TOPT),)
256
  TOPT = -mthumb -DTHUMB
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endif
258

  
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# Define C warning options here
260
ifeq ($(CWARN),)
261
  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
262
endif
263

  
264
# Define C++ warning options here
265
ifeq ($(CPPWARN),)
266
  CPPWARN = -Wall -Wextra -Wundef
267
endif
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#                                                                              #
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# Compiler settings                                                            #
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################################################################################
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################################################################################
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# Start of user section                                                        #
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#                                                                              #
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277
# List all user C define here, like -D_DEBUG=1
278
UDEFS +=
279

  
280
# Define ASM defines here
281
UADEFS +=
282

  
283
# List all user directories here
284
UINCDIR +=
285

  
286
# List the user directory to look for the libraries here
287
ULIBDIR +=
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# List all user libraries here
290
ULIBS +=
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#                                                                              #
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# End of user defines                                                          #
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################################################################################
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################################################################################
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# Start of targets section                                                     #
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#                                                                              #
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# all and its dependencies
301
BUILDDIR = ./build
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RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
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include $(RULESPATH)/rules.mk
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# flash
306
include $(AMIROOS)/bootloader/bootloader.mk
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flash: $(BUILDDIR)/$(PROJECT).elf
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	openocd -f interface/stlink-v2-1.cfg -c "set WORKAREASIZE 0x2000" -f target/stm32f4x.cfg -c "program build/$(PROJECT).elf verify reset exit"
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#                                                                              #
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# End of targets section                                                       #
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################################################################################
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modules/STM32F4Discovery/STM32F407xG.ld
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/*
2
    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3

  
4
    Licensed under the Apache License, Version 2.0 (the "License");
5
    you may not use this file except in compliance with the License.
6
    You may obtain a copy of the License at
7

  
8
        http://www.apache.org/licenses/LICENSE-2.0
9

  
10
    Unless required by applicable law or agreed to in writing, software
11
    distributed under the License is distributed on an "AS IS" BASIS,
12
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13
    See the License for the specific language governing permissions and
14
    limitations under the License.
15
*/
16

  
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/*
18
 * STM32F407xG memory setup.
19
 * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
20
 */
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MEMORY
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{
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    flash0  : org = 0x08000000, len = 1M
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    flash1  : org = 0x00000000, len = 0
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    flash2  : org = 0x00000000, len = 0
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    flash3  : org = 0x00000000, len = 0
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    flash4  : org = 0x00000000, len = 0
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    flash5  : org = 0x00000000, len = 0
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    flash6  : org = 0x00000000, len = 0
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    flash7  : org = 0x00000000, len = 0
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    ram0    : org = 0x20000000, len = 128k      /* SRAM1 + SRAM2 */
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    ram1    : org = 0x20000000, len = 112k      /* SRAM1 */
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    ram2    : org = 0x2001C000, len = 16k       /* SRAM2 */
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    ram3    : org = 0x00000000, len = 0
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    ram4    : org = 0x10000000, len = 64k       /* CCM SRAM */
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    ram5    : org = 0x40024000, len = 4k        /* BCKP SRAM */
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    ram6    : org = 0x00000000, len = 0
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    ram7    : org = 0x00000000, len = 0
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}
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/* For each data/text section two region are defined, a virtual region
42
   and a load region (_LMA suffix).*/
43

  
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/* Flash region to be used for exception vectors.*/
45
REGION_ALIAS("VECTORS_FLASH", flash0);
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REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
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48
/* Flash region to be used for constructors and destructors.*/
49
REGION_ALIAS("XTORS_FLASH", flash0);
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REGION_ALIAS("XTORS_FLASH_LMA", flash0);
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/* Flash region to be used for code text.*/
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REGION_ALIAS("TEXT_FLASH", flash0);
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REGION_ALIAS("TEXT_FLASH_LMA", flash0);
55

  
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/* Flash region to be used for read only data.*/
57
REGION_ALIAS("RODATA_FLASH", flash0);
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REGION_ALIAS("RODATA_FLASH_LMA", flash0);
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/* Flash region to be used for various.*/
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REGION_ALIAS("VARIOUS_FLASH", flash0);
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REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
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64
/* Flash region to be used for RAM(n) initialization data.*/
65
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
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67
/* RAM region to be used for Main stack. This stack accommodates the processing
68
   of all exceptions and interrupts.*/
69
REGION_ALIAS("MAIN_STACK_RAM", ram0);
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71
/* RAM region to be used for the process stack. This is the stack used by
72
   the main() function.*/
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REGION_ALIAS("PROCESS_STACK_RAM", ram0);
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/* RAM region to be used for data segment.*/
76
REGION_ALIAS("DATA_RAM", ram0);
77
REGION_ALIAS("DATA_RAM_LMA", flash0);
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/* RAM region to be used for BSS segment.*/
80
REGION_ALIAS("BSS_RAM", ram0);
81

  
82
/* RAM region to be used for the default heap.*/
83
REGION_ALIAS("HEAP_RAM", ram0);
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/* Generic rules inclusion.*/
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INCLUDE rules.ld
modules/STM32F4Discovery/alldconf.h
1
/*
2
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
3
Copyright (C) 2016..2019  Thomas Schöpping et al.
4

  
5
This program is free software: you can redistribute it and/or modify
6
it under the terms of the GNU General Public License as published by
7
the Free Software Foundation, either version 3 of the License, or
8
(at your option) any later version.
9

  
10
This program is distributed in the hope that it will be useful,
11
but WITHOUT ANY WARRANTY; without even the implied warranty of
12
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
GNU General Public License for more details.
14

  
15
You should have received a copy of the GNU General Public License
16
along with this program.  If not, see <http://www.gnu.org/licenses/>.
17
*/
18

  
19
/**
20
 * @file
21
 * @brief   AMiRo-LLD configuration file for the PowerManagement v1.1 module.
22
 * @details Contains the application specific AMiRo-LLD settings.
23
 *
24
 * @addtogroup powermanagement_lld_config
25
 * @{
26
 */
27

  
28
#ifndef _ALLDCONF_H_
29
#define _ALLDCONF_H_
30

  
31
/*
32
 * compatibility guards
33
 */
34
#define _AMIRO_LLD_CFG_
35
#define AMIRO_LLD_CFG_VERSION_MAJOR         1
36
#define AMIRO_LLD_CFG_VERSION_MINOR         0
37

  
38
/**
39
 * @brief   Width of the apalTime_t data type.
40
 *
41
 * @details Possible values are 8, 16, 32, and 64 bits.
42
 *          By definition time is represented at microsecond precision.
43
 */
44
#define AMIROLLD_CFG_TIME_SIZE          32
45

  
46
#endif /* _ALLDCONF_H_ */
47

  
48
/** @} */
modules/STM32F4Discovery/aosconf.h
1
/*
2
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
3
Copyright (C) 2016..2019  Thomas Schöpping et al.
4

  
5
This program is free software: you can redistribute it and/or modify
6
it under the terms of the GNU General Public License as published by
7
the Free Software Foundation, either version 3 of the License, or
8
(at your option) any later version.
9

  
10
This program is distributed in the hope that it will be useful,
11
but WITHOUT ANY WARRANTY; without even the implied warranty of
12
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
GNU General Public License for more details.
14

  
15
You should have received a copy of the GNU General Public License
16
along with this program.  If not, see <http://www.gnu.org/licenses/>.
17
*/
18

  
19
/**
20
 * @file
21
 * @brief   AMiRo-OS Configuration file for the PowerManagement v1.1 module.
22
 * @details Contains the application specific AMiRo-OS settings.
23
 *
24
 * @addtogroup powermanagement_aos_config
25
 * @{
26
 */
27

  
28
#ifndef _AOSCONF_H_
29
#define _AOSCONF_H_
30

  
31
/*
32
 * compatibility guards
33
 */
34
#define _AMIRO_OS_CFG_
35
#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
36
#define _AMIRO_OS_CFG_VERSION_MINOR_            0
37

  
38
#include <stdbool.h>
39

  
40
/*
41
 * Include an external configuration file to override the following default settings only if required.
42
 */
43
#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
44
  #include <osconf.h>
45
#endif
46

  
47
/*===========================================================================*/
48
/**
49
 * @name Kernel parameters and options
50
 * @{
51
 */
52
/*===========================================================================*/
53

  
54
/**
55
 * @brief   Flag to enable/disable debug API and logic.
56
 */
57
#if !defined(OS_CFG_DBG)
58
  #define AMIROOS_CFG_DBG                       true
59
#else
60
  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
61
#endif
62

  
63
/**
64
 * @brief   Flag to enable/disable unit tests.
65
 */
66
#if !defined(OS_CFG_TESTS_ENABLE)
67
  #define AMIROOS_CFG_TESTS_ENABLE              true
68
#else
69
  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
70
#endif
71

  
72
/**
73
 * @brief   Flag to enable/disable profiling API and logic.
74
 */
75
#if !defined(OS_CFG_PROFILE)
76
  #define AMIROOS_CFG_PROFILE                   true
77
#else
78
  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
79
#endif
80

  
81
/**
82
 * @brief   Mask for the control thread to listen to certain IO events.
83
 * @note    Any mandatory events (e.g. for SSSP) are enabled implicitely despite this configuration.
84
 */
85
#if !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK)
86
  #define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK    0
87
#else
88
  #define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK    OS_CFG_MAIN_LOOP_IOEVENT_MASK
89
#endif
90

  
91
/**
92
 * @brief   Timeout value when waiting for events in the main loop in microseconds.
93
 * @details A value of 0 deactivates the timeout.
94
 */
95
#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
96
  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
97
#else
98
  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
99
#endif
100

  
101
/** @} */
102

  
103
/*===========================================================================*/
104
/**
105
 * @name SSSP (Startup Shutdown Synchronization Protocol) configuration.
106
 * @{
107
 */
108
/*===========================================================================*/
109

  
110
/**
111
 * @brief   Flag to enable SSSP.
112
 */
113
#if !defined(OS_CFG_SSSP_ENABLE)
114
  #define AMIROOS_CFG_SSSP_ENABLE               false
115
#else
116
  #define AMIROOS_CFG_SSSP_ENABLE               OS_CFG_SSSP_ENABLE
117
#endif
118

  
119
/**
120
 * @brief   Flag to set the module as SSSP master.
121
 * @details There must be only one module with this flag set to true in a system.
122
 */
123
#if !defined(OS_CFG_SSSP_MASTER)
124
  #define AMIROOS_CFG_SSSP_MASTER               false
125
#else
126
  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
127
#endif
128

  
129
/**
130
 * @brief   Flag to set the module to be the first in the stack.
131
 * @details There must be only one module with this flag set to true in a system.
132
 */
133
#if !defined(OS_CFG_SSSP_STACK_START)
134
  #define AMIROOS_CFG_SSSP_STACK_START          false
135
#else
136
  #define AMIROOS_CFG_SSSP_STACK_START          OS_CFG_SSSP_STACK_START
137
#endif
138

  
139
/**
140
 * @brief   Flag to set the module to be the last in the stack.
141
 * @details There must be only one module with this flag set to true in a system.
142
 */
143
#if !defined(OS_CFG_SSSP_STACK_END)
144
  #define AMIROOS_CFG_SSSP_STACK_END            false
145
#else
146
  #define AMIROOS_CFG_SSSP_STACK_END            OS_CFG_SSSP_STACK_END
147
#endif
148

  
149
/**
150
 * @brief   Delay time (in microseconds) how long a SSSP signal must be active.
151
 */
152
#if !defined(OS_CFG_SSSP_SIGNALDELAY)
153
  #define AMIROOS_CFG_SSSP_SIGNALDELAY          1000
154
#else
155
  #define AMIROOS_CFG_SSSP_SIGNALDELAY          OS_CFG_SSSP_SIGNALDELAY
156
#endif
157

  
158
/**
159
 * @brief   Time boundary for robot wide clock synchronization in microseconds.
160
 * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
161
 *          All modules need to align their local uptime to the nearest multiple of this value.
162
 */
163
#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
164
  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
165
#else
166
  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
167
#endif
168

  
169
/** @} */
170

  
171
/*===========================================================================*/
172
/**
173
 * @name System shell options
174
 * @{
175
 */
176
/*===========================================================================*/
177

  
178
/**
179
 * @brief   Shell enable flag.
180
 */
181
#if !defined(OS_CFG_SHELL_ENABLE) && (AMIROOS_CFG_TESTS_ENABLE != true)
182
  #define AMIROOS_CFG_SHELL_ENABLE              true
183
#elif (AMIROOS_CFG_TESTS_ENABLE == true)
184
  #define AMIROOS_CFG_SHELL_ENABLE              true
185
#else
186
  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
187
#endif
188

  
189
/**
190
 * @brief   Shell thread stack size.
191
 */
192
#if !defined(OS_CFG_SHELL_STACKSIZE)
193
  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
194
#else
195
  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
196
#endif
197

  
198
/**
199
 * @brief   Shell thread priority.
200
 * @details Thread priorities are specified as an integer value.
201
 *          Predefined ranges are:
202
 *            lowest  ┌ THD_LOWPRIO_MIN
203
 *                    │ ...
204
 *                    └ THD_LOWPRIO_MAX
205
 *                    ┌ THD_NORMALPRIO_MIN
206
 *                    │ ...
207
 *                    └ THD_NORMALPRIO_MAX
208
 *                    ┌ THD_HIGHPRIO_MIN
209
 *                    │ ...
210
 *                    └ THD_HIGHPRIO_MAX
211
 *                    ┌ THD_RTPRIO_MIN
212
 *                    │ ...
213
 *            highest └ THD_RTPRIO_MAX
214
 */
215
#if !defined(OS_CFG_SHELL_THREADPRIO)
216
  #define AMIROOS_CFG_SHELL_THREADPRIO          AOS_THD_NORMALPRIO_MIN
217
#else
218
  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
219
#endif
220

  
221
/**
222
 * @brief   Shell maximum input line length.
223
 */
224
#if !defined(OS_CFG_SHELL_LINEWIDTH)
225
  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
226
#else
227
  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
228
#endif
229

  
230
/**
231
 * @brief   Shell maximum number of arguments.
232
 */
233
#if !defined(OS_CFG_SHELL_MAXARGS)
234
  #define AMIROOS_CFG_SHELL_MAXARGS             4
235
#else
236
  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
237
#endif
238

  
239
/** @} */
240

  
241
#endif /* _AOSCONF_H_ */
242

  
243
/** @} */
modules/STM32F4Discovery/board.c
1
/*
2
    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3

  
4
    Licensed under the Apache License, Version 2.0 (the "License");
5
    you may not use this file except in compliance with the License.
6
    You may obtain a copy of the License at
7

  
8
        http://www.apache.org/licenses/LICENSE-2.0
9

  
10
    Unless required by applicable law or agreed to in writing, software
11
    distributed under the License is distributed on an "AS IS" BASIS,
12
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13
    See the License for the specific language governing permissions and
14
    limitations under the License.
15
*/
16

  
17
/*
18
 * This file has been automatically generated using ChibiStudio board
19
 * generator plugin. Do not edit manually.
20
 */
21

  
22
#include "hal.h"
23
#include "stm32_gpio.h"
24

  
25
/*===========================================================================*/
26
/* Driver local definitions.                                                 */
27
/*===========================================================================*/
28

  
29
/*===========================================================================*/
30
/* Driver exported variables.                                                */
31
/*===========================================================================*/
32

  
33
/*===========================================================================*/
34
/* Driver local variables and types.                                         */
35
/*===========================================================================*/
36

  
37
/**
38
 * @brief   Type of STM32 GPIO port setup.
39
 */
40
typedef struct {
41
  uint32_t              moder;
42
  uint32_t              otyper;
43
  uint32_t              ospeedr;
44
  uint32_t              pupdr;
45
  uint32_t              odr;
46
  uint32_t              afrl;
47
  uint32_t              afrh;
48
} gpio_setup_t;
49

  
50
/**
51
 * @brief   Type of STM32 GPIO initialization data.
52
 */
53
typedef struct {
54
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55
  gpio_setup_t          PAData;
56
#endif
57
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58
  gpio_setup_t          PBData;
59
#endif
60
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61
  gpio_setup_t          PCData;
62
#endif
63
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64
  gpio_setup_t          PDData;
65
#endif
66
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67
  gpio_setup_t          PEData;
68
#endif
69
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70
  gpio_setup_t          PFData;
71
#endif
72
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73
  gpio_setup_t          PGData;
74
#endif
75
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76
  gpio_setup_t          PHData;
77
#endif
78
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79
  gpio_setup_t          PIData;
80
#endif
81
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82
  gpio_setup_t          PJData;
83
#endif
84
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85
  gpio_setup_t          PKData;
86
#endif
87
} gpio_config_t;
88

  
89
/**
90
 * @brief   STM32 GPIO static initialization data.
91
 */
92
static const gpio_config_t gpio_default_config = {
93
#if STM32_HAS_GPIOA
94
  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
95
   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
96
#endif
97
#if STM32_HAS_GPIOB
98
  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
99
   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
100
#endif
101
#if STM32_HAS_GPIOC
102
  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
103
   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
104
#endif
105
#if STM32_HAS_GPIOD
106
  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
107
   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
108
#endif
109
#if STM32_HAS_GPIOE
110
  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
111
   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
112
#endif
113
#if STM32_HAS_GPIOF
114
  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
115
   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
116
#endif
117
#if STM32_HAS_GPIOG
118
  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
119
   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
120
#endif
121
#if STM32_HAS_GPIOH
122
  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
123
   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
124
#endif
125
#if STM32_HAS_GPIOI
126
  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
127
   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH},
128
#endif
129
#if STM32_HAS_GPIOJ
130
  {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
131
   VAL_GPIOJ_ODR,   VAL_GPIOJ_AFRL,   VAL_GPIOJ_AFRH},
132
#endif
133
#if STM32_HAS_GPIOK
134
  {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
135
   VAL_GPIOK_ODR,   VAL_GPIOK_AFRL,   VAL_GPIOK_AFRH}
136
#endif
137
};
138

  
139
/*===========================================================================*/
140
/* Driver local functions.                                                   */
141
/*===========================================================================*/
142

  
143
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
144

  
145
  gpiop->OTYPER  = config->otyper;
146
  gpiop->OSPEEDR = config->ospeedr;
147
  gpiop->PUPDR   = config->pupdr;
148
  gpiop->ODR     = config->odr;
149
  gpiop->AFRL    = config->afrl;
150
  gpiop->AFRH    = config->afrh;
151
  gpiop->MODER   = config->moder;
152
}
153

  
154
static void stm32_gpio_init(void) {
155

  
156
  /* Enabling GPIO-related clocks, the mask comes from the
157
     registry header file.*/
158
  rccResetAHB1(STM32_GPIO_EN_MASK);
159
  rccEnableAHB1(STM32_GPIO_EN_MASK, true);
160

  
161
  /* Initializing all the defined GPIO ports.*/
162
#if STM32_HAS_GPIOA
163
  gpio_init(GPIOA, &gpio_default_config.PAData);
164
#endif
165
#if STM32_HAS_GPIOB
166
  gpio_init(GPIOB, &gpio_default_config.PBData);
167
#endif
168
#if STM32_HAS_GPIOC
169
  gpio_init(GPIOC, &gpio_default_config.PCData);
170
#endif
171
#if STM32_HAS_GPIOD
172
  gpio_init(GPIOD, &gpio_default_config.PDData);
173
#endif
174
#if STM32_HAS_GPIOE
175
  gpio_init(GPIOE, &gpio_default_config.PEData);
176
#endif
177
#if STM32_HAS_GPIOF
178
  gpio_init(GPIOF, &gpio_default_config.PFData);
179
#endif
180
#if STM32_HAS_GPIOG
181
  gpio_init(GPIOG, &gpio_default_config.PGData);
182
#endif
183
#if STM32_HAS_GPIOH
184
  gpio_init(GPIOH, &gpio_default_config.PHData);
185
#endif
186
#if STM32_HAS_GPIOI
187
  gpio_init(GPIOI, &gpio_default_config.PIData);
188
#endif
189
#if STM32_HAS_GPIOJ
190
  gpio_init(GPIOJ, &gpio_default_config.PJData);
191
#endif
192
#if STM32_HAS_GPIOK
193
  gpio_init(GPIOK, &gpio_default_config.PKData);
194
#endif
195
}
196

  
197
/*===========================================================================*/
198
/* Driver interrupt handlers.                                                */
199
/*===========================================================================*/
200

  
201
/*===========================================================================*/
202
/* Driver exported functions.                                                */
203
/*===========================================================================*/
204

  
205
/**
206
 * @brief   Early initialization code.
207
 * @details GPIO ports and system clocks are initialized before everything
208
 *          else.
209
 */
210
void __early_init(void) {
211

  
212
  stm32_gpio_init();
213
  stm32_clock_init();
214
}
215

  
216
#if HAL_USE_SDC || defined(__DOXYGEN__)
217
/**
218
 * @brief   SDC card detection.
219
 */
220
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
221

  
222
  (void)sdcp;
223
  /* TODO: Fill the implementation.*/
224
  return true;
225
}
226

  
227
/**
228
 * @brief   SDC card write protection detection.
229
 */
230
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
231

  
232
  (void)sdcp;
233
  /* TODO: Fill the implementation.*/
234
  return false;
235
}
236
#endif /* HAL_USE_SDC */
237

  
238
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
239
/**
240
 * @brief   MMC_SPI card detection.
241
 */
242
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
243

  
244
  (void)mmcp;
245
  /* TODO: Fill the implementation.*/
246
  return true;
247
}
248

  
249
/**
250
 * @brief   MMC_SPI card write protection detection.
251
 */
252
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
253

  
254
  (void)mmcp;
255
  /* TODO: Fill the implementation.*/
256
  return false;
257
}
258
#endif
259

  
260
/**
261
 * @brief   Board-specific initialization code.
262
 * @todo    Add your board-specific code, if any.
263
 */
264
void boardInit(void) {
265

  
266
}
modules/STM32F4Discovery/board.h
1
/*
2
    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3

  
4
    Licensed under the Apache License, Version 2.0 (the "License");
5
    you may not use this file except in compliance with the License.
6
    You may obtain a copy of the License at
7

  
8
        http://www.apache.org/licenses/LICENSE-2.0
9

  
10
    Unless required by applicable law or agreed to in writing, software
11
    distributed under the License is distributed on an "AS IS" BASIS,
12
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13
    See the License for the specific language governing permissions and
14
    limitations under the License.
15
*/
16

  
17
/*
18
 * This file has been automatically generated using ChibiStudio board
19
 * generator plugin. Do not edit manually.
20
 */
21

  
22
#ifndef BOARD_H
23
#define BOARD_H
24

  
25
/*===========================================================================*/
26
/* Driver constants.                                                         */
27
/*===========================================================================*/
28

  
29
/*
30
 * Setup for STMicroelectronics STM32F4-Discovery board.
31
 */
32

  
33
/*
34
 * Board identifier.
35
 */
36
#define BOARD_ST_STM32F4_DISCOVERY
37
#define BOARD_NAME                  "STMicroelectronics STM32F4-Discovery"
38

  
39
/*
40
 * Board oscillators-related settings.
41
 * NOTE: LSE not fitted.
42
 */
43
#if !defined(STM32_LSECLK)
44
#define STM32_LSECLK                0U
45
#endif
46

  
47
#if !defined(STM32_HSECLK)
48
#define STM32_HSECLK                8000000U
49
#endif
50

  
51
/*
52
 * Board voltages.
53
 * Required for performance limits calculation.
54
 */
55
#define STM32_VDD                   300U
56

  
57
/*
58
 * MCU type as defined in the ST header.
59
 */
60
#define STM32F407xx
61

  
62
/*
63
 * IO pins assignments.
64
 */
65
#define GPIOA_BUTTON                0U
66
#define GPIOA_PIN1                  1U
67
#define GPIOA_PIN2                  2U
68
#define GPIOA_PIN3                  3U
69
#define GPIOA_LRCK                  4U
70
#define GPIOA_SPC                   5U
71
#define GPIOA_SDO                   6U
72
#define GPIOA_SDI                   7U
73
#define GPIOA_PIN8                  8U
74
#define GPIOA_VBUS_FS               9U
75
#define GPIOA_OTG_FS_ID             10U
76
#define GPIOA_OTG_FS_DM             11U
77
#define GPIOA_OTG_FS_DP             12U
78
#define GPIOA_SWDIO                 13U
79
#define GPIOA_SWCLK                 14U
80
#define GPIOA_PIN15                 15U
81

  
82
#define GPIOB_PIN0                  0U
83
#define GPIOB_PIN1                  1U
84
#define GPIOB_PIN2                  2U
85
#define GPIOB_SWO                   3U
86
#define GPIOB_PIN4                  4U
87
#define GPIOB_PIN5                  5U
88
#define GPIOB_SCL                   6U
89
#define GPIOB_PIN7                  7U
90
#define GPIOB_PIN8                  8U
91
#define GPIOB_SDA                   9U
92
#define GPIOB_CLK_IN                10U
93
#define GPIOB_PIN11                 11U
94
#define GPIOB_PIN12                 12U
95
#define GPIOB_PIN13                 13U
96
#define GPIOB_PIN14                 14U
97
#define GPIOB_PIN15                 15U
98

  
99
#define GPIOC_OTG_FS_POWER_ON       0U
100
#define GPIOC_PIN1                  1U
101
#define GPIOC_PIN2                  2U
102
#define GPIOC_PDM_OUT               3U
103
#define GPIOC_PIN4                  4U
104
#define GPIOC_PIN5                  5U
105
#define GPIOC_PIN6                  6U
106
#define GPIOC_MCLK                  7U
107
#define GPIOC_PIN8                  8U
108
#define GPIOC_PIN9                  9U
109
#define GPIOC_SCLK                  10U
110
#define GPIOC_PIN11                 11U
111
#define GPIOC_SDIN                  12U
112
#define GPIOC_PIN13                 13U
113
#define GPIOC_PIN14                 14U
114
#define GPIOC_PIN15                 15U
115

  
116
#define GPIOD_PIN0                  0U
117
#define GPIOD_PIN1                  1U
118
#define GPIOD_PIN2                  2U
119
#define GPIOD_PIN3                  3U
120
#define GPIOD_RESET                 4U
121
#define GPIOD_OVER_CURRENT          5U
122
#define GPIOD_PIN6                  6U
123
#define GPIOD_PIN7                  7U
124
#define GPIOD_PIN8                  8U
125
#define GPIOD_PIN9                  9U
126
#define GPIOD_PIN10                 10U
127
#define GPIOD_PIN11                 11U
128
#define GPIOD_LED4                  12U
129
#define GPIOD_LED3                  13U
130
#define GPIOD_LED5                  14U
131
#define GPIOD_LED6                  15U
132

  
133
#define GPIOE_INT1                  0U
134
#define GPIOE_INT2                  1U
135
#define GPIOE_PIN2                  2U
136
#define GPIOE_CS_SPI                3U
137
#define GPIOE_PIN4                  4U
138
#define GPIOE_PIN5                  5U
139
#define GPIOE_PIN6                  6U
140
#define GPIOE_PIN7                  7U
141
#define GPIOE_PIN8                  8U
142
#define GPIOE_PIN9                  9U
143
#define GPIOE_PIN10                 10U
144
#define GPIOE_PIN11                 11U
145
#define GPIOE_PIN12                 12U
146
#define GPIOE_PIN13                 13U
147
#define GPIOE_PIN14                 14U
148
#define GPIOE_PIN15                 15U
149

  
150
#define GPIOF_PIN0                  0U
151
#define GPIOF_PIN1                  1U
152
#define GPIOF_PIN2                  2U
153
#define GPIOF_PIN3                  3U
154
#define GPIOF_PIN4                  4U
155
#define GPIOF_PIN5                  5U
156
#define GPIOF_PIN6                  6U
157
#define GPIOF_PIN7                  7U
158
#define GPIOF_PIN8                  8U
159
#define GPIOF_PIN9                  9U
160
#define GPIOF_PIN10                 10U
161
#define GPIOF_PIN11                 11U
162
#define GPIOF_PIN12                 12U
163
#define GPIOF_PIN13                 13U
164
#define GPIOF_PIN14                 14U
165
#define GPIOF_PIN15                 15U
166

  
167
#define GPIOG_PIN0                  0U
168
#define GPIOG_PIN1                  1U
169
#define GPIOG_PIN2                  2U
170
#define GPIOG_PIN3                  3U
171
#define GPIOG_PIN4                  4U
172
#define GPIOG_PIN5                  5U
173
#define GPIOG_PIN6                  6U
174
#define GPIOG_PIN7                  7U
175
#define GPIOG_PIN8                  8U
176
#define GPIOG_PIN9                  9U
177
#define GPIOG_PIN10                 10U
178
#define GPIOG_PIN11                 11U
179
#define GPIOG_PIN12                 12U
180
#define GPIOG_PIN13                 13U
181
#define GPIOG_PIN14                 14U
182
#define GPIOG_PIN15                 15U
183

  
184
#define GPIOH_OSC_IN                0U
185
#define GPIOH_OSC_OUT               1U
186
#define GPIOH_PIN2                  2U
187
#define GPIOH_PIN3                  3U
188
#define GPIOH_PIN4                  4U
189
#define GPIOH_PIN5                  5U
190
#define GPIOH_PIN6                  6U
191
#define GPIOH_PIN7                  7U
192
#define GPIOH_PIN8                  8U
193
#define GPIOH_PIN9                  9U
194
#define GPIOH_PIN10                 10U
195
#define GPIOH_PIN11                 11U
196
#define GPIOH_PIN12                 12U
197
#define GPIOH_PIN13                 13U
198
#define GPIOH_PIN14                 14U
199
#define GPIOH_PIN15                 15U
200

  
201
#define GPIOI_PIN0                  0U
202
#define GPIOI_PIN1                  1U
203
#define GPIOI_PIN2                  2U
204
#define GPIOI_PIN3                  3U
205
#define GPIOI_PIN4                  4U
206
#define GPIOI_PIN5                  5U
207
#define GPIOI_PIN6                  6U
208
#define GPIOI_PIN7                  7U
209
#define GPIOI_PIN8                  8U
210
#define GPIOI_PIN9                  9U
211
#define GPIOI_PIN10                 10U
212
#define GPIOI_PIN11                 11U
213
#define GPIOI_PIN12                 12U
214
#define GPIOI_PIN13                 13U
215
#define GPIOI_PIN14                 14U
216
#define GPIOI_PIN15                 15U
217

  
218
/*
219
 * IO lines assignments.
220
 */
221
#define LINE_BUTTON                 PAL_LINE(GPIOA, 0U)
222
#define LINE_LRCK                   PAL_LINE(GPIOA, 4U)
223
#define LINE_SPC                    PAL_LINE(GPIOA, 5U)
224
#define LINE_SDO                    PAL_LINE(GPIOA, 6U)
225
#define LINE_SDI                    PAL_LINE(GPIOA, 7U)
226
#define LINE_VBUS_FS                PAL_LINE(GPIOA, 9U)
227
#define LINE_OTG_FS_ID              PAL_LINE(GPIOA, 10U)
228
#define LINE_OTG_FS_DM              PAL_LINE(GPIOA, 11U)
229
#define LINE_OTG_FS_DP              PAL_LINE(GPIOA, 12U)
230
#define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)
231
#define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)
232
#define LINE_SWO                    PAL_LINE(GPIOB, 3U)
233
#define LINE_SCL                    PAL_LINE(GPIOB, 6U)
234
#define LINE_SDA                    PAL_LINE(GPIOB, 9U)
235
#define LINE_CLK_IN                 PAL_LINE(GPIOB, 10U)
236
#define LINE_OTG_FS_POWER_ON        PAL_LINE(GPIOC, 0U)
237
#define LINE_PDM_OUT                PAL_LINE(GPIOC, 3U)
238
#define LINE_MCLK                   PAL_LINE(GPIOC, 7U)
239
#define LINE_SCLK                   PAL_LINE(GPIOC, 10U)
240
#define LINE_SDIN                   PAL_LINE(GPIOC, 12U)
241
#define LINE_RESET                  PAL_LINE(GPIOD, 4U)
242
#define LINE_OVER_CURRENT           PAL_LINE(GPIOD, 5U)
243
#define LINE_LED4                   PAL_LINE(GPIOD, 12U)
244
#define LINE_LED3                   PAL_LINE(GPIOD, 13U)
245
#define LINE_LED5                   PAL_LINE(GPIOD, 14U)
246
#define LINE_LED6                   PAL_LINE(GPIOD, 15U)
247
#define LINE_INT1                   PAL_LINE(GPIOE, 0U)
248
#define LINE_INT2                   PAL_LINE(GPIOE, 1U)
249
#define LINE_CS_SPI                 PAL_LINE(GPIOE, 3U)
250
#define LINE_OSC_IN                 PAL_LINE(GPIOH, 0U)
251
#define LINE_OSC_OUT                PAL_LINE(GPIOH, 1U)
252

  
253
/*===========================================================================*/
254
/* Driver pre-compile time settings.                                         */
255
/*===========================================================================*/
256

  
257
/*===========================================================================*/
258
/* Derived constants and error checks.                                       */
259
/*===========================================================================*/
260

  
261
/*===========================================================================*/
262
/* Driver data structures and types.                                         */
263
/*===========================================================================*/
264

  
265
/*===========================================================================*/
266
/* Driver macros.                                                            */
267
/*===========================================================================*/
268

  
269
/*
270
 * I/O ports initial setup, this configuration is established soon after reset
271
 * in the initialization code.
272
 * Please refer to the STM32 Reference Manual for details.
273
 */
274
#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
275
#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
276
#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
277
#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
278
#define PIN_ODR_LOW(n)              (0U << (n))
279
#define PIN_ODR_HIGH(n)             (1U << (n))
280
#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
281
#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
282
#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U))
283
#define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U))
284
#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U))
285
#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U))
286
#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
287
#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
288
#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
289
#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
290

  
291
/*
292
 * GPIOA setup:
293
 *
294
 * PA0  - BUTTON                    (input floating).
295
 * PA1  - PIN1                      (input pullup).
296
 * PA2  - PIN2                      (input pullup).
297
 * PA3  - PIN3                      (input pullup).
298
 * PA4  - LRCK                      (alternate 6).
299
 * PA5  - SPC                       (alternate 5).
300
 * PA6  - SDO                       (alternate 5).
301
 * PA7  - SDI                       (alternate 5).
302
 * PA8  - PIN8                      (input pullup).
303
 * PA9  - VBUS_FS                   (input floating).
304
 * PA10 - OTG_FS_ID                 (alternate 10).
305
 * PA11 - OTG_FS_DM                 (alternate 10).
306
 * PA12 - OTG_FS_DP                 (alternate 10).
307
 * PA13 - SWDIO                     (alternate 0).
308
 * PA14 - SWCLK                     (alternate 0).
309
 * PA15 - PIN15                     (input pullup).
310
 */
311
#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_BUTTON) |         \
312
                                     PIN_MODE_INPUT(GPIOA_PIN1) |           \
313
                                     PIN_MODE_ALTERNATE(GPIOA_PIN2) |       \
314
                                     PIN_MODE_ALTERNATE(GPIOA_PIN3) |       \
315
                                     PIN_MODE_ALTERNATE(GPIOA_LRCK) |       \
316
                                     PIN_MODE_ALTERNATE(GPIOA_SPC) |        \
317
                                     PIN_MODE_ALTERNATE(GPIOA_SDO) |        \
318
                                     PIN_MODE_ALTERNATE(GPIOA_SDI) |        \
319
                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \
320
                                     PIN_MODE_INPUT(GPIOA_VBUS_FS) |        \
321
                                     PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) |  \
322
                                     PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) |  \
323
                                     PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) |  \
324
                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |      \
325
                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
326
                                     PIN_MODE_INPUT(GPIOA_PIN15))
327
#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) |     \
328
                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \
329
                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \
330
                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \
331
                                     PIN_OTYPE_PUSHPULL(GPIOA_LRCK) |       \
332
                                     PIN_OTYPE_PUSHPULL(GPIOA_SPC) |        \
333
                                     PIN_OTYPE_PUSHPULL(GPIOA_SDO) |        \
334
                                     PIN_OTYPE_PUSHPULL(GPIOA_SDI) |        \
335
                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \
336
                                     PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) |    \
337
                                     PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) |  \
338
                                     PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) |  \
339
                                     PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) |  \
340
                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |      \
341
                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
342
                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
343
#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_HIGH(GPIOA_BUTTON) |        \
344
                                     PIN_OSPEED_HIGH(GPIOA_PIN1) |          \
345
                                     PIN_OSPEED_HIGH(GPIOA_PIN2) |          \
346
                                     PIN_OSPEED_HIGH(GPIOA_PIN3) |          \
347
                                     PIN_OSPEED_HIGH(GPIOA_LRCK) |          \
348
                                     PIN_OSPEED_MEDIUM(GPIOA_SPC) |         \
349
                                     PIN_OSPEED_MEDIUM(GPIOA_SDO) |         \
350
                                     PIN_OSPEED_MEDIUM(GPIOA_SDI) |         \
351
                                     PIN_OSPEED_HIGH(GPIOA_PIN8) |          \
352
                                     PIN_OSPEED_HIGH(GPIOA_VBUS_FS) |       \
353
                                     PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) |     \
354
                                     PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) |     \
355
                                     PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) |     \
356
                                     PIN_OSPEED_HIGH(GPIOA_SWDIO) |         \
357
                                     PIN_OSPEED_HIGH(GPIOA_SWCLK) |         \
358
                                     PIN_OSPEED_HIGH(GPIOA_PIN15))
359
#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_BUTTON) |     \
360
                                     PIN_PUPDR_PULLUP(GPIOA_PIN1) |         \
361
                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \
362
                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \
363
                                     PIN_PUPDR_FLOATING(GPIOA_LRCK) |       \
364
                                     PIN_PUPDR_FLOATING(GPIOA_SPC) |        \
365
                                     PIN_PUPDR_FLOATING(GPIOA_SDO) |        \
366
                                     PIN_PUPDR_FLOATING(GPIOA_SDI) |        \
367
                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \
368
                                     PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) |    \
369
                                     PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) |  \
370
                                     PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) |  \
371
                                     PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) |  \
372
                                     PIN_PUPDR_FLOATING(GPIOA_SWDIO) |      \
373
                                     PIN_PUPDR_FLOATING(GPIOA_SWCLK) |      \
374
                                     PIN_PUPDR_PULLUP(GPIOA_PIN15))
375
#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_BUTTON) |           \
376
                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \
377
                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \
378
                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \
379
                                     PIN_ODR_HIGH(GPIOA_LRCK) |             \
380
                                     PIN_ODR_HIGH(GPIOA_SPC) |              \
381
                                     PIN_ODR_HIGH(GPIOA_SDO) |              \
382
                                     PIN_ODR_HIGH(GPIOA_SDI) |              \
383
                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \
384
                                     PIN_ODR_HIGH(GPIOA_VBUS_FS) |          \
385
                                     PIN_ODR_HIGH(GPIOA_OTG_FS_ID) |        \
386
                                     PIN_ODR_HIGH(GPIOA_OTG_FS_DM) |        \
387
                                     PIN_ODR_HIGH(GPIOA_OTG_FS_DP) |        \
388
                                     PIN_ODR_HIGH(GPIOA_SWDIO) |            \
389
                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
390
                                     PIN_ODR_HIGH(GPIOA_PIN15))
391
#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_BUTTON, 0U) |        \
392
                                     PIN_AFIO_AF(GPIOA_PIN1, 0U) |          \
393
                                     PIN_AFIO_AF(GPIOA_PIN2, 7U) |          \
394
                                     PIN_AFIO_AF(GPIOA_PIN3, 7U) |          \
395
                                     PIN_AFIO_AF(GPIOA_LRCK, 6U) |          \
396
                                     PIN_AFIO_AF(GPIOA_SPC, 5U) |           \
397
                                     PIN_AFIO_AF(GPIOA_SDO, 5U) |           \
398
                                     PIN_AFIO_AF(GPIOA_SDI, 5U))
399
#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0U) |          \
400
                                     PIN_AFIO_AF(GPIOA_VBUS_FS, 0U) |       \
401
                                     PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) |    \
402
                                     PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) |    \
403
                                     PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) |    \
404
                                     PIN_AFIO_AF(GPIOA_SWDIO, 0U) |         \
405
                                     PIN_AFIO_AF(GPIOA_SWCLK, 0U) |         \
406
                                     PIN_AFIO_AF(GPIOA_PIN15, 0U))
407

  
408
/*
409
 * GPIOB setup:
410
 *
411
 * PB0  - PIN0                      (input pullup).
412
 * PB1  - PIN1                      (input pullup).
413
 * PB2  - PIN2                      (input pullup).
414
 * PB3  - SWO                       (alternate 0).
415
 * PB4  - PIN4                      (input pullup).
416
 * PB5  - PIN5                      (input pullup).
417
 * PB6  - SCL                       (alternate 4).
418
 * PB7  - PIN7                      (input pullup).
419
 * PB8  - PIN8                      (input pullup).
420
 * PB9  - SDA                       (alternate 4).
421
 * PB10 - CLK_IN                    (input pullup).
422
 * PB11 - PIN11                     (input pullup).
423
 * PB12 - PIN12                     (input pullup).
424
 * PB13 - PIN13                     (input pullup).
425
 * PB14 - PIN14                     (input pullup).
426
 * PB15 - PIN15                     (input pullup).
427
 */
428
#define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \
429
                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \
430
                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \
431
                                     PIN_MODE_ALTERNATE(GPIOB_SWO) |        \
432
                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \
433
                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \
434
                                     PIN_MODE_ALTERNATE(GPIOB_SCL) |        \
435
                                     PIN_MODE_INPUT(GPIOB_PIN7) |           \
436
                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \
437
                                     PIN_MODE_ALTERNATE(GPIOB_SDA) |        \
438
                                     PIN_MODE_INPUT(GPIOB_CLK_IN) |         \
439
                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \
440
                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \
441
                                     PIN_MODE_INPUT(GPIOB_PIN13) |          \
442
                                     PIN_MODE_INPUT(GPIOB_PIN14) |          \
443
                                     PIN_MODE_INPUT(GPIOB_PIN15))
444
#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) |       \
445
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \
446
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \
447
                                     PIN_OTYPE_PUSHPULL(GPIOB_SWO) |        \
448
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \
449
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \
450
                                     PIN_OTYPE_OPENDRAIN(GPIOB_SCL) |       \
451
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \
452
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \
453
                                     PIN_OTYPE_OPENDRAIN(GPIOB_SDA) |       \
454
                                     PIN_OTYPE_PUSHPULL(GPIOB_CLK_IN) |     \
455
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \
456
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \
457
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \
458
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \
459
                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
460
#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_HIGH(GPIOB_PIN0) |          \
461
                                     PIN_OSPEED_HIGH(GPIOB_PIN1) |          \
462
                                     PIN_OSPEED_HIGH(GPIOB_PIN2) |          \
463
                                     PIN_OSPEED_HIGH(GPIOB_SWO) |           \
464
                                     PIN_OSPEED_HIGH(GPIOB_PIN4) |          \
465
                                     PIN_OSPEED_HIGH(GPIOB_PIN5) |          \
466
                                     PIN_OSPEED_HIGH(GPIOB_SCL) |           \
467
                                     PIN_OSPEED_HIGH(GPIOB_PIN7) |          \
468
                                     PIN_OSPEED_HIGH(GPIOB_PIN8) |          \
469
                                     PIN_OSPEED_HIGH(GPIOB_SDA) |           \
470
                                     PIN_OSPEED_HIGH(GPIOB_CLK_IN) |        \
471
                                     PIN_OSPEED_HIGH(GPIOB_PIN11) |         \
472
                                     PIN_OSPEED_HIGH(GPIOB_PIN12) |         \
473
                                     PIN_OSPEED_HIGH(GPIOB_PIN13) |         \
474
                                     PIN_OSPEED_HIGH(GPIOB_PIN14) |         \
475
                                     PIN_OSPEED_HIGH(GPIOB_PIN15))
476
#define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \
477
                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \
478
                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \
479
                                     PIN_PUPDR_FLOATING(GPIOB_SWO) |        \
480
                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \
481
                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \
482
                                     PIN_PUPDR_FLOATING(GPIOB_SCL) |        \
483
                                     PIN_PUPDR_PULLUP(GPIOB_PIN7) |         \
484
                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \
485
                                     PIN_PUPDR_FLOATING(GPIOB_SDA) |        \
486
                                     PIN_PUPDR_PULLUP(GPIOB_CLK_IN) |       \
487
                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \
488
                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \
489
                                     PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \
490
                                     PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \
491
                                     PIN_PUPDR_PULLUP(GPIOB_PIN15))
492
#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_PIN0) |             \
493
                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \
494
                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \
495
                                     PIN_ODR_HIGH(GPIOB_SWO) |              \
496
                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \
497
                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \
498
                                     PIN_ODR_HIGH(GPIOB_SCL) |              \
499
                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \
500
                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \
501
                                     PIN_ODR_HIGH(GPIOB_SDA) |              \
502
                                     PIN_ODR_HIGH(GPIOB_CLK_IN) |           \
... This diff was truncated because it exceeds the maximum size that can be displayed.

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