amiro-os / modules / NUCLEO-L476RG / board.h @ ded1ded7
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/*
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AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2020 Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* Setup for STMicroelectronics STM32 Nucleo64-L476RG board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ST_NUCLEO64_L476RG
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#define BOARD_NAME "STMicroelectronics STM32 Nucleo64-L476RG" |
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/*
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* Board oscillators-related settings.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768U |
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#endif
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#define STM32_LSEDRV (3U << 3U) |
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000U |
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#endif
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#define STM32_HSE_BYPASS
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300U |
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32L476xx
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/*
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* Identifiers for optional peripherals.
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*/
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#define BOARD_MPU6050_CONNECTED true |
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#define BOARD_VL53L1X_CONNECTED true |
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/*
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* IO pins assignments.
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*/
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#define GPIOA_ARD_A0 0U |
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#define GPIOA_ADC12_IN5 0U |
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#define GPIOA_ARD_A1 1U |
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#define GPIOA_ADC12_IN6 1U |
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#define GPIOA_ARD_D1 2U |
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#define GPIOA_USART2_TX 2U |
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#define GPIOA_ARD_D0 3U |
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#define GPIOA_USART2_RX 3U |
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#define GPIOA_ARD_A2 4U |
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#define GPIOA_ADC12_IN9 4U |
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#define GPIOA_ARD_D13 5U |
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#define GPIOA_LED_GREEN 5U |
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#define GPIOA_ARD_D12 6U |
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#define GPIOA_ARD_D11 7U |
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#define GPIOA_ARD_D7 8U |
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#define GPIOA_ARD_D8 9U |
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#define GPIOA_ARD_D2 10U |
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#define GPIOA_PIN11 11U |
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#define GPIOA_PIN12 12U |
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#define GPIOA_SWDIO 13U |
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#define GPIOA_SWCLK 14U |
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#define GPIOA_PIN15 15U |
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#define GPIOB_ARD_A3 0U |
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#define GPIOB_ADC12_IN15 0U |
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#define GPIOB_PIN1 1U |
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#define GPIOB_PIN2 2U |
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#define GPIOB_ARD_D3 3U |
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#define GPIOB_SWO 3U |
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#define GPIOB_ARD_D5 4U |
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#define GPIOB_ARD_D4 5U |
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#define GPIOB_ARD_D10 6U |
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#define GPIOB_PIN7 7U |
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#define GPIOB_ARD_D15 8U |
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#define GPIOB_ARD_D14 9U |
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#define GPIOB_ARD_D6 10U |
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#define GPIOB_PIN11 11U |
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#define GPIOB_PIN12 12U |
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#define GPIOB_PIN13 13U |
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#define GPIOB_PIN14 14U |
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#define GPIOB_PIN15 15U |
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#define GPIOC_ARD_A5 0U |
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#define GPIOC_ADC123_IN1 0U |
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#define GPIOC_ARD_A4 1U |
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#define GPIOC_ADC123_IN2 1U |
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#define GPIOC_PIN2 2U |
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#define GPIOC_PIN3 3U |
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#define GPIOC_PIN4 4U |
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#define GPIOC_PIN5 5U |
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#define GPIOC_PIN6 6U |
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#define GPIOC_ARD_D9 7U |
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#define GPIOC_PIN8 8U |
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#define GPIOC_PIN9 9U |
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#define GPIOC_PIN10 10U |
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#define GPIOC_PIN11 11U |
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#define GPIOC_PIN12 12U |
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#define GPIOC_BUTTON 13U |
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#define GPIOC_OSC32_IN 14U |
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#define GPIOC_OSC32_OUT 15U |
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#define GPIOD_PIN0 0U |
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#define GPIOD_PIN1 1U |
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#define GPIOD_PIN2 2U |
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#define GPIOD_PIN3 3U |
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#define GPIOD_PIN4 4U |
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#define GPIOD_PIN5 5U |
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#define GPIOD_PIN6 6U |
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#define GPIOD_PIN7 7U |
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#define GPIOD_PIN8 8U |
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#define GPIOD_PIN9 9U |
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#define GPIOD_PIN10 10U |
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#define GPIOD_PIN11 11U |
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#define GPIOD_PIN12 12U |
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#define GPIOD_PIN13 13U |
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#define GPIOD_PIN14 14U |
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#define GPIOD_PIN15 15U |
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#define GPIOE_PIN0 0U |
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#define GPIOE_PIN1 1U |
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#define GPIOE_PIN2 2U |
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#define GPIOE_PIN3 3U |
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#define GPIOE_PIN4 4U |
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#define GPIOE_PIN5 5U |
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#define GPIOE_PIN6 6U |
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#define GPIOE_PIN7 7U |
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#define GPIOE_PIN8 8U |
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#define GPIOE_PIN9 9U |
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#define GPIOE_PIN10 10U |
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#define GPIOE_PIN11 11U |
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#define GPIOE_PIN12 12U |
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#define GPIOE_PIN13 13U |
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#define GPIOE_PIN14 14U |
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#define GPIOE_PIN15 15U |
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#define GPIOF_PIN0 0U |
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#define GPIOF_PIN1 1U |
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#define GPIOF_PIN2 2U |
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#define GPIOF_PIN3 3U |
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#define GPIOF_PIN4 4U |
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#define GPIOF_PIN5 5U |
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#define GPIOF_PIN6 6U |
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#define GPIOF_PIN7 7U |
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#define GPIOF_PIN8 8U |
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#define GPIOF_PIN9 9U |
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#define GPIOF_PIN10 10U |
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#define GPIOF_PIN11 11U |
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#define GPIOF_PIN12 12U |
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#define GPIOF_PIN13 13U |
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#define GPIOF_PIN14 14U |
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#define GPIOF_PIN15 15U |
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#define GPIOG_PIN0 0U |
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#define GPIOG_PIN1 1U |
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#define GPIOG_PIN2 2U |
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#define GPIOG_PIN3 3U |
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#define GPIOG_PIN4 4U |
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#define GPIOG_PIN5 5U |
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#define GPIOG_PIN6 6U |
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#define GPIOG_PIN7 7U |
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#define GPIOG_PIN8 8U |
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#define GPIOG_PIN9 9U |
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#define GPIOG_PIN10 10U |
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#define GPIOG_PIN11 11U |
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#define GPIOG_PIN12 12U |
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#define GPIOG_PIN13 13U |
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#define GPIOG_PIN14 14U |
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#define GPIOG_PIN15 15U |
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#define GPIOH_OSC_IN 0U |
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#define GPIOH_OSC_OUT 1U |
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#define GPIOH_PIN2 2U |
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#define GPIOH_PIN3 3U |
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#define GPIOH_PIN4 4U |
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#define GPIOH_PIN5 5U |
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#define GPIOH_PIN6 6U |
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#define GPIOH_PIN7 7U |
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#define GPIOH_PIN8 8U |
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#define GPIOH_PIN9 9U |
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#define GPIOH_PIN10 10U |
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#define GPIOH_PIN11 11U |
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#define GPIOH_PIN12 12U |
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#define GPIOH_PIN13 13U |
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#define GPIOH_PIN14 14U |
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#define GPIOH_PIN15 15U |
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/*
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* IO lines assignments.
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*/
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#define LINE_ARD_A0 PAL_LINE(GPIOA, GPIOA_ARD_A0)
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#define LINE_ADC12_IN5 PAL_LINE(GPIOA, GPIOA_ADC12_IN5)
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#define LINE_ARD_A1 PAL_LINE(GPIOA, GPIOA_ARD_A1)
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#define LINE_ADC12_IN6 PAL_LINE(GPIOA, GPIOA_ADC12_IN6)
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#define LINE_ARD_D1 PAL_LINE(GPIOA, GPIOA_ARD_D1)
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#define LINE_USART2_TX PAL_LINE(GPIOA, GPIOA_USART2_TX)
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#define LINE_ARD_D0 PAL_LINE(GPIOA, GPIOA_ARD_D0)
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#define LINE_USART2_RX PAL_LINE(GPIOA, GPIOA_USART2_RX)
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#define LINE_ARD_A2 PAL_LINE(GPIOA, GPIOA_ARD_A2)
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#define LINE_ADC12_IN9 PAL_LINE(GPIOA, GPIOA_ADC12_IN9)
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#define LINE_ARD_D13 PAL_LINE(GPIOA, GPIOA_ARD_D13)
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#define LINE_LED_GREEN PAL_LINE(GPIOA, GPIOA_LED_GREEN)
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#define LINE_ARD_D12 PAL_LINE(GPIOA, GPIOA_ARD_D12)
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#define LINE_ARD_D11 PAL_LINE(GPIOA, GPIOA_ARD_D11)
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#define LINE_ARD_D7 PAL_LINE(GPIOA, GPIOA_ARD_D7)
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#define LINE_ARD_D8 PAL_LINE(GPIOA, GPIOA_ARD_D8)
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#define LINE_ARD_D2 PAL_LINE(GPIOA, GPIOA_ARD_D2)
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#define LINE_SWDIO PAL_LINE(GPIOA, GPIOA_SWDIO)
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#define LINE_SWCLK PAL_LINE(GPIOA, GPIOA_SWCLK)
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#define LINE_ARD_A3 PAL_LINE(GPIOB, GPIOB_ARD_A3)
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#define LINE_ADC12_IN15 PAL_LINE(GPIOB, GPIOB_ADC12_IN15)
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#define LINE_ARD_D3 PAL_LINE(GPIOB, GPIOB_ARD_D3)
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#define LINE_SWO PAL_LINE(GPIOB, GPIOB_SWO)
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#define LINE_ARD_D5 PAL_LINE(GPIOB, GPIOB_ARD_D5)
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#define LINE_ARD_D4 PAL_LINE(GPIOB, GPIOB_ARD_D4)
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#define LINE_ARD_D10 PAL_LINE(GPIOB, GPIOB_ARD_D10)
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#define LINE_ARD_D15 PAL_LINE(GPIOB, GPIOB_ARD_D15)
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#define LINE_ARD_D14 PAL_LINE(GPIOB, GPIOB_ARD_D14)
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#define LINE_ARD_D6 PAL_LINE(GPIOB, GPIOB_ARD_D6)
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#define LINE_ARD_A5 PAL_LINE(GPIOC, GPIOC_ARD_A5)
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#define LINE_ADC123_IN1 PAL_LINE(GPIOC, GPIOC_ADC123_IN1)
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#define LINE_ARD_A4 PAL_LINE(GPIOC, GPIOC_ARD_A4)
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#define LINE_ADC123_IN2 PAL_LINE(GPIOC, GPIOC_ADC123_IN2)
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#define LINE_ARD_D9 PAL_LINE(GPIOC, GPIOC_ARD_D9)
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#define LINE_BUTTON PAL_LINE(GPIOC, GPIOC_BUTTON)
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#define LINE_OSC32_IN PAL_LINE(GPIOC, GPIOC_OSC32_IN)
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#define LINE_OSC32_OUT PAL_LINE(GPIOC, GPIOC_OSC32_OUT)
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#define LINE_OSC_IN PAL_LINE(GPIOH, GPIOH_OSC_IN)
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#define LINE_OSC_OUT PAL_LINE(GPIOH, GPIOH_OSC_OUT)
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
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#define PIN_ODR_LOW(n) (0U << (n)) |
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#define PIN_ODR_HIGH(n) (1U << (n)) |
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) |
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) |
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) |
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) |
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
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#define PIN_ASCR_DISABLED(n) (0U << (n)) |
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#define PIN_ASCR_ENABLED(n) (1U << (n)) |
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#define PIN_LOCKR_DISABLED(n) (0U << (n)) |
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#define PIN_LOCKR_ENABLED(n) (1U << (n)) |
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/*
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* GPIOA setup:
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*
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* PA0 - ARD_A0 ACD12_IN5 (analog).
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* PA1 - ARD_A1 ACD12_IN6 (analog).
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* PA2 - ARD_D1 USART2_TX (alternate 7).
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* PA3 - ARD_D0 USART2_RX (alternate 7).
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* PA4 - ARD_A2 ACD12_IN9 (analog).
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* PA5 - ARD_D13 LED_GREEN (output pushpull maximum).
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* PA6 - ARD_D12 (analog).
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* PA7 - ARD_D11 (analog).
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* PA8 - ARD_D7 (analog).
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* PA9 - ARD_D8 (analog).
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* PA10 - ARD_D2 (analog).
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* PA11 - PIN11 (analog).
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* PA12 - PIN12 (analog).
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* PA13 - SWDIO (alternate 0).
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* PA14 - SWCLK (alternate 0).
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* PA15 - PIN15 (analog).
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_ARD_A0) | \
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PIN_MODE_ANALOG(GPIOA_ARD_A1) | \ |
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PIN_MODE_ALTERNATE(GPIOA_ARD_D1) | \ |
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PIN_MODE_ALTERNATE(GPIOA_ARD_D0) | \ |
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PIN_MODE_ANALOG(GPIOA_ARD_A2) | \ |
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PIN_MODE_OUTPUT(GPIOA_ARD_D13) | \ |
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PIN_MODE_ANALOG(GPIOA_ARD_D12) | \ |
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PIN_MODE_ANALOG(GPIOA_ARD_D11) | \ |
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PIN_MODE_ANALOG(GPIOA_ARD_D7) | \ |
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PIN_MODE_ANALOG(GPIOA_ARD_D8) | \ |
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PIN_MODE_ANALOG(GPIOA_ARD_D2) | \ |
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PIN_MODE_ANALOG(GPIOA_PIN11) | \ |
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PIN_MODE_ANALOG(GPIOA_PIN12) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ |
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PIN_MODE_ANALOG(GPIOA_PIN15)) |
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D13) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D7) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D8) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) |
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
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PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \ |
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PIN_OSPEED_MEDIUM(GPIOA_ARD_D1) | \ |
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PIN_OSPEED_MEDIUM(GPIOA_ARD_D0) | \ |
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PIN_OSPEED_HIGH(GPIOA_ARD_A2) | \ |
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PIN_OSPEED_HIGH(GPIOA_ARD_D13) | \ |
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PIN_OSPEED_HIGH(GPIOA_ARD_D12) | \ |
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PIN_OSPEED_HIGH(GPIOA_ARD_D11) | \ |
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PIN_OSPEED_HIGH(GPIOA_ARD_D7) | \ |
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PIN_OSPEED_HIGH(GPIOA_ARD_D8) | \ |
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PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \ |
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PIN_OSPEED_HIGH(GPIOA_PIN11) | \ |
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PIN_OSPEED_HIGH(GPIOA_PIN12) | \ |
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PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ |
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PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ |
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PIN_OSPEED_HIGH(GPIOA_PIN15)) |
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_ARD_A0) | \
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PIN_PUPDR_FLOATING(GPIOA_ARD_A1) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D1) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D0) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_A2) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D13) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D12) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D11) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D7) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D8) | \ |
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PIN_PUPDR_FLOATING(GPIOA_ARD_D2) | \ |
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PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ |
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PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ |
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PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ |
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PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ |
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PIN_PUPDR_FLOATING(GPIOA_PIN15)) |
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#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \
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PIN_ODR_HIGH(GPIOA_ARD_A1) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_D1) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_D0) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_A2) | \ |
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PIN_ODR_LOW(GPIOA_ARD_D13) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_D12) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_D11) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_D7) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_D8) | \ |
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PIN_ODR_HIGH(GPIOA_ARD_D2) | \ |
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PIN_ODR_HIGH(GPIOA_PIN11) | \ |
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PIN_ODR_HIGH(GPIOA_PIN12) | \ |
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PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
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PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
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PIN_ODR_HIGH(GPIOA_PIN15)) |
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \ |
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PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \
|
407 |
PIN_AFIO_AF(GPIOA_ARD_D1, 7U) | \
|
408 |
PIN_AFIO_AF(GPIOA_ARD_D0, 7U) | \
|
409 |
PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \
|
410 |
PIN_AFIO_AF(GPIOA_ARD_D13, 0U) | \
|
411 |
PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | \
|
412 |
PIN_AFIO_AF(GPIOA_ARD_D11, 0U))
|
413 |
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D7, 0U) | \ |
414 |
PIN_AFIO_AF(GPIOA_ARD_D8, 0U) | \
|
415 |
PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \
|
416 |
PIN_AFIO_AF(GPIOA_PIN11, 0U) | \
|
417 |
PIN_AFIO_AF(GPIOA_PIN12, 0U) | \
|
418 |
PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
|
419 |
PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
|
420 |
PIN_AFIO_AF(GPIOA_PIN15, 0U))
|
421 |
#define VAL_GPIOA_ASCR (PIN_ASCR_DISABLED(GPIOA_ARD_A0) | \
|
422 |
PIN_ASCR_DISABLED(GPIOA_ARD_A1) | \ |
423 |
PIN_ASCR_DISABLED(GPIOA_ARD_D1) | \ |
424 |
PIN_ASCR_DISABLED(GPIOA_ARD_D0) | \ |
425 |
PIN_ASCR_DISABLED(GPIOA_ARD_A2) | \ |
426 |
PIN_ASCR_DISABLED(GPIOA_ARD_D13) | \ |
427 |
PIN_ASCR_DISABLED(GPIOA_ARD_D12) | \ |
428 |
PIN_ASCR_DISABLED(GPIOA_ARD_D11) | \ |
429 |
PIN_ASCR_DISABLED(GPIOA_ARD_D7) | \ |
430 |
PIN_ASCR_DISABLED(GPIOA_ARD_D8) | \ |
431 |
PIN_ASCR_DISABLED(GPIOA_ARD_D2) | \ |
432 |
PIN_ASCR_DISABLED(GPIOA_PIN11) | \ |
433 |
PIN_ASCR_DISABLED(GPIOA_PIN12) | \ |
434 |
PIN_ASCR_DISABLED(GPIOA_SWDIO) | \ |
435 |
PIN_ASCR_DISABLED(GPIOA_SWCLK) | \ |
436 |
PIN_ASCR_DISABLED(GPIOA_PIN15)) |
437 |
#define VAL_GPIOA_LOCKR (PIN_LOCKR_DISABLED(GPIOA_ARD_A0) | \
|
438 |
PIN_LOCKR_DISABLED(GPIOA_ARD_A1) | \ |
439 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D1) | \ |
440 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D0) | \ |
441 |
PIN_LOCKR_DISABLED(GPIOA_ARD_A2) | \ |
442 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D13) | \ |
443 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D12) | \ |
444 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D11) | \ |
445 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D7) | \ |
446 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D8) | \ |
447 |
PIN_LOCKR_DISABLED(GPIOA_ARD_D2) | \ |
448 |
PIN_LOCKR_DISABLED(GPIOA_PIN11) | \ |
449 |
PIN_LOCKR_DISABLED(GPIOA_PIN12) | \ |
450 |
PIN_LOCKR_DISABLED(GPIOA_SWDIO) | \ |
451 |
PIN_LOCKR_DISABLED(GPIOA_SWCLK) | \ |
452 |
PIN_LOCKR_DISABLED(GPIOA_PIN15)) |
453 |
|
454 |
/*
|
455 |
* GPIOB setup:
|
456 |
*
|
457 |
* PB0 - ARD_A3 ACD12_IN15 (analog).
|
458 |
* PB1 - PIN1 (analog).
|
459 |
* PB2 - PIN2 (analog).
|
460 |
* PB3 - ARD_D3 SWO (analog).
|
461 |
* PB4 - ARD_D5 (analog).
|
462 |
* PB5 - ARD_D4 (analog).
|
463 |
* PB6 - ARD_D10 (analog).
|
464 |
* PB7 - PIN7 (analog).
|
465 |
* PB8 - ARD_D15 (alternate 4).
|
466 |
* PB9 - ARD_D14 (alternate 4).
|
467 |
* PB10 - ARD_D6 (analog).
|
468 |
* PB11 - PIN11 (analog).
|
469 |
* PB12 - PIN12 (analog).
|
470 |
* PB13 - PIN13 (analog).
|
471 |
* PB14 - PIN14 (analog).
|
472 |
* PB15 - PIN15 (analog).
|
473 |
*/
|
474 |
#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_ARD_A3) | \
|
475 |
PIN_MODE_ANALOG(GPIOB_PIN1) | \ |
476 |
PIN_MODE_ANALOG(GPIOB_PIN2) | \ |
477 |
PIN_MODE_ANALOG(GPIOB_ARD_D3) | \ |
478 |
PIN_MODE_ANALOG(GPIOB_ARD_D5) | \ |
479 |
PIN_MODE_ANALOG(GPIOB_ARD_D4) | \ |
480 |
PIN_MODE_ANALOG(GPIOB_ARD_D10) | \ |
481 |
PIN_MODE_ANALOG(GPIOB_PIN7) | \ |
482 |
PIN_MODE_ALTERNATE(GPIOB_ARD_D15) | \ |
483 |
PIN_MODE_ALTERNATE(GPIOB_ARD_D14) | \ |
484 |
PIN_MODE_ANALOG(GPIOB_ARD_D6) | \ |
485 |
PIN_MODE_ANALOG(GPIOB_PIN11) | \ |
486 |
PIN_MODE_ANALOG(GPIOB_PIN12) | \ |
487 |
PIN_MODE_ANALOG(GPIOB_PIN13) | \ |
488 |
PIN_MODE_ANALOG(GPIOB_PIN14) | \ |
489 |
PIN_MODE_ANALOG(GPIOB_PIN15)) |
490 |
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_A3) | \
|
491 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ |
492 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ |
493 |
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \ |
494 |
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \ |
495 |
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \ |
496 |
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D10) | \ |
497 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ |
498 |
PIN_OTYPE_OPENDRAIN(GPIOB_ARD_D15) | \ |
499 |
PIN_OTYPE_OPENDRAIN(GPIOB_ARD_D14) | \ |
500 |
PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \ |
501 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ |
502 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ |
503 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ |
504 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ |
505 |
PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) |
506 |
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_A3) | \
|
507 |
PIN_OSPEED_HIGH(GPIOB_PIN1) | \ |
508 |
PIN_OSPEED_HIGH(GPIOB_PIN2) | \ |
509 |
PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \ |
510 |
PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \ |
511 |
PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \ |
512 |
PIN_OSPEED_HIGH(GPIOB_ARD_D10) | \ |
513 |
PIN_OSPEED_HIGH(GPIOB_PIN7) | \ |
514 |
PIN_OSPEED_HIGH(GPIOB_ARD_D15) | \ |
515 |
PIN_OSPEED_HIGH(GPIOB_ARD_D14) | \ |
516 |
PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \ |
517 |
PIN_OSPEED_HIGH(GPIOB_PIN11) | \ |
518 |
PIN_OSPEED_HIGH(GPIOB_PIN12) | \ |
519 |
PIN_OSPEED_HIGH(GPIOB_PIN13) | \ |
520 |
PIN_OSPEED_HIGH(GPIOB_PIN14) | \ |
521 |
PIN_OSPEED_HIGH(GPIOB_PIN15)) |
522 |
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_ARD_A3) | \
|
523 |
PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ |
524 |
PIN_PUPDR_FLOATING(GPIOB_PIN2) | \ |
525 |
PIN_PUPDR_FLOATING(GPIOB_ARD_D3) | \ |
526 |
PIN_PUPDR_FLOATING(GPIOB_ARD_D5) | \ |
527 |
PIN_PUPDR_FLOATING(GPIOB_ARD_D4) | \ |
528 |
PIN_PUPDR_FLOATING(GPIOB_ARD_D10) | \ |
529 |
PIN_PUPDR_FLOATING(GPIOB_PIN7) | \ |
530 |
PIN_PUPDR_PULLUP(GPIOB_ARD_D15) | \ |
531 |
PIN_PUPDR_PULLUP(GPIOB_ARD_D14) | \ |
532 |
PIN_PUPDR_FLOATING(GPIOB_ARD_D6) | \ |
533 |
PIN_PUPDR_FLOATING(GPIOB_PIN11) | \ |
534 |
PIN_PUPDR_FLOATING(GPIOB_PIN12) | \ |
535 |
PIN_PUPDR_FLOATING(GPIOB_PIN13) | \ |
536 |
PIN_PUPDR_FLOATING(GPIOB_PIN14) | \ |
537 |
PIN_PUPDR_FLOATING(GPIOB_PIN15)) |
538 |
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_A3) | \
|
539 |
PIN_ODR_HIGH(GPIOB_PIN1) | \ |
540 |
PIN_ODR_HIGH(GPIOB_PIN2) | \ |
541 |
PIN_ODR_HIGH(GPIOB_ARD_D3) | \ |
542 |
PIN_ODR_HIGH(GPIOB_ARD_D5) | \ |
543 |
PIN_ODR_HIGH(GPIOB_ARD_D4) | \ |
544 |
PIN_ODR_HIGH(GPIOB_ARD_D10) | \ |
545 |
PIN_ODR_HIGH(GPIOB_PIN7) | \ |
546 |
PIN_ODR_HIGH(GPIOB_ARD_D15) | \ |
547 |
PIN_ODR_HIGH(GPIOB_ARD_D14) | \ |
548 |
PIN_ODR_HIGH(GPIOB_ARD_D6) | \ |
549 |
PIN_ODR_HIGH(GPIOB_PIN11) | \ |
550 |
PIN_ODR_HIGH(GPIOB_PIN12) | \ |
551 |
PIN_ODR_HIGH(GPIOB_PIN13) | \ |
552 |
PIN_ODR_HIGH(GPIOB_PIN14) | \ |
553 |
PIN_ODR_HIGH(GPIOB_PIN15)) |
554 |
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_A3, 0U) | \ |
555 |
PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
|
556 |
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
|
557 |
PIN_AFIO_AF(GPIOB_ARD_D3, 0U) | \
|
558 |
PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | \
|
559 |
PIN_AFIO_AF(GPIOB_ARD_D4, 0U) | \
|
560 |
PIN_AFIO_AF(GPIOB_ARD_D10, 0U) | \
|
561 |
PIN_AFIO_AF(GPIOB_PIN7, 0U))
|
562 |
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 4U) | \ |
563 |
PIN_AFIO_AF(GPIOB_ARD_D14, 4U) | \
|
564 |
PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | \
|
565 |
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
|
566 |
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
|
567 |
PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
|
568 |
PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
|
569 |
PIN_AFIO_AF(GPIOB_PIN15, 0U))
|
570 |
#define VAL_GPIOB_ASCR (PIN_ASCR_DISABLED(GPIOB_ARD_A3) | \
|
571 |
PIN_ASCR_DISABLED(GPIOB_PIN1) | \ |
572 |
PIN_ASCR_DISABLED(GPIOB_PIN2) | \ |
573 |
PIN_ASCR_DISABLED(GPIOB_ARD_D3) | \ |
574 |
PIN_ASCR_DISABLED(GPIOB_ARD_D5) | \ |
575 |
PIN_ASCR_DISABLED(GPIOB_ARD_D4) | \ |
576 |
PIN_ASCR_DISABLED(GPIOB_ARD_D10) | \ |
577 |
PIN_ASCR_DISABLED(GPIOB_PIN7) | \ |
578 |
PIN_ASCR_DISABLED(GPIOB_ARD_D15) | \ |
579 |
PIN_ASCR_DISABLED(GPIOB_ARD_D14) | \ |
580 |
PIN_ASCR_DISABLED(GPIOB_ARD_D6) | \ |
581 |
PIN_ASCR_DISABLED(GPIOB_PIN11) | \ |
582 |
PIN_ASCR_DISABLED(GPIOB_PIN12) | \ |
583 |
PIN_ASCR_DISABLED(GPIOB_PIN13) | \ |
584 |
PIN_ASCR_DISABLED(GPIOB_PIN14) | \ |
585 |
PIN_ASCR_DISABLED(GPIOB_PIN15)) |
586 |
#define VAL_GPIOB_LOCKR (PIN_LOCKR_DISABLED(GPIOB_ARD_A3) | \
|
587 |
PIN_LOCKR_DISABLED(GPIOB_PIN1) | \ |
588 |
PIN_LOCKR_DISABLED(GPIOB_PIN2) | \ |
589 |
PIN_LOCKR_DISABLED(GPIOB_ARD_D3) | \ |
590 |
PIN_LOCKR_DISABLED(GPIOB_ARD_D5) | \ |
591 |
PIN_LOCKR_DISABLED(GPIOB_ARD_D4) | \ |
592 |
PIN_LOCKR_DISABLED(GPIOB_ARD_D10) | \ |
593 |
PIN_LOCKR_DISABLED(GPIOB_PIN7) | \ |
594 |
PIN_LOCKR_DISABLED(GPIOB_ARD_D15) | \ |
595 |
PIN_LOCKR_DISABLED(GPIOB_ARD_D14) | \ |
596 |
PIN_LOCKR_DISABLED(GPIOB_ARD_D6) | \ |
597 |
PIN_LOCKR_DISABLED(GPIOB_PIN11) | \ |
598 |
PIN_LOCKR_DISABLED(GPIOB_PIN12) | \ |
599 |
PIN_LOCKR_DISABLED(GPIOB_PIN13) | \ |
600 |
PIN_LOCKR_DISABLED(GPIOB_PIN14) | \ |
601 |
PIN_LOCKR_DISABLED(GPIOB_PIN15)) |
602 |
|
603 |
/*
|
604 |
* GPIOC setup:
|
605 |
*
|
606 |
* PC0 - ARD_A5 ACD123_IN1 (analog).
|
607 |
* PC1 - ARD_A4 ACD123_IN2 (analog).
|
608 |
* PC2 - PIN2 (analog).
|
609 |
* PC3 - PIN3 (analog).
|
610 |
* PC4 - PIN4 (analog).
|
611 |
* PC5 - PIN5 (analog).
|
612 |
* PC6 - PIN6 (analog).
|
613 |
* PC7 - ARD_D9 (analog).
|
614 |
* PC8 - PIN8 (analog).
|
615 |
* PC9 - PIN9 (analog).
|
616 |
* PC10 - PIN10 (analog).
|
617 |
* PC11 - PIN11 (analog).
|
618 |
* PC12 - PIN12 (analog).
|
619 |
* PC13 - BUTTON (input floating).
|
620 |
* PC14 - OSC32_IN (input floating).
|
621 |
* PC15 - OSC32_OUT (input floating).
|
622 |
*/
|
623 |
#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(GPIOC_ARD_A5) | \
|
624 |
PIN_MODE_ANALOG(GPIOC_ARD_A4) | \ |
625 |
PIN_MODE_ANALOG(GPIOC_PIN2) | \ |
626 |
PIN_MODE_ANALOG(GPIOC_PIN3) | \ |
627 |
PIN_MODE_ANALOG(GPIOC_PIN4) | \ |
628 |
PIN_MODE_ANALOG(GPIOC_PIN5) | \ |
629 |
PIN_MODE_ANALOG(GPIOC_PIN6) | \ |
630 |
PIN_MODE_ANALOG(GPIOC_ARD_D9) | \ |
631 |
PIN_MODE_ANALOG(GPIOC_PIN8) | \ |
632 |
PIN_MODE_ANALOG(GPIOC_PIN9) | \ |
633 |
PIN_MODE_ANALOG(GPIOC_PIN10) | \ |
634 |
PIN_MODE_ANALOG(GPIOC_PIN11) | \ |
635 |
PIN_MODE_ANALOG(GPIOC_PIN12) | \ |
636 |
PIN_MODE_INPUT(GPIOC_BUTTON) | \ |
637 |
PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ |
638 |
PIN_MODE_INPUT(GPIOC_OSC32_OUT)) |
639 |
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A5) | \
|
640 |
PIN_OTYPE_PUSHPULL(GPIOC_ARD_A4) | \ |
641 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ |
642 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ |
643 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ |
644 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ |
645 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ |
646 |
PIN_OTYPE_PUSHPULL(GPIOC_ARD_D9) | \ |
647 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ |
648 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ |
649 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ |
650 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ |
651 |
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ |
652 |
PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \ |
653 |
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ |
654 |
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) |
655 |
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_ARD_A5) | \
|
656 |
PIN_OSPEED_HIGH(GPIOC_ARD_A4) | \ |
657 |
PIN_OSPEED_HIGH(GPIOC_PIN2) | \ |
658 |
PIN_OSPEED_HIGH(GPIOC_PIN3) | \ |
659 |
PIN_OSPEED_HIGH(GPIOC_PIN4) | \ |
660 |
PIN_OSPEED_HIGH(GPIOC_PIN5) | \ |
661 |
PIN_OSPEED_HIGH(GPIOC_PIN6) | \ |
662 |
PIN_OSPEED_HIGH(GPIOC_ARD_D9) | \ |
663 |
PIN_OSPEED_HIGH(GPIOC_PIN8) | \ |
664 |
PIN_OSPEED_HIGH(GPIOC_PIN9) | \ |
665 |
PIN_OSPEED_HIGH(GPIOC_PIN10) | \ |
666 |
PIN_OSPEED_HIGH(GPIOC_PIN11) | \ |
667 |
PIN_OSPEED_HIGH(GPIOC_PIN12) | \ |
668 |
PIN_OSPEED_HIGH(GPIOC_BUTTON) | \ |
669 |
PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ |
670 |
PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) |
671 |
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_ARD_A5) | \
|
672 |
PIN_PUPDR_FLOATING(GPIOC_ARD_A4) | \ |
673 |
PIN_PUPDR_FLOATING(GPIOC_PIN2) | \ |
674 |
PIN_PUPDR_FLOATING(GPIOC_PIN3) | \ |
675 |
PIN_PUPDR_FLOATING(GPIOC_PIN4) | \ |
676 |
PIN_PUPDR_FLOATING(GPIOC_PIN5) | \ |
677 |
PIN_PUPDR_FLOATING(GPIOC_PIN6) | \ |
678 |
PIN_PUPDR_FLOATING(GPIOC_ARD_D9) | \ |
679 |
PIN_PUPDR_FLOATING(GPIOC_PIN8) | \ |
680 |
PIN_PUPDR_FLOATING(GPIOC_PIN9) | \ |
681 |
PIN_PUPDR_FLOATING(GPIOC_PIN10) | \ |
682 |
PIN_PUPDR_FLOATING(GPIOC_PIN11) | \ |
683 |
PIN_PUPDR_FLOATING(GPIOC_PIN12) | \ |
684 |
PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \ |
685 |
PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ |
686 |
PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) |
687 |
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_ARD_A5) | \
|
688 |
PIN_ODR_HIGH(GPIOC_ARD_A4) | \ |
689 |
PIN_ODR_HIGH(GPIOC_PIN2) | \ |
690 |
PIN_ODR_HIGH(GPIOC_PIN3) | \ |
691 |
PIN_ODR_HIGH(GPIOC_PIN4) | \ |
692 |
PIN_ODR_HIGH(GPIOC_PIN5) | \ |
693 |
PIN_ODR_HIGH(GPIOC_PIN6) | \ |
694 |
PIN_ODR_HIGH(GPIOC_ARD_D9) | \ |
695 |
PIN_ODR_HIGH(GPIOC_PIN8) | \ |
696 |
PIN_ODR_HIGH(GPIOC_PIN9) | \ |
697 |
PIN_ODR_HIGH(GPIOC_PIN10) | \ |
698 |
PIN_ODR_HIGH(GPIOC_PIN11) | \ |
699 |
PIN_ODR_HIGH(GPIOC_PIN12) | \ |
700 |
PIN_ODR_HIGH(GPIOC_BUTTON) | \ |
701 |
PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ |
702 |
PIN_ODR_HIGH(GPIOC_OSC32_OUT)) |
703 |
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ARD_A5, 0U) | \ |
704 |
PIN_AFIO_AF(GPIOC_ARD_A4, 0U) | \
|
705 |
PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
|
706 |
PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
|
707 |
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
|
708 |
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
|
709 |
PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
|
710 |
PIN_AFIO_AF(GPIOC_ARD_D9, 0U))
|
711 |
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ |
712 |
PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
|
713 |
PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
|
714 |
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
|
715 |
PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
|
716 |
PIN_AFIO_AF(GPIOC_BUTTON, 0U) | \
|
717 |
PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
|
718 |
PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
|
719 |
#define VAL_GPIOC_ASCR (PIN_ASCR_DISABLED(GPIOC_ARD_A5) | \
|
720 |
PIN_ASCR_DISABLED(GPIOC_ARD_A4) | \ |
721 |
PIN_ASCR_DISABLED(GPIOC_PIN2) | \ |
722 |
PIN_ASCR_DISABLED(GPIOC_PIN3) | \ |
723 |
PIN_ASCR_DISABLED(GPIOC_PIN4) | \ |
724 |
PIN_ASCR_DISABLED(GPIOC_PIN5) | \ |
725 |
PIN_ASCR_DISABLED(GPIOC_PIN6) | \ |
726 |
PIN_ASCR_DISABLED(GPIOC_ARD_D9) | \ |
727 |
PIN_ASCR_DISABLED(GPIOC_PIN8) | \ |
728 |
PIN_ASCR_DISABLED(GPIOC_PIN9) | \ |
729 |
PIN_ASCR_DISABLED(GPIOC_PIN10) | \ |
730 |
PIN_ASCR_DISABLED(GPIOC_PIN11) | \ |
731 |
PIN_ASCR_DISABLED(GPIOC_PIN12) | \ |
732 |
PIN_ASCR_DISABLED(GPIOC_BUTTON) | \ |
733 |
PIN_ASCR_DISABLED(GPIOC_OSC32_IN) | \ |
734 |
PIN_ASCR_DISABLED(GPIOC_OSC32_OUT)) |
735 |
#define VAL_GPIOC_LOCKR (PIN_LOCKR_DISABLED(GPIOC_ARD_A5) | \
|
736 |
PIN_LOCKR_DISABLED(GPIOC_ARD_A4) | \ |
737 |
PIN_LOCKR_DISABLED(GPIOC_PIN2) | \ |
738 |
PIN_LOCKR_DISABLED(GPIOC_PIN3) | \ |
739 |
PIN_LOCKR_DISABLED(GPIOC_PIN4) | \ |
740 |
PIN_LOCKR_DISABLED(GPIOC_PIN5) | \ |
741 |
PIN_LOCKR_DISABLED(GPIOC_PIN6) | \ |
742 |
PIN_LOCKR_DISABLED(GPIOC_ARD_D9) | \ |
743 |
PIN_LOCKR_DISABLED(GPIOC_PIN8) | \ |
744 |
PIN_LOCKR_DISABLED(GPIOC_PIN9) | \ |
745 |
PIN_LOCKR_DISABLED(GPIOC_PIN10) | \ |
746 |
PIN_LOCKR_DISABLED(GPIOC_PIN11) | \ |
747 |
PIN_LOCKR_DISABLED(GPIOC_PIN12) | \ |
748 |
PIN_LOCKR_DISABLED(GPIOC_BUTTON) | \ |
749 |
PIN_LOCKR_DISABLED(GPIOC_OSC32_IN) | \ |
750 |
PIN_LOCKR_DISABLED(GPIOC_OSC32_OUT)) |
751 |
|
752 |
/*
|
753 |
* GPIOD setup:
|
754 |
*
|
755 |
* PD0 - PIN0 (analog).
|
756 |
* PD1 - PIN1 (analog).
|
757 |
* PD2 - PIN2 (analog).
|
758 |
* PD3 - PIN3 (analog).
|
759 |
* PD4 - PIN4 (analog).
|
760 |
* PD5 - PIN5 (analog).
|
761 |
* PD6 - PIN6 (analog).
|
762 |
* PD7 - PIN7 (analog).
|
763 |
* PD8 - PIN8 (analog).
|
764 |
* PD9 - PIN9 (analog).
|
765 |
* PD10 - PIN10 (analog).
|
766 |
* PD11 - PIN11 (analog).
|
767 |
* PD12 - PIN12 (analog).
|
768 |
* PD13 - PIN13 (analog).
|
769 |
* PD14 - PIN14 (analog).
|
770 |
* PD15 - PIN15 (analog).
|
771 |
*/
|
772 |
#define VAL_GPIOD_MODER (PIN_MODE_ANALOG(GPIOD_PIN0) | \
|
773 |
PIN_MODE_ANALOG(GPIOD_PIN1) | \ |
774 |
PIN_MODE_ANALOG(GPIOD_PIN2) | \ |
775 |
PIN_MODE_ANALOG(GPIOD_PIN3) | \ |
776 |
PIN_MODE_ANALOG(GPIOD_PIN4) | \ |
777 |
PIN_MODE_ANALOG(GPIOD_PIN5) | \ |
778 |
PIN_MODE_ANALOG(GPIOD_PIN6) | \ |
779 |
PIN_MODE_ANALOG(GPIOD_PIN7) | \ |
780 |
PIN_MODE_ANALOG(GPIOD_PIN8) | \ |
781 |
PIN_MODE_ANALOG(GPIOD_PIN9) | \ |
782 |
PIN_MODE_ANALOG(GPIOD_PIN10) | \ |
783 |
PIN_MODE_ANALOG(GPIOD_PIN11) | \ |
784 |
PIN_MODE_ANALOG(GPIOD_PIN12) | \ |
785 |
PIN_MODE_ANALOG(GPIOD_PIN13) | \ |
786 |
PIN_MODE_ANALOG(GPIOD_PIN14) | \ |
787 |
PIN_MODE_ANALOG(GPIOD_PIN15)) |
788 |
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
789 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ |
790 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ |
791 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ |
792 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ |
793 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ |
794 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ |
795 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ |
796 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ |
797 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ |
798 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ |
799 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ |
800 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ |
801 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ |
802 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ |
803 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) |
804 |
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
|
805 |
PIN_OSPEED_HIGH(GPIOD_PIN1) | \ |
806 |
PIN_OSPEED_HIGH(GPIOD_PIN2) | \ |
807 |
PIN_OSPEED_HIGH(GPIOD_PIN3) | \ |
808 |
PIN_OSPEED_HIGH(GPIOD_PIN4) | \ |
809 |
PIN_OSPEED_HIGH(GPIOD_PIN5) | \ |
810 |
PIN_OSPEED_HIGH(GPIOD_PIN6) | \ |
811 |
PIN_OSPEED_HIGH(GPIOD_PIN7) | \ |
812 |
PIN_OSPEED_HIGH(GPIOD_PIN8) | \ |
813 |
PIN_OSPEED_HIGH(GPIOD_PIN9) | \ |
814 |
PIN_OSPEED_HIGH(GPIOD_PIN10) | \ |
815 |
PIN_OSPEED_HIGH(GPIOD_PIN11) | \ |
816 |
PIN_OSPEED_HIGH(GPIOD_PIN12) | \ |
817 |
PIN_OSPEED_HIGH(GPIOD_PIN13) | \ |
818 |
PIN_OSPEED_HIGH(GPIOD_PIN14) | \ |
819 |
PIN_OSPEED_HIGH(GPIOD_PIN15)) |
820 |
#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_PIN0) | \
|
821 |
PIN_PUPDR_FLOATING(GPIOD_PIN1) | \ |
822 |
PIN_PUPDR_FLOATING(GPIOD_PIN2) | \ |
823 |
PIN_PUPDR_FLOATING(GPIOD_PIN3) | \ |
824 |
PIN_PUPDR_FLOATING(GPIOD_PIN4) | \ |
825 |
PIN_PUPDR_FLOATING(GPIOD_PIN5) | \ |
826 |
PIN_PUPDR_FLOATING(GPIOD_PIN6) | \ |
827 |
PIN_PUPDR_FLOATING(GPIOD_PIN7) | \ |
828 |
PIN_PUPDR_FLOATING(GPIOD_PIN8) | \ |
829 |
PIN_PUPDR_FLOATING(GPIOD_PIN9) | \ |
830 |
PIN_PUPDR_FLOATING(GPIOD_PIN10) | \ |
831 |
PIN_PUPDR_FLOATING(GPIOD_PIN11) | \ |
832 |
PIN_PUPDR_FLOATING(GPIOD_PIN12) | \ |
833 |
PIN_PUPDR_FLOATING(GPIOD_PIN13) | \ |
834 |
PIN_PUPDR_FLOATING(GPIOD_PIN14) | \ |
835 |
PIN_PUPDR_FLOATING(GPIOD_PIN15)) |
836 |
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
837 |
PIN_ODR_HIGH(GPIOD_PIN1) | \ |
838 |
PIN_ODR_HIGH(GPIOD_PIN2) | \ |
839 |
PIN_ODR_HIGH(GPIOD_PIN3) | \ |
840 |
PIN_ODR_HIGH(GPIOD_PIN4) | \ |
841 |
PIN_ODR_HIGH(GPIOD_PIN5) | \ |
842 |
PIN_ODR_HIGH(GPIOD_PIN6) | \ |
843 |
PIN_ODR_HIGH(GPIOD_PIN7) | \ |
844 |
PIN_ODR_HIGH(GPIOD_PIN8) | \ |
845 |
PIN_ODR_HIGH(GPIOD_PIN9) | \ |
846 |
PIN_ODR_HIGH(GPIOD_PIN10) | \ |
847 |
PIN_ODR_HIGH(GPIOD_PIN11) | \ |
848 |
PIN_ODR_HIGH(GPIOD_PIN12) | \ |
849 |
PIN_ODR_HIGH(GPIOD_PIN13) | \ |
850 |
PIN_ODR_HIGH(GPIOD_PIN14) | \ |
851 |
PIN_ODR_HIGH(GPIOD_PIN15)) |
852 |
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ |
853 |
PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
|
854 |
PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
|
855 |
PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
|
856 |
PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
|
857 |
PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
|
858 |
PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
|
859 |
PIN_AFIO_AF(GPIOD_PIN7, 0U))
|
860 |
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ |
861 |
PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
|
862 |
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
|
863 |
PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
|
864 |
PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
|
865 |
PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
|
866 |
PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
|
867 |
PIN_AFIO_AF(GPIOD_PIN15, 0U))
|
868 |
#define VAL_GPIOD_ASCR (PIN_ASCR_DISABLED(GPIOD_PIN0) | \
|
869 |
PIN_ASCR_DISABLED(GPIOD_PIN1) | \ |
870 |
PIN_ASCR_DISABLED(GPIOD_PIN2) | \ |
871 |
PIN_ASCR_DISABLED(GPIOD_PIN3) | \ |
872 |
PIN_ASCR_DISABLED(GPIOD_PIN4) | \ |
873 |
PIN_ASCR_DISABLED(GPIOD_PIN5) | \ |
874 |
PIN_ASCR_DISABLED(GPIOD_PIN6) | \ |
875 |
PIN_ASCR_DISABLED(GPIOD_PIN7) | \ |
876 |
PIN_ASCR_DISABLED(GPIOD_PIN8) | \ |
877 |
PIN_ASCR_DISABLED(GPIOD_PIN9) | \ |
878 |
PIN_ASCR_DISABLED(GPIOD_PIN10) | \ |
879 |
PIN_ASCR_DISABLED(GPIOD_PIN11) | \ |
880 |
PIN_ASCR_DISABLED(GPIOD_PIN12) | \ |
881 |
PIN_ASCR_DISABLED(GPIOD_PIN13) | \ |
882 |
PIN_ASCR_DISABLED(GPIOD_PIN14) | \ |
883 |
PIN_ASCR_DISABLED(GPIOD_PIN15)) |
884 |
#define VAL_GPIOD_LOCKR (PIN_LOCKR_DISABLED(GPIOD_PIN0) | \
|
885 |
PIN_LOCKR_DISABLED(GPIOD_PIN1) | \ |
886 |
PIN_LOCKR_DISABLED(GPIOD_PIN2) | \ |
887 |
PIN_LOCKR_DISABLED(GPIOD_PIN3) | \ |
888 |
PIN_LOCKR_DISABLED(GPIOD_PIN4) | \ |
889 |
PIN_LOCKR_DISABLED(GPIOD_PIN5) | \ |
890 |
PIN_LOCKR_DISABLED(GPIOD_PIN6) | \ |
891 |
PIN_LOCKR_DISABLED(GPIOD_PIN7) | \ |
892 |
PIN_LOCKR_DISABLED(GPIOD_PIN8) | \ |
893 |
PIN_LOCKR_DISABLED(GPIOD_PIN9) | \ |
894 |
PIN_LOCKR_DISABLED(GPIOD_PIN10) | \ |
895 |
PIN_LOCKR_DISABLED(GPIOD_PIN11) | \ |
896 |
PIN_LOCKR_DISABLED(GPIOD_PIN12) | \ |
897 |
PIN_LOCKR_DISABLED(GPIOD_PIN13) | \ |
898 |
PIN_LOCKR_DISABLED(GPIOD_PIN14) | \ |
899 |
PIN_LOCKR_DISABLED(GPIOD_PIN15)) |
900 |
|
901 |
/*
|
902 |
* GPIOE setup:
|
903 |
*
|
904 |
* PE0 - PIN0 (analog).
|
905 |
* PE1 - PIN1 (analog).
|
906 |
* PE2 - PIN2 (analog).
|
907 |
* PE3 - PIN3 (analog).
|
908 |
* PE4 - PIN4 (analog).
|
909 |
* PE5 - PIN5 (analog).
|
910 |
* PE6 - PIN6 (analog).
|
911 |
* PE7 - PIN7 (analog).
|
912 |
* PE8 - PIN8 (analog).
|
913 |
* PE9 - PIN9 (analog).
|
914 |
* PE10 - PIN10 (analog).
|
915 |
* PE11 - PIN11 (analog).
|
916 |
* PE12 - PIN12 (analog).
|
917 |
* PE13 - PIN13 (analog).
|
918 |
* PE14 - PIN14 (analog).
|
919 |
* PE15 - PIN15 (analog).
|
920 |
*/
|
921 |
#define VAL_GPIOE_MODER (PIN_MODE_ANALOG(GPIOE_PIN0) | \
|
922 |
PIN_MODE_ANALOG(GPIOE_PIN1) | \ |
923 |
PIN_MODE_ANALOG(GPIOE_PIN2) | \ |
924 |
PIN_MODE_ANALOG(GPIOE_PIN3) | \ |
925 |
PIN_MODE_ANALOG(GPIOE_PIN4) | \ |
926 |
PIN_MODE_ANALOG(GPIOE_PIN5) | \ |
927 |
PIN_MODE_ANALOG(GPIOE_PIN6) | \ |
928 |
PIN_MODE_ANALOG(GPIOE_PIN7) | \ |
929 |
PIN_MODE_ANALOG(GPIOE_PIN8) | \ |
930 |
PIN_MODE_ANALOG(GPIOE_PIN9) | \ |
931 |
PIN_MODE_ANALOG(GPIOE_PIN10) | \ |
932 |
PIN_MODE_ANALOG(GPIOE_PIN11) | \ |
933 |
PIN_MODE_ANALOG(GPIOE_PIN12) | \ |
934 |
PIN_MODE_ANALOG(GPIOE_PIN13) | \ |
935 |
PIN_MODE_ANALOG(GPIOE_PIN14) | \ |
936 |
PIN_MODE_ANALOG(GPIOE_PIN15)) |
937 |
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
|
938 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ |
939 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ |
940 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ |
941 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ |
942 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ |
943 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ |
944 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ |
945 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ |
946 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ |
947 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ |
948 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ |
949 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ |
950 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ |
951 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ |
952 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) |
953 |
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
|
954 |
PIN_OSPEED_HIGH(GPIOE_PIN1) | \ |
955 |
PIN_OSPEED_HIGH(GPIOE_PIN2) | \ |
956 |
PIN_OSPEED_HIGH(GPIOE_PIN3) | \ |
957 |
PIN_OSPEED_HIGH(GPIOE_PIN4) | \ |
958 |
PIN_OSPEED_HIGH(GPIOE_PIN5) | \ |
959 |
PIN_OSPEED_HIGH(GPIOE_PIN6) | \ |
960 |
PIN_OSPEED_HIGH(GPIOE_PIN7) | \ |
961 |
PIN_OSPEED_HIGH(GPIOE_PIN8) | \ |
962 |
PIN_OSPEED_HIGH(GPIOE_PIN9) | \ |
963 |
PIN_OSPEED_HIGH(GPIOE_PIN10) | \ |
964 |
PIN_OSPEED_HIGH(GPIOE_PIN11) | \ |
965 |
PIN_OSPEED_HIGH(GPIOE_PIN12) | \ |
966 |
PIN_OSPEED_HIGH(GPIOE_PIN13) | \ |
967 |
PIN_OSPEED_HIGH(GPIOE_PIN14) | \ |
968 |
PIN_OSPEED_HIGH(GPIOE_PIN15)) |
969 |
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \
|
970 |
PIN_PUPDR_FLOATING(GPIOE_PIN1) | \ |
971 |
PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ |
972 |
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ |
973 |
PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ |
974 |
PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ |
975 |
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ |
976 |
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ |
977 |
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ |
978 |
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ |
979 |
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ |
980 |
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ |
981 |
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ |
982 |
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ |
983 |
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ |
984 |
PIN_PUPDR_FLOATING(GPIOE_PIN15)) |
985 |
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
|
986 |
PIN_ODR_HIGH(GPIOE_PIN1) | \ |
987 |
PIN_ODR_HIGH(GPIOE_PIN2) | \ |
988 |
PIN_ODR_HIGH(GPIOE_PIN3) | \ |
989 |
PIN_ODR_HIGH(GPIOE_PIN4) | \ |
990 |
PIN_ODR_HIGH(GPIOE_PIN5) | \ |
991 |
PIN_ODR_HIGH(GPIOE_PIN6) | \ |
992 |
PIN_ODR_HIGH(GPIOE_PIN7) | \ |
993 |
PIN_ODR_HIGH(GPIOE_PIN8) | \ |
994 |
PIN_ODR_HIGH(GPIOE_PIN9) | \ |
995 |
PIN_ODR_HIGH(GPIOE_PIN10) | \ |
996 |
PIN_ODR_HIGH(GPIOE_PIN11) | \ |
997 |
PIN_ODR_HIGH(GPIOE_PIN12) | \ |
998 |
PIN_ODR_HIGH(GPIOE_PIN13) | \ |
999 |
PIN_ODR_HIGH(GPIOE_PIN14) | \ |
1000 |
PIN_ODR_HIGH(GPIOE_PIN15)) |
1001 |
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ |
1002 |
PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
|
1003 |
PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
|
1004 |
PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
|
1005 |
PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
|
1006 |
PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
|
1007 |
PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
|
1008 |
PIN_AFIO_AF(GPIOE_PIN7, 0U))
|
1009 |
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ |
1010 |
PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
|
1011 |
PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
|
1012 |
PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
|
1013 |
PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
|
1014 |
PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
|
1015 |
PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
|
1016 |
PIN_AFIO_AF(GPIOE_PIN15, 0U))
|
1017 |
#define VAL_GPIOE_ASCR (PIN_ASCR_DISABLED(GPIOE_PIN0) | \
|
1018 |
PIN_ASCR_DISABLED(GPIOE_PIN1) | \ |
1019 |
PIN_ASCR_DISABLED(GPIOE_PIN2) | \ |
1020 |
PIN_ASCR_DISABLED(GPIOE_PIN3) | \ |
1021 |
PIN_ASCR_DISABLED(GPIOE_PIN4) | \ |
1022 |
PIN_ASCR_DISABLED(GPIOE_PIN5) | \ |
1023 |
PIN_ASCR_DISABLED(GPIOE_PIN6) | \ |
1024 |
PIN_ASCR_DISABLED(GPIOE_PIN7) | \ |
1025 |
PIN_ASCR_DISABLED(GPIOE_PIN8) | \ |
1026 |
PIN_ASCR_DISABLED(GPIOE_PIN9) | \ |
1027 |
PIN_ASCR_DISABLED(GPIOE_PIN10) | \ |
1028 |
PIN_ASCR_DISABLED(GPIOE_PIN11) | \ |
1029 |
PIN_ASCR_DISABLED(GPIOE_PIN12) | \ |
1030 |
PIN_ASCR_DISABLED(GPIOE_PIN13) | \ |
1031 |
PIN_ASCR_DISABLED(GPIOE_PIN14) | \ |
1032 |
PIN_ASCR_DISABLED(GPIOE_PIN15)) |
1033 |
#define VAL_GPIOE_LOCKR (PIN_LOCKR_DISABLED(GPIOE_PIN0) | \
|
1034 |
PIN_LOCKR_DISABLED(GPIOE_PIN1) | \ |
1035 |
PIN_LOCKR_DISABLED(GPIOE_PIN2) | \ |
1036 |
PIN_LOCKR_DISABLED(GPIOE_PIN3) | \ |
1037 |
PIN_LOCKR_DISABLED(GPIOE_PIN4) | \ |
1038 |
PIN_LOCKR_DISABLED(GPIOE_PIN5) | \ |
1039 |
PIN_LOCKR_DISABLED(GPIOE_PIN6) | \ |
1040 |
PIN_LOCKR_DISABLED(GPIOE_PIN7) | \ |
1041 |
PIN_LOCKR_DISABLED(GPIOE_PIN8) | \ |
1042 |
PIN_LOCKR_DISABLED(GPIOE_PIN9) | \ |
1043 |
PIN_LOCKR_DISABLED(GPIOE_PIN10) | \ |
1044 |
PIN_LOCKR_DISABLED(GPIOE_PIN11) | \ |
1045 |
PIN_LOCKR_DISABLED(GPIOE_PIN12) | \ |
1046 |
PIN_LOCKR_DISABLED(GPIOE_PIN13) | \ |
1047 |
PIN_LOCKR_DISABLED(GPIOE_PIN14) | \ |
1048 |
PIN_LOCKR_DISABLED(GPIOE_PIN15)) |
1049 |
|
1050 |
/*
|
1051 |
* GPIOF setup:
|
1052 |
*
|
1053 |
* PF0 - PIN0 (analog).
|
1054 |
* PF1 - PIN1 (analog).
|
1055 |
* PF2 - PIN2 (analog).
|
1056 |
* PF3 - PIN3 (analog).
|
1057 |
* PF4 - PIN4 (analog).
|
1058 |
* PF5 - PIN5 (analog).
|
1059 |
* PF6 - PIN6 (analog).
|
1060 |
* PF7 - PIN7 (analog).
|
1061 |
* PF8 - PIN8 (analog).
|
1062 |
* PF9 - PIN9 (analog).
|
1063 |
* PF10 - PIN10 (analog).
|
1064 |
* PF11 - PIN11 (analog).
|
1065 |
* PF12 - PIN12 (analog).
|
1066 |
* PF13 - PIN13 (analog).
|
1067 |
* PF14 - PIN14 (analog).
|
1068 |
* PF15 - PIN15 (analog).
|
1069 |
*/
|
1070 |
#define VAL_GPIOF_MODER (PIN_MODE_ANALOG(GPIOF_PIN0) | \
|
1071 |
PIN_MODE_ANALOG(GPIOF_PIN1) | \ |
1072 |
PIN_MODE_ANALOG(GPIOF_PIN2) | \ |
1073 |
PIN_MODE_ANALOG(GPIOF_PIN3) | \ |
1074 |
PIN_MODE_ANALOG(GPIOF_PIN4) | \ |
1075 |
PIN_MODE_ANALOG(GPIOF_PIN5) | \ |
1076 |
PIN_MODE_ANALOG(GPIOF_PIN6) | \ |
1077 |
PIN_MODE_ANALOG(GPIOF_PIN7) | \ |
1078 |
PIN_MODE_ANALOG(GPIOF_PIN8) | \ |
1079 |
PIN_MODE_ANALOG(GPIOF_PIN9) | \ |
1080 |
PIN_MODE_ANALOG(GPIOF_PIN10) | \ |
1081 |
PIN_MODE_ANALOG(GPIOF_PIN11) | \ |
1082 |
PIN_MODE_ANALOG(GPIOF_PIN12) | \ |
1083 |
PIN_MODE_ANALOG(GPIOF_PIN13) | \ |
1084 |
PIN_MODE_ANALOG(GPIOF_PIN14) | \ |
1085 |
PIN_MODE_ANALOG(GPIOF_PIN15)) |
1086 |
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
|
1087 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ |
1088 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ |
1089 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ |
1090 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ |
1091 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ |
1092 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ |
1093 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ |
1094 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ |
1095 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ |
1096 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ |
1097 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ |
1098 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ |
1099 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ |
1100 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ |
1101 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) |
1102 |
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \
|
1103 |
PIN_OSPEED_HIGH(GPIOF_PIN1) | \ |
1104 |
PIN_OSPEED_HIGH(GPIOF_PIN2) | \ |
1105 |
PIN_OSPEED_HIGH(GPIOF_PIN3) | \ |
1106 |
PIN_OSPEED_HIGH(GPIOF_PIN4) | \ |
1107 |
PIN_OSPEED_HIGH(GPIOF_PIN5) | \ |
1108 |
PIN_OSPEED_HIGH(GPIOF_PIN6) | \ |
1109 |
PIN_OSPEED_HIGH(GPIOF_PIN7) | \ |
1110 |
PIN_OSPEED_HIGH(GPIOF_PIN8) | \ |
1111 |
PIN_OSPEED_HIGH(GPIOF_PIN9) | \ |
1112 |
PIN_OSPEED_HIGH(GPIOF_PIN10) | \ |
1113 |
PIN_OSPEED_HIGH(GPIOF_PIN11) | \ |
1114 |
PIN_OSPEED_HIGH(GPIOF_PIN12) | \ |
1115 |
PIN_OSPEED_HIGH(GPIOF_PIN13) | \ |
1116 |
PIN_OSPEED_HIGH(GPIOF_PIN14) | \ |
1117 |
PIN_OSPEED_HIGH(GPIOF_PIN15)) |
1118 |
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \
|
1119 |
PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ |
1120 |
PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ |
1121 |
PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ |
1122 |
PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ |
1123 |
PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ |
1124 |
PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ |
1125 |
PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ |
1126 |
PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ |
1127 |
PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ |
1128 |
PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ |
1129 |
PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ |
1130 |
PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ |
1131 |
PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ |
1132 |
PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ |
1133 |
PIN_PUPDR_FLOATING(GPIOF_PIN15)) |
1134 |
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \
|
1135 |
PIN_ODR_HIGH(GPIOF_PIN1) | \ |
1136 |
PIN_ODR_HIGH(GPIOF_PIN2) | \ |
1137 |
PIN_ODR_HIGH(GPIOF_PIN3) | \ |
1138 |
PIN_ODR_HIGH(GPIOF_PIN4) | \ |
1139 |
PIN_ODR_HIGH(GPIOF_PIN5) | \ |
1140 |
PIN_ODR_HIGH(GPIOF_PIN6) | \ |
1141 |
PIN_ODR_HIGH(GPIOF_PIN7) | \ |
1142 |
PIN_ODR_HIGH(GPIOF_PIN8) | \ |
1143 |
PIN_ODR_HIGH(GPIOF_PIN9) | \ |
1144 |
PIN_ODR_HIGH(GPIOF_PIN10) | \ |
1145 |
PIN_ODR_HIGH(GPIOF_PIN11) | \ |
1146 |
PIN_ODR_HIGH(GPIOF_PIN12) | \ |
1147 |
PIN_ODR_HIGH(GPIOF_PIN13) | \ |
1148 |
PIN_ODR_HIGH(GPIOF_PIN14) | \ |
1149 |
PIN_ODR_HIGH(GPIOF_PIN15)) |
1150 |
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ |
1151 |
PIN_AFIO_AF(GPIOF_PIN1, 0U) | \
|
1152 |
PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
|
1153 |
PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
|
1154 |
PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
|
1155 |
PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
|
1156 |
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
|
1157 |
PIN_AFIO_AF(GPIOF_PIN7, 0U))
|
1158 |
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ |
1159 |
PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
|
1160 |
PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
|
1161 |
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
|
1162 |
PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
|
1163 |
PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
|
1164 |
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
|
1165 |
PIN_AFIO_AF(GPIOF_PIN15, 0U))
|
1166 |
#define VAL_GPIOF_ASCR (PIN_ASCR_DISABLED(GPIOF_PIN0) | \
|
1167 |
PIN_ASCR_DISABLED(GPIOF_PIN1) | \ |
1168 |
PIN_ASCR_DISABLED(GPIOF_PIN2) | \ |
1169 |
PIN_ASCR_DISABLED(GPIOF_PIN3) | \ |
1170 |
PIN_ASCR_DISABLED(GPIOF_PIN4) | \ |
1171 |
PIN_ASCR_DISABLED(GPIOF_PIN5) | \ |
1172 |
PIN_ASCR_DISABLED(GPIOF_PIN6) | \ |
1173 |
PIN_ASCR_DISABLED(GPIOF_PIN7) | \ |
1174 |
PIN_ASCR_DISABLED(GPIOF_PIN8) | \ |
1175 |
PIN_ASCR_DISABLED(GPIOF_PIN9) | \ |
1176 |
PIN_ASCR_DISABLED(GPIOF_PIN10) | \ |
1177 |
PIN_ASCR_DISABLED(GPIOF_PIN11) | \ |
1178 |
PIN_ASCR_DISABLED(GPIOF_PIN12) | \ |
1179 |
PIN_ASCR_DISABLED(GPIOF_PIN13) | \ |
1180 |
PIN_ASCR_DISABLED(GPIOF_PIN14) | \ |
1181 |
PIN_ASCR_DISABLED(GPIOF_PIN15)) |
1182 |
#define VAL_GPIOF_LOCKR (PIN_LOCKR_DISABLED(GPIOF_PIN0) | \
|
1183 |
PIN_LOCKR_DISABLED(GPIOF_PIN1) | \ |
1184 |
PIN_LOCKR_DISABLED(GPIOF_PIN2) | \ |
1185 |
PIN_LOCKR_DISABLED(GPIOF_PIN3) | \ |
1186 |
PIN_LOCKR_DISABLED(GPIOF_PIN4) | \ |
1187 |
PIN_LOCKR_DISABLED(GPIOF_PIN5) | \ |
1188 |
PIN_LOCKR_DISABLED(GPIOF_PIN6) | \ |
1189 |
PIN_LOCKR_DISABLED(GPIOF_PIN7) | \ |
1190 |
PIN_LOCKR_DISABLED(GPIOF_PIN8) | \ |
1191 |
PIN_LOCKR_DISABLED(GPIOF_PIN9) | \ |
1192 |
PIN_LOCKR_DISABLED(GPIOF_PIN10) | \ |
1193 |
PIN_LOCKR_DISABLED(GPIOF_PIN11) | \ |
1194 |
PIN_LOCKR_DISABLED(GPIOF_PIN12) | \ |
1195 |
PIN_LOCKR_DISABLED(GPIOF_PIN13) | \ |
1196 |
PIN_LOCKR_DISABLED(GPIOF_PIN14) | \ |
1197 |
PIN_LOCKR_DISABLED(GPIOF_PIN15)) |
1198 |
|
1199 |
/*
|
1200 |
* GPIOG setup:
|
1201 |
*
|
1202 |
* PG0 - PIN0 (analog).
|
1203 |
* PG1 - PIN1 (analog).
|
1204 |
* PG2 - PIN2 (analog).
|
1205 |
* PG3 - PIN3 (analog).
|
1206 |
* PG4 - PIN4 (analog).
|
1207 |
* PG5 - PIN5 (analog).
|
1208 |
* PG6 - PIN6 (analog).
|
1209 |
* PG7 - PIN7 (analog).
|
1210 |
* PG8 - PIN8 (analog).
|
1211 |
* PG9 - PIN9 (analog).
|
1212 |
* PG10 - PIN10 (analog).
|
1213 |
* PG11 - PIN11 (analog).
|
1214 |
* PG12 - PIN12 (analog).
|
1215 |
* PG13 - PIN13 (analog).
|
1216 |
* PG14 - PIN14 (analog).
|
1217 |
* PG15 - PIN15 (analog).
|
1218 |
*/
|
1219 |
#define VAL_GPIOG_MODER (PIN_MODE_ANALOG(GPIOG_PIN0) | \
|
1220 |
PIN_MODE_ANALOG(GPIOG_PIN1) | \ |
1221 |
PIN_MODE_ANALOG(GPIOG_PIN2) | \ |
1222 |
PIN_MODE_ANALOG(GPIOG_PIN3) | \ |
1223 |
PIN_MODE_ANALOG(GPIOG_PIN4) | \ |
1224 |
PIN_MODE_ANALOG(GPIOG_PIN5) | \ |
1225 |
PIN_MODE_ANALOG(GPIOG_PIN6) | \ |
1226 |
PIN_MODE_ANALOG(GPIOG_PIN7) | \ |
1227 |
PIN_MODE_ANALOG(GPIOG_PIN8) | \ |
1228 |
PIN_MODE_ANALOG(GPIOG_PIN9) | \ |
1229 |
PIN_MODE_ANALOG(GPIOG_PIN10) | \ |
1230 |
PIN_MODE_ANALOG(GPIOG_PIN11) | \ |
1231 |
PIN_MODE_ANALOG(GPIOG_PIN12) | \ |
1232 |
PIN_MODE_ANALOG(GPIOG_PIN13) | \ |
1233 |
PIN_MODE_ANALOG(GPIOG_PIN14) | \ |
1234 |
PIN_MODE_ANALOG(GPIOG_PIN15)) |
1235 |
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
|
1236 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ |
1237 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ |
1238 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ |
1239 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ |
1240 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ |
1241 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ |
1242 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ |
1243 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ |
1244 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ |
1245 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ |
1246 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ |
1247 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ |
1248 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ |
1249 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ |
1250 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) |
1251 |
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
|
1252 |
PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \ |
1253 |
PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \ |
1254 |
PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \ |
1255 |
PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \ |
1256 |
PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \ |
1257 |
PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \ |
1258 |
PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \ |
1259 |
PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \ |
1260 |
PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \ |
1261 |
PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \ |
1262 |
PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \ |
1263 |
PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \ |
1264 |
PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \ |
1265 |
PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \ |
1266 |
PIN_OSPEED_VERYLOW(GPIOG_PIN15)) |
1267 |
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
|
1268 |
PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ |
1269 |
PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ |
1270 |
PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ |
1271 |
PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ |
1272 |
PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ |
1273 |
PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ |
1274 |
PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ |
1275 |
PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ |
1276 |
PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ |
1277 |
PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ |
1278 |
PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ |
1279 |
PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ |
1280 |
PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ |
1281 |
PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ |
1282 |
PIN_PUPDR_FLOATING(GPIOG_PIN15)) |
1283 |
#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
|
1284 |
PIN_ODR_HIGH(GPIOG_PIN1) | \ |
1285 |
PIN_ODR_HIGH(GPIOG_PIN2) | \ |
1286 |
PIN_ODR_HIGH(GPIOG_PIN3) | \ |
1287 |
PIN_ODR_HIGH(GPIOG_PIN4) | \ |
1288 |
PIN_ODR_HIGH(GPIOG_PIN5) | \ |
1289 |
PIN_ODR_HIGH(GPIOG_PIN6) | \ |
1290 |
PIN_ODR_HIGH(GPIOG_PIN7) | \ |
1291 |
PIN_ODR_HIGH(GPIOG_PIN8) | \ |
1292 |
PIN_ODR_HIGH(GPIOG_PIN9) | \ |
1293 |
PIN_ODR_HIGH(GPIOG_PIN10) | \ |
1294 |
PIN_ODR_HIGH(GPIOG_PIN11) | \ |
1295 |
PIN_ODR_HIGH(GPIOG_PIN12) | \ |
1296 |
PIN_ODR_HIGH(GPIOG_PIN13) | \ |
1297 |
PIN_ODR_HIGH(GPIOG_PIN14) | \ |
1298 |
PIN_ODR_HIGH(GPIOG_PIN15)) |
1299 |
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \ |
1300 |
PIN_AFIO_AF(GPIOG_PIN1, 0U) | \
|
1301 |
PIN_AFIO_AF(GPIOG_PIN2, 0U) | \
|
1302 |
PIN_AFIO_AF(GPIOG_PIN3, 0U) | \
|
1303 |
PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
|
1304 |
PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
|
1305 |
PIN_AFIO_AF(GPIOG_PIN6, 0U) | \
|
1306 |
PIN_AFIO_AF(GPIOG_PIN7, 0U))
|
1307 |
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \ |
1308 |
PIN_AFIO_AF(GPIOG_PIN9, 0U) | \
|
1309 |
PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
|
1310 |
PIN_AFIO_AF(GPIOG_PIN11, 0U) | \
|
1311 |
PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
|
1312 |
PIN_AFIO_AF(GPIOG_PIN13, 0U) | \
|
1313 |
PIN_AFIO_AF(GPIOG_PIN14, 0U) | \
|
1314 |
PIN_AFIO_AF(GPIOG_PIN15, 0U))
|
1315 |
#define VAL_GPIOG_ASCR (PIN_ASCR_DISABLED(GPIOG_PIN0) | \
|
1316 |
PIN_ASCR_DISABLED(GPIOG_PIN1) | \ |
1317 |
PIN_ASCR_DISABLED(GPIOG_PIN2) | \ |
1318 |
PIN_ASCR_DISABLED(GPIOG_PIN3) | \ |
1319 |
PIN_ASCR_DISABLED(GPIOG_PIN4) | \ |
1320 |
PIN_ASCR_DISABLED(GPIOG_PIN5) | \ |
1321 |
PIN_ASCR_DISABLED(GPIOG_PIN6) | \ |
1322 |
PIN_ASCR_DISABLED(GPIOG_PIN7) | \ |
1323 |
PIN_ASCR_DISABLED(GPIOG_PIN8) | \ |
1324 |
PIN_ASCR_DISABLED(GPIOG_PIN9) | \ |
1325 |
PIN_ASCR_DISABLED(GPIOG_PIN10) | \ |
1326 |
PIN_ASCR_DISABLED(GPIOG_PIN11) | \ |
1327 |
PIN_ASCR_DISABLED(GPIOG_PIN12) | \ |
1328 |
PIN_ASCR_DISABLED(GPIOG_PIN13) | \ |
1329 |
PIN_ASCR_DISABLED(GPIOG_PIN14) | \ |
1330 |
PIN_ASCR_DISABLED(GPIOG_PIN15)) |
1331 |
#define VAL_GPIOG_LOCKR (PIN_LOCKR_DISABLED(GPIOG_PIN0) | \
|
1332 |
PIN_LOCKR_DISABLED(GPIOG_PIN1) | \ |
1333 |
PIN_LOCKR_DISABLED(GPIOG_PIN2) | \ |
1334 |
PIN_LOCKR_DISABLED(GPIOG_PIN3) | \ |
1335 |
PIN_LOCKR_DISABLED(GPIOG_PIN4) | \ |
1336 |
PIN_LOCKR_DISABLED(GPIOG_PIN5) | \ |
1337 |
PIN_LOCKR_DISABLED(GPIOG_PIN6) | \ |
1338 |
PIN_LOCKR_DISABLED(GPIOG_PIN7) | \ |
1339 |
PIN_LOCKR_DISABLED(GPIOG_PIN8) | \ |
1340 |
PIN_LOCKR_DISABLED(GPIOG_PIN9) | \ |
1341 |
PIN_LOCKR_DISABLED(GPIOG_PIN10) | \ |
1342 |
PIN_LOCKR_DISABLED(GPIOG_PIN11) | \ |
1343 |
PIN_LOCKR_DISABLED(GPIOG_PIN12) | \ |
1344 |
PIN_LOCKR_DISABLED(GPIOG_PIN13) | \ |
1345 |
PIN_LOCKR_DISABLED(GPIOG_PIN14) | \ |
1346 |
PIN_LOCKR_DISABLED(GPIOG_PIN15)) |
1347 |
|
1348 |
/*
|
1349 |
* GPIOH setup:
|
1350 |
*
|
1351 |
* PH0 - OSC_IN (input floating).
|
1352 |
* PH1 - OSC_OUT (input floating).
|
1353 |
* PH2 - PIN2 (analog).
|
1354 |
* PH3 - PIN3 (analog).
|
1355 |
* PH4 - PIN4 (analog).
|
1356 |
* PH5 - PIN5 (analog).
|
1357 |
* PH6 - PIN6 (analog).
|
1358 |
* PH7 - PIN7 (analog).
|
1359 |
* PH8 - PIN8 (analog).
|
1360 |
* PH9 - PIN9 (analog).
|
1361 |
* PH10 - PIN10 (analog).
|
1362 |
* PH11 - PIN11 (analog).
|
1363 |
* PH12 - PIN12 (analog).
|
1364 |
* PH13 - PIN13 (analog).
|
1365 |
* PH14 - PIN14 (analog).
|
1366 |
* PH15 - PIN15 (analog).
|
1367 |
*/
|
1368 |
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
|
1369 |
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ |
1370 |
PIN_MODE_ANALOG(GPIOH_PIN2) | \ |
1371 |
PIN_MODE_ANALOG(GPIOH_PIN3) | \ |
1372 |
PIN_MODE_ANALOG(GPIOH_PIN4) | \ |
1373 |
PIN_MODE_ANALOG(GPIOH_PIN5) | \ |
1374 |
PIN_MODE_ANALOG(GPIOH_PIN6) | \ |
1375 |
PIN_MODE_ANALOG(GPIOH_PIN7) | \ |
1376 |
PIN_MODE_ANALOG(GPIOH_PIN8) | \ |
1377 |
PIN_MODE_ANALOG(GPIOH_PIN9) | \ |
1378 |
PIN_MODE_ANALOG(GPIOH_PIN10) | \ |
1379 |
PIN_MODE_ANALOG(GPIOH_PIN11) | \ |
1380 |
PIN_MODE_ANALOG(GPIOH_PIN12) | \ |
1381 |
PIN_MODE_ANALOG(GPIOH_PIN13) | \ |
1382 |
PIN_MODE_ANALOG(GPIOH_PIN14) | \ |
1383 |
PIN_MODE_ANALOG(GPIOH_PIN15)) |
1384 |
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
|
1385 |
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ |
1386 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ |
1387 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ |
1388 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ |
1389 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ |
1390 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ |
1391 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ |
1392 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ |
1393 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ |
1394 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ |
1395 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ |
1396 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ |
1397 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ |
1398 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ |
1399 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) |
1400 |
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \
|
1401 |
PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \ |
1402 |
PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \ |
1403 |
PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \ |
1404 |
PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \ |
1405 |
PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \ |
1406 |
PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \ |
1407 |
PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \ |
1408 |
PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \ |
1409 |
PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \ |
1410 |
PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \ |
1411 |
PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \ |
1412 |
PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \ |
1413 |
PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \ |
1414 |
PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \ |
1415 |
PIN_OSPEED_VERYLOW(GPIOH_PIN15)) |
1416 |
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
1417 |
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ |
1418 |
PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ |
1419 |
PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ |
1420 |
PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ |
1421 |
PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ |
1422 |
PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ |
1423 |
PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ |
1424 |
PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ |
1425 |
PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ |
1426 |
PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ |
1427 |
PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ |
1428 |
PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ |
1429 |
PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ |
1430 |
PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ |
1431 |
PIN_PUPDR_FLOATING(GPIOH_PIN15)) |
1432 |
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
1433 |
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ |
1434 |
PIN_ODR_HIGH(GPIOH_PIN2) | \ |
1435 |
PIN_ODR_HIGH(GPIOH_PIN3) | \ |
1436 |
PIN_ODR_HIGH(GPIOH_PIN4) | \ |
1437 |
PIN_ODR_HIGH(GPIOH_PIN5) | \ |
1438 |
PIN_ODR_HIGH(GPIOH_PIN6) | \ |
1439 |
PIN_ODR_HIGH(GPIOH_PIN7) | \ |
1440 |
PIN_ODR_HIGH(GPIOH_PIN8) | \ |
1441 |
PIN_ODR_HIGH(GPIOH_PIN9) | \ |
1442 |
PIN_ODR_HIGH(GPIOH_PIN10) | \ |
1443 |
PIN_ODR_HIGH(GPIOH_PIN11) | \ |
1444 |
PIN_ODR_HIGH(GPIOH_PIN12) | \ |
1445 |
PIN_ODR_HIGH(GPIOH_PIN13) | \ |
1446 |
PIN_ODR_HIGH(GPIOH_PIN14) | \ |
1447 |
PIN_ODR_HIGH(GPIOH_PIN15)) |
1448 |
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \ |
1449 |
PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \
|
1450 |
PIN_AFIO_AF(GPIOH_PIN2, 0U) | \
|
1451 |
PIN_AFIO_AF(GPIOH_PIN3, 0U) | \
|
1452 |
PIN_AFIO_AF(GPIOH_PIN4, 0U) | \
|
1453 |
PIN_AFIO_AF(GPIOH_PIN5, 0U) | \
|
1454 |
PIN_AFIO_AF(GPIOH_PIN6, 0U) | \
|
1455 |
PIN_AFIO_AF(GPIOH_PIN7, 0U))
|
1456 |
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \ |
1457 |
PIN_AFIO_AF(GPIOH_PIN9, 0U) | \
|
1458 |
PIN_AFIO_AF(GPIOH_PIN10, 0U) | \
|
1459 |
PIN_AFIO_AF(GPIOH_PIN11, 0U) | \
|
1460 |
PIN_AFIO_AF(GPIOH_PIN12, 0U) | \
|
1461 |
PIN_AFIO_AF(GPIOH_PIN13, 0U) | \
|
1462 |
PIN_AFIO_AF(GPIOH_PIN14, 0U) | \
|
1463 |
PIN_AFIO_AF(GPIOH_PIN15, 0U))
|
1464 |
#define VAL_GPIOH_ASCR (PIN_ASCR_DISABLED(GPIOH_OSC_IN) | \
|
1465 |
PIN_ASCR_DISABLED(GPIOH_OSC_OUT) | \ |
1466 |
PIN_ASCR_DISABLED(GPIOH_PIN2) | \ |
1467 |
PIN_ASCR_DISABLED(GPIOH_PIN3) | \ |
1468 |
PIN_ASCR_DISABLED(GPIOH_PIN4) | \ |
1469 |
PIN_ASCR_DISABLED(GPIOH_PIN5) | \ |
1470 |
PIN_ASCR_DISABLED(GPIOH_PIN6) | \ |
1471 |
PIN_ASCR_DISABLED(GPIOH_PIN7) | \ |
1472 |
PIN_ASCR_DISABLED(GPIOH_PIN8) | \ |
1473 |
PIN_ASCR_DISABLED(GPIOH_PIN9) | \ |
1474 |
PIN_ASCR_DISABLED(GPIOH_PIN10) | \ |
1475 |
PIN_ASCR_DISABLED(GPIOH_PIN11) | \ |
1476 |
PIN_ASCR_DISABLED(GPIOH_PIN12) | \ |
1477 |
PIN_ASCR_DISABLED(GPIOH_PIN13) | \ |
1478 |
PIN_ASCR_DISABLED(GPIOH_PIN14) | \ |
1479 |
PIN_ASCR_DISABLED(GPIOH_PIN15)) |
1480 |
#define VAL_GPIOH_LOCKR (PIN_LOCKR_DISABLED(GPIOH_OSC_IN) | \
|
1481 |
PIN_LOCKR_DISABLED(GPIOH_OSC_OUT) | \ |
1482 |
PIN_LOCKR_DISABLED(GPIOH_PIN2) | \ |
1483 |
PIN_LOCKR_DISABLED(GPIOH_PIN3) | \ |
1484 |
PIN_LOCKR_DISABLED(GPIOH_PIN4) | \ |
1485 |
PIN_LOCKR_DISABLED(GPIOH_PIN5) | \ |
1486 |
PIN_LOCKR_DISABLED(GPIOH_PIN6) | \ |
1487 |
PIN_LOCKR_DISABLED(GPIOH_PIN7) | \ |
1488 |
PIN_LOCKR_DISABLED(GPIOH_PIN8) | \ |
1489 |
PIN_LOCKR_DISABLED(GPIOH_PIN9) | \ |
1490 |
PIN_LOCKR_DISABLED(GPIOH_PIN10) | \ |
1491 |
PIN_LOCKR_DISABLED(GPIOH_PIN11) | \ |
1492 |
PIN_LOCKR_DISABLED(GPIOH_PIN12) | \ |
1493 |
PIN_LOCKR_DISABLED(GPIOH_PIN13) | \ |
1494 |
PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ |
1495 |
PIN_LOCKR_DISABLED(GPIOH_PIN15)) |
1496 |
|
1497 |
/*===========================================================================*/
|
1498 |
/* External declarations. */
|
1499 |
/*===========================================================================*/
|
1500 |
|
1501 |
#if !defined(_FROM_ASM_)
|
1502 |
#ifdef __cplusplus
|
1503 |
extern "C" { |
1504 |
#endif
|
1505 |
void boardInit(void); |
1506 |
#ifdef __cplusplus
|
1507 |
} |
1508 |
#endif
|
1509 |
#endif /* _FROM_ASM_ */ |
1510 |
|
1511 |
#endif /* BOARD_H */ |