amiro-os / components / Debug.c @ f1d13b04
History | View | Annotate | Download (1.443 KB)
1 |
#include <ch.h> |
---|---|
2 |
#include <hal.h> |
3 |
|
4 |
/*
|
5 |
* System_halt
|
6 |
* error code
|
7 |
*
|
8 |
* - SV#1, misplaced @p chSysDisable().
|
9 |
* - SV#2, misplaced @p chSysSuspend()
|
10 |
* - SV#3, misplaced @p chSysEnable().
|
11 |
* - SV#4, misplaced @p chSysLock().
|
12 |
* - SV#5, misplaced @p chSysUnlock().
|
13 |
* - SV#6, misplaced @p chSysLockFromIsr().
|
14 |
* - SV#7, misplaced @p chSysUnlockFromIsr().
|
15 |
* - SV#8, misplaced @p CH_IRQ_PROLOGUE().
|
16 |
* - SV#9, misplaced @p CH_IRQ_EPILOGUE().
|
17 |
* - SV#10, misplaced I-class function.
|
18 |
* - SV#11, misplaced S-class function.
|
19 |
*/
|
20 |
|
21 |
static inline void serialWaitForEmpty(void) { |
22 |
while (!((SD1.usart->SR) & USART_SR_TC)) {
|
23 |
; |
24 |
} |
25 |
} |
26 |
|
27 |
void haltErrorCode(void) { |
28 |
#if CH_DBG_SYSTEM_STATE_CHECK
|
29 |
char errorCode[26]="\nSystem halt! Error Code:\0"; |
30 |
int i=0; |
31 |
rccEnableUSART1(FALSE); |
32 |
nvicEnableVector(USART1_IRQn,CORTEX_PRIORITY_MASK(STM32_SERIAL_USART1_PRIORITY)); |
33 |
SD1.state = SD_READY; |
34 |
|
35 |
SD1.usart->CR1 = 0;
|
36 |
SD1.usart->CR2 = 0;
|
37 |
SD1.usart->CR3 = 0;
|
38 |
|
39 |
SD1.usart->CR1 |= USART_CR1_UE | USART_CR1_TE; |
40 |
SD1.usart->CR2 |= USART_CR2_STOP; |
41 |
SD1.usart->BRR = STM32_PCLK2 / 115200;
|
42 |
|
43 |
while(errorCode[i]!='\0') { |
44 |
SD1.usart->DR = errorCode[i]; |
45 |
serialWaitForEmpty(); |
46 |
i++; |
47 |
} |
48 |
i=0;
|
49 |
while(dbg_panic_msg[i]!='\0') { |
50 |
SD1.usart->DR = dbg_panic_msg[i]; |
51 |
serialWaitForEmpty(); |
52 |
i++; |
53 |
} |
54 |
|
55 |
SD1.usart->DR = '\n';
|
56 |
serialWaitForEmpty(); |
57 |
#endif
|
58 |
} |