amiro-os / modules / PowerManagement_1-2 / board.h @ f38aba21
History | View | Annotate | Download (108.439 KB)
1 |
/*
|
---|---|
2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
|
3 |
Copyright (C) 2016..2019 Thomas Schöpping et al.
|
4 |
|
5 |
This program is free software: you can redistribute it and/or modify
|
6 |
it under the terms of the GNU General Public License as published by
|
7 |
the Free Software Foundation, either version 3 of the License, or
|
8 |
(at your option) any later version.
|
9 |
|
10 |
This program is distributed in the hope that it will be useful,
|
11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
13 |
GNU General Public License for more details.
|
14 |
|
15 |
You should have received a copy of the GNU General Public License
|
16 |
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
17 |
*/
|
18 |
|
19 |
/**
|
20 |
* @file
|
21 |
* @brief PowerManagement v1.2 Board specific macros.
|
22 |
*
|
23 |
* @addtogroup powermanagement_board
|
24 |
* @{
|
25 |
*/
|
26 |
|
27 |
#ifndef BOARD_H
|
28 |
#define BOARD_H
|
29 |
|
30 |
/*
|
31 |
* Setup for AMiRo PowerManagement v1.2 board.
|
32 |
*/
|
33 |
|
34 |
/*
|
35 |
* Board identifier.
|
36 |
*/
|
37 |
#define BOARD_POWERMANAGEMENT_1_2
|
38 |
#define BOARD_NAME "AMiRo PowerManagement v1.2" |
39 |
|
40 |
/*
|
41 |
* Board oscillators-related settings.
|
42 |
* NOTE: LSE not fitted.
|
43 |
*/
|
44 |
#if !defined(STM32_LSECLK)
|
45 |
#define STM32_LSECLK 0U |
46 |
#endif
|
47 |
|
48 |
#if !defined(STM32_HSECLK)
|
49 |
#define STM32_HSECLK 8000000U |
50 |
#endif
|
51 |
|
52 |
/*
|
53 |
* Board voltages.
|
54 |
* Required for performance limits calculation.
|
55 |
*/
|
56 |
#define STM32_VDD 330U |
57 |
|
58 |
/*
|
59 |
* MCU type as defined in the ST header.
|
60 |
*/
|
61 |
#define STM32F405xx
|
62 |
|
63 |
/*
|
64 |
* STM32F4 alternate function definitions
|
65 |
*/
|
66 |
#define STM32F4xx_AF_system 0U |
67 |
#define STM32F4xx_AF_TIM1to2 1U |
68 |
#define STM32F4xx_AF_TIM3to5 2U |
69 |
#define STM32F4xx_AF_TIM8to11 3U |
70 |
#define STM32F4xx_AF_I2C1to3 4U |
71 |
#define STM32F4xx_AF_SPI1to2 5U |
72 |
#define STM32F4xx_AF_SPI3 6U |
73 |
#define STM32F4xx_AF_USART1to3 7U |
74 |
#define STM32F4xx_AF_USART4to6 8U |
75 |
#define STM32F4xx_AF_CAN1to2_TIM12to14 9U |
76 |
#define STM32F4xx_AF_OTG_HSFS 10U |
77 |
#define STM32F4xx_AF_ETH 11U |
78 |
#define STM32F4xx_AF_FSMC_SDIO_OTGHS 12U |
79 |
#define STM32F4xx_AF_DCMI 13U |
80 |
#define STM32F4xx_AF_EVENTOUT 15U |
81 |
|
82 |
/*
|
83 |
* Identifiers for the several sensor rings, which can be attached to the PowerManagement v1.2 module.
|
84 |
*/
|
85 |
#define BOARD_NOSENSORRING 0 |
86 |
#define BOARD_PROXIMITYSENSOR 1 |
87 |
#define BOARD_DISTANCESENSOR_VL53L0X 2 |
88 |
#define BOARD_DISTANCESENSOR_VL53L1X 3 |
89 |
|
90 |
/*
|
91 |
* Configuration macro to define which type of sensor ring is attached.
|
92 |
*/
|
93 |
#if !defined(BOARD_SENSORRING) || defined(__DOXYGEN__)
|
94 |
#define BOARD_SENSORRING BOARD_PROXIMITYSENSOR
|
95 |
#endif
|
96 |
|
97 |
/*
|
98 |
* IO pins assignments.
|
99 |
*/
|
100 |
#define GPIOA_WKUP 0U |
101 |
#define GPIOA_SWITCH_STATUS_N 1U |
102 |
#define GPIOA_SYS_UART_TX 2U |
103 |
#define GPIOA_SYS_UART_RX 3U |
104 |
#define GPIOA_SYS_SPI_SS0_N 4U |
105 |
#define GPIOA_SYS_SPI_SCLK 5U |
106 |
#define GPIOA_SYS_SPI_MISO 6U |
107 |
#define GPIOA_SYS_SPI_MOSI 7U |
108 |
#define GPIOA_SYS_REG_EN 8U |
109 |
#define GPIOA_PROG_RX 9U |
110 |
#define GPIOA_PROG_TX 10U |
111 |
#define GPIOA_CAN_RX 11U |
112 |
#define GPIOA_CAN_TX 12U |
113 |
#define GPIOA_SWDIO 13U |
114 |
#define GPIOA_SWCLK 14U |
115 |
#define GPIOA_SYS_SPI_SS1_N 15U |
116 |
|
117 |
#define GPIOB_IR_INT1_N 0U |
118 |
#define GPIOB_VSYS_SENSE 1U |
119 |
#define GPIOB_POWER_EN 2U |
120 |
#define GPIOB_SYS_UART_DN 3U |
121 |
#define GPIOB_CHARGE_STAT2A 4U |
122 |
#define GPIOB_BUZZER 5U |
123 |
#define GPIOB_GAUGE_BATLOW2 6U |
124 |
#define GPIOB_GAUGE_BATGD2_N 7U |
125 |
#define GPIOB_GAUGE_SCL2 8U |
126 |
#define GPIOB_GAUGE_SDA2 9U |
127 |
#define GPIOB_GAUGE_SCL1 10U |
128 |
#define GPIOB_GAUGE_SDA1 11U |
129 |
#define GPIOB_LED 12U |
130 |
#define GPIOB_BT_RTS 13U |
131 |
#define GPIOB_BT_CTS 14U |
132 |
#define GPIOB_SYS_UART_UP 15U |
133 |
|
134 |
#define GPIOC_CHARGE_STAT1A 0U |
135 |
#define GPIOC_GAUGE_BATLOW1 1U |
136 |
#define GPIOC_GAUGE_BATGD1_N 2U |
137 |
#define GPIOC_CHARGE_EN1_N 3U |
138 |
#define GPIOC_IR_INT2_N 4U |
139 |
#define GPIOC_TOUCH_INT_N 5U |
140 |
#define GPIOC_SYS_DONE 6U |
141 |
#define GPIOC_SYS_PROG_N 7U |
142 |
#define GPIOC_PATH_DC 8U |
143 |
#define GPIOC_SYS_SPI_DIR 9U |
144 |
#define GPIOC_BT_RX 10U |
145 |
#define GPIOC_BT_TX 11U |
146 |
#define GPIOC_SYS_INT_N 12U |
147 |
#define GPIOC_SYS_PD_N 13U |
148 |
#define GPIOC_SYS_WARMRST_N 14U |
149 |
#define GPIOC_BT_RST 15U |
150 |
|
151 |
#define GPIOD_PIN0 0U |
152 |
#define GPIOD_PIN1 1U |
153 |
#define GPIOD_CHARGE_EN2_N 2U |
154 |
#define GPIOD_PIN3 3U |
155 |
#define GPIOD_PIN4 4U |
156 |
#define GPIOD_PIN5 5U |
157 |
#define GPIOD_PIN6 6U |
158 |
#define GPIOD_PIN7 7U |
159 |
#define GPIOD_PIN8 8U |
160 |
#define GPIOD_PIN9 9U |
161 |
#define GPIOD_PIN10 10U |
162 |
#define GPIOD_PIN11 11U |
163 |
#define GPIOD_PIN12 12U |
164 |
#define GPIOD_PIN13 13U |
165 |
#define GPIOD_PIN14 14U |
166 |
#define GPIOD_PIN15 15U |
167 |
|
168 |
#define GPIOE_PIN0 0U |
169 |
#define GPIOE_PIN1 1U |
170 |
#define GPIOE_PIN2 2U |
171 |
#define GPIOE_PIN3 3U |
172 |
#define GPIOE_PIN4 4U |
173 |
#define GPIOE_PIN5 5U |
174 |
#define GPIOE_PIN6 6U |
175 |
#define GPIOE_PIN7 7U |
176 |
#define GPIOE_PIN8 8U |
177 |
#define GPIOE_PIN9 9U |
178 |
#define GPIOE_PIN10 10U |
179 |
#define GPIOE_PIN11 11U |
180 |
#define GPIOE_PIN12 12U |
181 |
#define GPIOE_PIN13 13U |
182 |
#define GPIOE_PIN14 14U |
183 |
#define GPIOE_PIN15 15U |
184 |
|
185 |
#define GPIOF_PIN0 0U |
186 |
#define GPIOF_PIN1 1U |
187 |
#define GPIOF_PIN2 2U |
188 |
#define GPIOF_PIN3 3U |
189 |
#define GPIOF_PIN4 4U |
190 |
#define GPIOF_PIN5 5U |
191 |
#define GPIOF_PIN6 6U |
192 |
#define GPIOF_PIN7 7U |
193 |
#define GPIOF_PIN8 8U |
194 |
#define GPIOF_PIN9 9U |
195 |
#define GPIOF_PIN10 10U |
196 |
#define GPIOF_PIN11 11U |
197 |
#define GPIOF_PIN12 12U |
198 |
#define GPIOF_PIN13 13U |
199 |
#define GPIOF_PIN14 14U |
200 |
#define GPIOF_PIN15 15U |
201 |
|
202 |
#define GPIOG_PIN0 0U |
203 |
#define GPIOG_PIN1 1U |
204 |
#define GPIOG_PIN2 2U |
205 |
#define GPIOG_PIN3 3U |
206 |
#define GPIOG_PIN4 4U |
207 |
#define GPIOG_PIN5 5U |
208 |
#define GPIOG_PIN6 6U |
209 |
#define GPIOG_PIN7 7U |
210 |
#define GPIOG_PIN8 8U |
211 |
#define GPIOG_PIN9 9U |
212 |
#define GPIOG_PIN10 10U |
213 |
#define GPIOG_PIN11 11U |
214 |
#define GPIOG_PIN12 12U |
215 |
#define GPIOG_PIN13 13U |
216 |
#define GPIOG_PIN14 14U |
217 |
#define GPIOG_PIN15 15U |
218 |
|
219 |
#define GPIOH_OSC_IN 0U |
220 |
#define GPIOH_OSC_OUT 1U |
221 |
#define GPIOH_PIN2 2U |
222 |
#define GPIOH_PIN3 3U |
223 |
#define GPIOH_PIN4 4U |
224 |
#define GPIOH_PIN5 5U |
225 |
#define GPIOH_PIN6 6U |
226 |
#define GPIOH_PIN7 7U |
227 |
#define GPIOH_PIN8 8U |
228 |
#define GPIOH_PIN9 9U |
229 |
#define GPIOH_PIN10 10U |
230 |
#define GPIOH_PIN11 11U |
231 |
#define GPIOH_PIN12 12U |
232 |
#define GPIOH_PIN13 13U |
233 |
#define GPIOH_PIN14 14U |
234 |
#define GPIOH_PIN15 15U |
235 |
|
236 |
#define GPIOI_PIN0 0U |
237 |
#define GPIOI_PIN1 1U |
238 |
#define GPIOI_PIN2 2U |
239 |
#define GPIOI_PIN3 3U |
240 |
#define GPIOI_PIN4 4U |
241 |
#define GPIOI_PIN5 5U |
242 |
#define GPIOI_PIN6 6U |
243 |
#define GPIOI_PIN7 7U |
244 |
#define GPIOI_PIN8 8U |
245 |
#define GPIOI_PIN9 9U |
246 |
#define GPIOI_PIN10 10U |
247 |
#define GPIOI_PIN11 11U |
248 |
#define GPIOI_PIN12 12U |
249 |
#define GPIOI_PIN13 13U |
250 |
#define GPIOI_PIN14 14U |
251 |
#define GPIOI_PIN15 15U |
252 |
|
253 |
/*
|
254 |
* IO lines assignments.
|
255 |
*/
|
256 |
#define LINE_WKUP PAL_LINE(GPIOA, GPIOA_WKUP)
|
257 |
#define LINE_SWITCH_STATUS_N PAL_LINE(GPIOA, GPIOA_SWITCH_STATUS_N)
|
258 |
#define LINE_SYS_UART_TX PAL_LINE(GPIOA, GPIOA_SYS_UART_TX)
|
259 |
#define LINE_SYS_UART_RX PAL_LINE(GPIOA, GPIOA_SYS_UART_RX)
|
260 |
#define LINE_SYS_SPI_SS0_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N)
|
261 |
#define LINE_SYS_SPI_SCLK PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK)
|
262 |
#define LINE_SYS_SPI_MISO PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO)
|
263 |
#define LINE_SYS_SPI_MOSI PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI)
|
264 |
#define LINE_SYS_REG_EN PAL_LINE(GPIOA, GPIOA_SYS_REG_EN)
|
265 |
#define LINE_PROG_RX PAL_LINE(GPIOA, GPIOA_PROG_RX)
|
266 |
#define LINE_PROG_TX PAL_LINE(GPIOA, GPIOA_PROG_TX)
|
267 |
#define LINE_CAN_RX PAL_LINE(GPIOA, GPIOA_CAN_RX)
|
268 |
#define LINE_CAN_TX PAL_LINE(GPIOA, GPIOA_CAN_TX)
|
269 |
#define LINE_SWDIO PAL_LINE(GPIOA, GPIOA_SWDIO)
|
270 |
#define LINE_SWCLK PAL_LINE(GPIOA, GPIOA_SWCLK)
|
271 |
#define LINE_SYS_SPI_SS1_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N)
|
272 |
|
273 |
#define LINE_IR_INT1_N PAL_LINE(GPIOB, GPIOB_IR_INT1_N)
|
274 |
#define LINE_VSYS_SENSE PAL_LINE(GPIOB, GPIOB_VSYS_SENSE)
|
275 |
#define LINE_POWER_EN PAL_LINE(GPIOB, GPIOB_POWER_EN)
|
276 |
#define LINE_SYS_UART_DN PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
|
277 |
#define LINE_CHARGE_STAT2A PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A)
|
278 |
#define LINE_BUZZER PAL_LINE(GPIOB, GPIOB_BUZZER)
|
279 |
#define LINE_GAUGE_BATLOW2 PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2)
|
280 |
#define LINE_GAUGE_BATGD2_N PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N)
|
281 |
#define LINE_GAUGE_SCL2 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2)
|
282 |
#define LINE_GAUGE_SDA2 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2)
|
283 |
#define LINE_GAUGE_SCL1 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1)
|
284 |
#define LINE_GAUGE_SDA1 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1)
|
285 |
#define LINE_LED PAL_LINE(GPIOB, GPIOB_LED)
|
286 |
#define LINE_BT_RTS PAL_LINE(GPIOB, GPIOB_BT_RTS)
|
287 |
#define LINE_BT_CTS PAL_LINE(GPIOB, GPIOB_BT_CTS)
|
288 |
#define LINE_SYS_UART_UP PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
|
289 |
|
290 |
#define LINE_CHARGE_STAT1A PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A)
|
291 |
#define LINE_GAUGE_BATLOW1 PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1)
|
292 |
#define LINE_GAUGE_BATGD1_N PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N)
|
293 |
#define LINE_CHARGE_EN1_N PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N)
|
294 |
#define LINE_IR_INT2_N PAL_LINE(GPIOC, GPIOC_IR_INT2_N)
|
295 |
#define LINE_TOUCH_INT_N PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N)
|
296 |
#define LINE_SYS_DONE PAL_LINE(GPIOC, GPIOC_SYS_DONE)
|
297 |
#define LINE_SYS_PROG_N PAL_LINE(GPIOC, GPIOC_SYS_PROG_N)
|
298 |
#define LINE_PATH_DC PAL_LINE(GPIOC, GPIOC_PATH_DC)
|
299 |
#define LINE_SYS_SPI_DIR PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR)
|
300 |
#define LINE_BT_RX PAL_LINE(GPIOC, GPIOC_BT_RX)
|
301 |
#define LINE_BT_TX PAL_LINE(GPIOC, GPIOC_BT_TX)
|
302 |
#define LINE_SYS_INT_N PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
|
303 |
#define LINE_SYS_PD_N PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
|
304 |
#define LINE_SYS_WARMRST_N PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N)
|
305 |
#define LINE_BT_RST PAL_LINE(GPIOC, GPIOC_BT_RST)
|
306 |
|
307 |
#define LINE_CHARGE_EN2_N PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N)
|
308 |
|
309 |
#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) |
310 |
#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) |
311 |
|
312 |
/*
|
313 |
* I/O ports initial setup, this configuration is established soon after reset
|
314 |
* in the initialization code.
|
315 |
* Please refer to the STM32 Reference Manual for details.
|
316 |
*/
|
317 |
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
318 |
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
319 |
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
320 |
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
321 |
#define PIN_ODR_LOW(n) (0U << (n)) |
322 |
#define PIN_ODR_HIGH(n) (1U << (n)) |
323 |
#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
324 |
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
325 |
#define PIN_OSPEED_LOW(n) (0U << ((n) * 2U)) |
326 |
#define PIN_OSPEED_MEDIUM(n) (1U << ((n) * 2U)) |
327 |
#define PIN_OSPEED_HIGH(n) (2U << ((n) * 2U)) |
328 |
#define PIN_OSPEED_VERYHIGH(n) (3U << ((n) * 2U)) |
329 |
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
330 |
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
331 |
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
332 |
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
333 |
|
334 |
/*
|
335 |
* GPIOA setup:
|
336 |
*
|
337 |
* PA0 - WKUP (input floating)
|
338 |
* PA1 - SWITCH_STATUS_N (input floating)
|
339 |
* PA2 - SYS_UART_TX (input floating)
|
340 |
* PA3 - SYS_UART_RX (alternate 7 pushpull floating)
|
341 |
* PA4 - SYS_SPI_SS0_N (input floating)
|
342 |
* PA5 - SYS_SPI_SCLK (alternate 5 pushpull floating)
|
343 |
* PA6 - SYS_SPI_MISO (alternate 5 pushpull floating)
|
344 |
* PA7 - SYS_SPI_MOSI (alternate 5 pushpull floating)
|
345 |
* PA8 - SYS_REG_EN (output pushpull high)
|
346 |
* PA9 - PROG_RX (alternate 7 pushpull floating)
|
347 |
* PA10 - PROG_TX (alternate 7 pushpull pullup)
|
348 |
* PA11 - CAN_RX (alternate 9 pushpull floating)
|
349 |
* PA12 - CAN_TX (alternate 9 pushpull floating)
|
350 |
* PA13 - SWDIO (alternate 0 pushpull floating)
|
351 |
* PA14 - SWCLK (alternate 0 pushpull floating)
|
352 |
* PA15 - SYS_SPI_SS1_N (input floating)
|
353 |
*/
|
354 |
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_WKUP) | \
|
355 |
PIN_MODE_INPUT(GPIOA_SWITCH_STATUS_N) | \ |
356 |
PIN_MODE_INPUT(GPIOA_SYS_UART_TX) | \ |
357 |
PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) | \ |
358 |
PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) | \ |
359 |
PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) | \ |
360 |
PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) | \ |
361 |
PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) | \ |
362 |
PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) | \ |
363 |
PIN_MODE_ALTERNATE(GPIOA_PROG_RX) | \ |
364 |
PIN_MODE_ALTERNATE(GPIOA_PROG_TX) | \ |
365 |
PIN_MODE_ALTERNATE(GPIOA_CAN_RX) | \ |
366 |
PIN_MODE_ALTERNATE(GPIOA_CAN_TX) | \ |
367 |
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ |
368 |
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ |
369 |
PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N)) |
370 |
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) | \
|
371 |
PIN_OTYPE_PUSHPULL(GPIOA_SWITCH_STATUS_N) | \ |
372 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) | \ |
373 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) | \ |
374 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) | \ |
375 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) | \ |
376 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) | \ |
377 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) | \ |
378 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) | \ |
379 |
PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) | \ |
380 |
PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) | \ |
381 |
PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) | \ |
382 |
PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) | \ |
383 |
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ |
384 |
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ |
385 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N)) |
386 |
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) | \
|
387 |
PIN_OSPEED_VERYHIGH(GPIOA_SWITCH_STATUS_N) | \ |
388 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) | \ |
389 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) | \ |
390 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) | \ |
391 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) | \ |
392 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) | \ |
393 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) | \ |
394 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) | \ |
395 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) | \ |
396 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) | \ |
397 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) | \ |
398 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) | \ |
399 |
PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) | \ |
400 |
PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) | \ |
401 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N)) |
402 |
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_WKUP) | \
|
403 |
PIN_PUPDR_FLOATING(GPIOA_SWITCH_STATUS_N) | \ |
404 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) | \ |
405 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) | \ |
406 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) | \ |
407 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) | \ |
408 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) | \ |
409 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) | \ |
410 |
PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) | \ |
411 |
PIN_PUPDR_FLOATING(GPIOA_PROG_RX) | \ |
412 |
PIN_PUPDR_PULLUP(GPIOA_PROG_TX) | \ |
413 |
PIN_PUPDR_FLOATING(GPIOA_CAN_RX) | \ |
414 |
PIN_PUPDR_FLOATING(GPIOA_CAN_TX) | \ |
415 |
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ |
416 |
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ |
417 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N)) |
418 |
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_WKUP) | \
|
419 |
PIN_ODR_HIGH(GPIOA_SWITCH_STATUS_N) | \ |
420 |
PIN_ODR_HIGH(GPIOA_SYS_UART_TX) | \ |
421 |
PIN_ODR_HIGH(GPIOA_SYS_UART_RX) | \ |
422 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) | \ |
423 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) | \ |
424 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) | \ |
425 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) | \ |
426 |
PIN_ODR_HIGH(GPIOA_SYS_REG_EN) | \ |
427 |
PIN_ODR_HIGH(GPIOA_PROG_RX) | \ |
428 |
PIN_ODR_HIGH(GPIOA_PROG_TX) | \ |
429 |
PIN_ODR_HIGH(GPIOA_CAN_RX) | \ |
430 |
PIN_ODR_HIGH(GPIOA_CAN_TX) | \ |
431 |
PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
432 |
PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
433 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N)) |
434 |
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) | \
|
435 |
PIN_AFIO_AF(GPIOA_SWITCH_STATUS_N, STM32F4xx_AF_system) | \ |
436 |
PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) | \ |
437 |
PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) | \ |
438 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) | \ |
439 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) | \ |
440 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) | \ |
441 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2)) |
442 |
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) | \
|
443 |
PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) | \ |
444 |
PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) | \ |
445 |
PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
446 |
PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
447 |
PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) | \ |
448 |
PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) | \ |
449 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system)) |
450 |
|
451 |
/*
|
452 |
* GPIOB setup:
|
453 |
*
|
454 |
* PB0 - IR_INT1_N (input floating)
|
455 |
* PB1 - VSYS_SENSE (analog)
|
456 |
* PB2 - POWER_EN (output pushpull high)
|
457 |
* PB3 - SYS_UART_DN (output opendrain high)
|
458 |
* PB4 - CHARGE_STAT2A (inout floating)
|
459 |
* PB5 - BUZZER (alternate 2 pushpull floating)
|
460 |
* PB6 - GAUGE_BATLOW2 (input floating)
|
461 |
* PB7 - GAUGE_BATGD2_N (input floating)
|
462 |
* PB8 - GAUGE_SCL2 (alternate 4 opendrain floating)
|
463 |
* PB9 - GAUGE_SDA2 (alternate 4 opendrain floating)
|
464 |
* PB10 - GAUGE_SCL1 (alternate 4 opendrain floating)
|
465 |
* PB11 - GAUGE_SDA1 (alternate 4 opendrain floating)
|
466 |
* PB12 - LED (output opendrain high)
|
467 |
* PB13 - BT_RTS (alternate 7 pushpull floating)
|
468 |
* PB14 - BT_CTS (inout floating)
|
469 |
* PB15 - SYS_UART_UP (output opendrain high)
|
470 |
*/
|
471 |
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_IR_INT1_N) | \
|
472 |
PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) | \ |
473 |
PIN_MODE_OUTPUT(GPIOB_POWER_EN) | \ |
474 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) | \ |
475 |
PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) | \ |
476 |
PIN_MODE_ALTERNATE(GPIOB_BUZZER) | \ |
477 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) | \ |
478 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) | \ |
479 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) | \ |
480 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) | \ |
481 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) | \ |
482 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) | \ |
483 |
PIN_MODE_OUTPUT(GPIOB_LED) | \ |
484 |
PIN_MODE_ALTERNATE(GPIOB_BT_RTS) | \ |
485 |
PIN_MODE_INPUT(GPIOB_BT_CTS) | \ |
486 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP)) |
487 |
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) | \
|
488 |
PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) | \ |
489 |
PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) | \ |
490 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) | \ |
491 |
PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) | \ |
492 |
PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) | \ |
493 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) | \ |
494 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) | \ |
495 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) | \ |
496 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) | \ |
497 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) | \ |
498 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) | \ |
499 |
PIN_OTYPE_OPENDRAIN(GPIOB_LED) | \ |
500 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) | \ |
501 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) | \ |
502 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP)) |
503 |
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) | \
|
504 |
PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) | \ |
505 |
PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) | \ |
506 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) | \ |
507 |
PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) | \ |
508 |
PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) | \ |
509 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) | \ |
510 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) | \ |
511 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) | \ |
512 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) | \ |
513 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) | \ |
514 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) | \ |
515 |
PIN_OSPEED_VERYHIGH(GPIOB_LED) | \ |
516 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) | \ |
517 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) | \ |
518 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP)) |
519 |
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) | \
|
520 |
PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) | \ |
521 |
PIN_PUPDR_FLOATING(GPIOB_POWER_EN) | \ |
522 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) | \ |
523 |
PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) | \ |
524 |
PIN_PUPDR_FLOATING(GPIOB_BUZZER) | \ |
525 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) | \ |
526 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) | \ |
527 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) | \ |
528 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) | \ |
529 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) | \ |
530 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) | \ |
531 |
PIN_PUPDR_FLOATING(GPIOB_LED) | \ |
532 |
PIN_PUPDR_FLOATING(GPIOB_BT_RTS) | \ |
533 |
PIN_PUPDR_FLOATING(GPIOB_BT_CTS) | \ |
534 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP)) |
535 |
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_IR_INT1_N) | \
|
536 |
PIN_ODR_HIGH(GPIOB_VSYS_SENSE) | \ |
537 |
PIN_ODR_HIGH(GPIOB_POWER_EN) | \ |
538 |
PIN_ODR_HIGH(GPIOB_SYS_UART_DN) | \ |
539 |
PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) | \ |
540 |
PIN_ODR_HIGH(GPIOB_BUZZER) | \ |
541 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) | \ |
542 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) | \ |
543 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) | \ |
544 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) | \ |
545 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL1) | \ |
546 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA1) | \ |
547 |
PIN_ODR_HIGH(GPIOB_LED) | \ |
548 |
PIN_ODR_HIGH(GPIOB_BT_RTS) | \ |
549 |
PIN_ODR_HIGH(GPIOB_BT_CTS) | \ |
550 |
PIN_ODR_HIGH(GPIOB_SYS_UART_UP)) |
551 |
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_IR_INT1_N, STM32F4xx_AF_system) | \
|
552 |
PIN_AFIO_AF(GPIOB_VSYS_SENSE, STM32F4xx_AF_system) | \ |
553 |
PIN_AFIO_AF(GPIOB_POWER_EN, STM32F4xx_AF_system) | \ |
554 |
PIN_AFIO_AF(GPIOB_SYS_UART_DN, STM32F4xx_AF_system) | \ |
555 |
PIN_AFIO_AF(GPIOB_CHARGE_STAT2A, STM32F4xx_AF_system) | \ |
556 |
PIN_AFIO_AF(GPIOB_BUZZER, STM32F4xx_AF_TIM3to5) | \ |
557 |
PIN_AFIO_AF(GPIOB_GAUGE_BATLOW2, STM32F4xx_AF_system) | \ |
558 |
PIN_AFIO_AF(GPIOB_GAUGE_BATGD2_N, STM32F4xx_AF_system)) |
559 |
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, STM32F4xx_AF_I2C1to3) | \
|
560 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA2, STM32F4xx_AF_I2C1to3) | \ |
561 |
PIN_AFIO_AF(GPIOB_GAUGE_SCL1, STM32F4xx_AF_I2C1to3) | \ |
562 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA1, STM32F4xx_AF_I2C1to3) | \ |
563 |
PIN_AFIO_AF(GPIOB_LED, STM32F4xx_AF_system) | \ |
564 |
PIN_AFIO_AF(GPIOB_BT_RTS, STM32F4xx_AF_USART1to3) | \ |
565 |
PIN_AFIO_AF(GPIOB_BT_CTS, STM32F4xx_AF_USART1to3) | \ |
566 |
PIN_AFIO_AF(GPIOB_SYS_UART_UP, STM32F4xx_AF_system)) |
567 |
|
568 |
/*
|
569 |
* GPIOC setup:
|
570 |
*
|
571 |
* PC0 - CHARGE_STAT1A (input floating)
|
572 |
* PC1 - GAUGE_BATLOW1 (input floating)
|
573 |
* PC2 - GAUGE_BATGD1_N (input floating)
|
574 |
* PC3 - CHARGE_EN1_N (output opendrain high)
|
575 |
* PC4 - IR_INT2_N (input floating)
|
576 |
* PC5 - TOUCH_INT_N (input floating)
|
577 |
* PC6 - SYS_DONE (input floating)
|
578 |
* PC7 - SYS_PROG_N (output opendrain high)
|
579 |
* PC8 - PATH_DC (input floating)
|
580 |
* PC9 - SYS_SPI_DIR (output opendrain high)
|
581 |
* PC10 - BT_RX (alternate 7 pushpull floating)
|
582 |
* PC11 - BT_TX (alternate 7 pushpull floating)
|
583 |
* PC12 - SYS_INT_N (output opendrain low)
|
584 |
* PC13 - SYS_PD_N (output opendrain high)
|
585 |
* PC14 - SYS_WARMRST_N (output opendrain high)
|
586 |
* PC15 - BT_RST (output opendrain high)
|
587 |
*/
|
588 |
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) | \
|
589 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) | \ |
590 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) | \ |
591 |
PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) | \ |
592 |
PIN_MODE_INPUT(GPIOC_IR_INT2_N) | \ |
593 |
PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) | \ |
594 |
PIN_MODE_INPUT(GPIOC_SYS_DONE) | \ |
595 |
PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) | \ |
596 |
PIN_MODE_INPUT(GPIOC_PATH_DC) | \ |
597 |
PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) | \ |
598 |
PIN_MODE_ALTERNATE(GPIOC_BT_RX) | \ |
599 |
PIN_MODE_ALTERNATE(GPIOC_BT_TX) | \ |
600 |
PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) | \ |
601 |
PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) | \ |
602 |
PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) | \ |
603 |
PIN_MODE_OUTPUT(GPIOC_BT_RST)) |
604 |
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_CHARGE_STAT1A) | \
|
605 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATLOW1) | \ |
606 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATGD1_N) | \ |
607 |
PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) | \ |
608 |
PIN_OTYPE_PUSHPULL(GPIOC_IR_INT2_N) | \ |
609 |
PIN_OTYPE_PUSHPULL(GPIOC_TOUCH_INT_N) | \ |
610 |
PIN_OTYPE_PUSHPULL(GPIOC_SYS_DONE) | \ |
611 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) | \ |
612 |
PIN_OTYPE_PUSHPULL(GPIOC_PATH_DC) | \ |
613 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) | \ |
614 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) | \ |
615 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_TX) | \ |
616 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) | \ |
617 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) | \ |
618 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) | \ |
619 |
PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST)) |
620 |
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_STAT1A) | \
|
621 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATLOW1) | \ |
622 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATGD1_N) | \ |
623 |
PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_EN1_N) | \ |
624 |
PIN_OSPEED_VERYHIGH(GPIOC_IR_INT2_N) | \ |
625 |
PIN_OSPEED_VERYHIGH(GPIOC_TOUCH_INT_N) | \ |
626 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_DONE) | \ |
627 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PROG_N) | \ |
628 |
PIN_OSPEED_VERYHIGH(GPIOC_PATH_DC) | \ |
629 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_SPI_DIR) | \ |
630 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RX) | \ |
631 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_TX) | \ |
632 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_INT_N) | \ |
633 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PD_N) | \ |
634 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_WARMRST_N) | \ |
635 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RST)) |
636 |
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_CHARGE_STAT1A) | \
|
637 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATLOW1) | \ |
638 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATGD1_N) | \ |
639 |
PIN_PUPDR_FLOATING(GPIOC_CHARGE_EN1_N) | \ |
640 |
PIN_PUPDR_FLOATING(GPIOC_IR_INT2_N) | \ |
641 |
PIN_PUPDR_FLOATING(GPIOC_TOUCH_INT_N) | \ |
642 |
PIN_PUPDR_FLOATING(GPIOC_SYS_DONE) | \ |
643 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PROG_N) | \ |
644 |
PIN_PUPDR_FLOATING(GPIOC_PATH_DC) | \ |
645 |
PIN_PUPDR_FLOATING(GPIOC_SYS_SPI_DIR) | \ |
646 |
PIN_PUPDR_FLOATING(GPIOC_BT_RX) | \ |
647 |
PIN_PUPDR_FLOATING(GPIOC_BT_TX) | \ |
648 |
PIN_PUPDR_FLOATING(GPIOC_SYS_INT_N) | \ |
649 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PD_N) | \ |
650 |
PIN_PUPDR_FLOATING(GPIOC_SYS_WARMRST_N) | \ |
651 |
PIN_PUPDR_FLOATING(GPIOC_BT_RST)) |
652 |
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_CHARGE_STAT1A) | \
|
653 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATLOW1) | \ |
654 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATGD1_N) | \ |
655 |
PIN_ODR_HIGH(GPIOC_CHARGE_EN1_N) | \ |
656 |
PIN_ODR_HIGH(GPIOC_IR_INT2_N) | \ |
657 |
PIN_ODR_HIGH(GPIOC_TOUCH_INT_N) | \ |
658 |
PIN_ODR_HIGH(GPIOC_SYS_DONE) | \ |
659 |
PIN_ODR_HIGH(GPIOC_SYS_PROG_N) | \ |
660 |
PIN_ODR_LOW(GPIOC_PATH_DC) | \ |
661 |
PIN_ODR_HIGH(GPIOC_SYS_SPI_DIR) | \ |
662 |
PIN_ODR_HIGH(GPIOC_BT_RX) | \ |
663 |
PIN_ODR_HIGH(GPIOC_BT_TX) | \ |
664 |
PIN_ODR_LOW(GPIOC_SYS_INT_N) | \ |
665 |
PIN_ODR_HIGH(GPIOC_SYS_PD_N) | \ |
666 |
PIN_ODR_HIGH(GPIOC_SYS_WARMRST_N) | \ |
667 |
PIN_ODR_HIGH(GPIOC_BT_RST)) |
668 |
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_CHARGE_STAT1A, STM32F4xx_AF_system) | \
|
669 |
PIN_AFIO_AF(GPIOC_GAUGE_BATLOW1, STM32F4xx_AF_system) | \ |
670 |
PIN_AFIO_AF(GPIOC_GAUGE_BATGD1_N, STM32F4xx_AF_system) | \ |
671 |
PIN_AFIO_AF(GPIOC_CHARGE_EN1_N, STM32F4xx_AF_system) | \ |
672 |
PIN_AFIO_AF(GPIOC_IR_INT2_N, STM32F4xx_AF_system) | \ |
673 |
PIN_AFIO_AF(GPIOC_TOUCH_INT_N, STM32F4xx_AF_system) | \ |
674 |
PIN_AFIO_AF(GPIOC_SYS_DONE, STM32F4xx_AF_system) | \ |
675 |
PIN_AFIO_AF(GPIOC_SYS_PROG_N, STM32F4xx_AF_system)) |
676 |
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PATH_DC, STM32F4xx_AF_system) | \
|
677 |
PIN_AFIO_AF(GPIOC_SYS_SPI_DIR, STM32F4xx_AF_system) | \ |
678 |
PIN_AFIO_AF(GPIOC_BT_RX, STM32F4xx_AF_USART1to3) | \ |
679 |
PIN_AFIO_AF(GPIOC_BT_TX, STM32F4xx_AF_USART1to3) | \ |
680 |
PIN_AFIO_AF(GPIOC_SYS_INT_N, STM32F4xx_AF_system) | \ |
681 |
PIN_AFIO_AF(GPIOC_SYS_PD_N, STM32F4xx_AF_system) | \ |
682 |
PIN_AFIO_AF(GPIOC_SYS_WARMRST_N, STM32F4xx_AF_system) | \ |
683 |
PIN_AFIO_AF(GPIOC_BT_RST, STM32F4xx_AF_system)) |
684 |
|
685 |
/*
|
686 |
* GPIOD setup:
|
687 |
*
|
688 |
* PD0 - PIN0 (input floating)
|
689 |
* PD1 - PIN1 (input floating)
|
690 |
* PD2 - CHARGE_EN2_N (output opendrain high)
|
691 |
* PD3 - PIN3 (input floating)
|
692 |
* PD4 - PIN4 (input floating)
|
693 |
* PD5 - PIN5 (input floating)
|
694 |
* PD6 - PIN6 (input floating)
|
695 |
* PD7 - PIN7 (input floating)
|
696 |
* PD8 - PIN8 (input floating)
|
697 |
* PD9 - PIN9 (input floating)
|
698 |
* PD10 - PIN10 (input floating)
|
699 |
* PD11 - PIN11 (input floating)
|
700 |
* PD12 - PIN12 (input floating)
|
701 |
* PD13 - PIN13 (input floating)
|
702 |
* PD14 - PIN14 (input floating)
|
703 |
* PD15 - PIN15 (input floating)
|
704 |
*/
|
705 |
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
706 |
PIN_MODE_INPUT(GPIOD_PIN1) | \ |
707 |
PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) | \ |
708 |
PIN_MODE_INPUT(GPIOD_PIN3) | \ |
709 |
PIN_MODE_INPUT(GPIOD_PIN4) | \ |
710 |
PIN_MODE_INPUT(GPIOD_PIN5) | \ |
711 |
PIN_MODE_INPUT(GPIOD_PIN6) | \ |
712 |
PIN_MODE_INPUT(GPIOD_PIN7) | \ |
713 |
PIN_MODE_INPUT(GPIOD_PIN8) | \ |
714 |
PIN_MODE_INPUT(GPIOD_PIN9) | \ |
715 |
PIN_MODE_INPUT(GPIOD_PIN10) | \ |
716 |
PIN_MODE_INPUT(GPIOD_PIN11) | \ |
717 |
PIN_MODE_INPUT(GPIOD_PIN12) | \ |
718 |
PIN_MODE_INPUT(GPIOD_PIN13) | \ |
719 |
PIN_MODE_INPUT(GPIOD_PIN14) | \ |
720 |
PIN_MODE_INPUT(GPIOD_PIN15)) |
721 |
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
722 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ |
723 |
PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N) | \ |
724 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ |
725 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ |
726 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ |
727 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ |
728 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ |
729 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ |
730 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ |
731 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ |
732 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ |
733 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ |
734 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ |
735 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ |
736 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) |
737 |
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOD_PIN0) | \
|
738 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN1) | \ |
739 |
PIN_OSPEED_VERYHIGH(GPIOD_CHARGE_EN2_N) | \ |
740 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN3) | \ |
741 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN4) | \ |
742 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN5) | \ |
743 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN6) | \ |
744 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN7) | \ |
745 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN8) | \ |
746 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN9) | \ |
747 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN10) | \ |
748 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN11) | \ |
749 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN12) | \ |
750 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN13) | \ |
751 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN14) | \ |
752 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN15)) |
753 |
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
754 |
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ |
755 |
PIN_PUPDR_FLOATING(GPIOD_CHARGE_EN2_N) | \ |
756 |
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ |
757 |
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ |
758 |
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ |
759 |
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ |
760 |
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ |
761 |
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ |
762 |
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ |
763 |
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ |
764 |
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ |
765 |
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ |
766 |
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ |
767 |
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ |
768 |
PIN_PUPDR_PULLUP(GPIOD_PIN15)) |
769 |
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
770 |
PIN_ODR_HIGH(GPIOD_PIN1) | \ |
771 |
PIN_ODR_HIGH(GPIOD_CHARGE_EN2_N) | \ |
772 |
PIN_ODR_HIGH(GPIOD_PIN3) | \ |
773 |
PIN_ODR_HIGH(GPIOD_PIN4) | \ |
774 |
PIN_ODR_HIGH(GPIOD_PIN5) | \ |
775 |
PIN_ODR_HIGH(GPIOD_PIN6) | \ |
776 |
PIN_ODR_HIGH(GPIOD_PIN7) | \ |
777 |
PIN_ODR_HIGH(GPIOD_PIN8) | \ |
778 |
PIN_ODR_HIGH(GPIOD_PIN9) | \ |
779 |
PIN_ODR_HIGH(GPIOD_PIN10) | \ |
780 |
PIN_ODR_HIGH(GPIOD_PIN11) | \ |
781 |
PIN_ODR_HIGH(GPIOD_PIN12) | \ |
782 |
PIN_ODR_HIGH(GPIOD_PIN13) | \ |
783 |
PIN_ODR_HIGH(GPIOD_PIN14) | \ |
784 |
PIN_ODR_HIGH(GPIOD_PIN15)) |
785 |
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, STM32F4xx_AF_system) | \
|
786 |
PIN_AFIO_AF(GPIOD_PIN1, STM32F4xx_AF_system) | \ |
787 |
PIN_AFIO_AF(GPIOD_CHARGE_EN2_N, STM32F4xx_AF_system) | \ |
788 |
PIN_AFIO_AF(GPIOD_PIN3, STM32F4xx_AF_system) | \ |
789 |
PIN_AFIO_AF(GPIOD_PIN4, STM32F4xx_AF_system) | \ |
790 |
PIN_AFIO_AF(GPIOD_PIN5, STM32F4xx_AF_system) | \ |
791 |
PIN_AFIO_AF(GPIOD_PIN6, STM32F4xx_AF_system) | \ |
792 |
PIN_AFIO_AF(GPIOD_PIN7, STM32F4xx_AF_system)) |
793 |
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, STM32F4xx_AF_system) | \
|
794 |
PIN_AFIO_AF(GPIOD_PIN9, STM32F4xx_AF_system) | \ |
795 |
PIN_AFIO_AF(GPIOD_PIN10, STM32F4xx_AF_system) | \ |
796 |
PIN_AFIO_AF(GPIOD_PIN11, STM32F4xx_AF_system) | \ |
797 |
PIN_AFIO_AF(GPIOD_PIN12, STM32F4xx_AF_system) | \ |
798 |
PIN_AFIO_AF(GPIOD_PIN13, STM32F4xx_AF_system) | \ |
799 |
PIN_AFIO_AF(GPIOD_PIN14, STM32F4xx_AF_system) | \ |
800 |
PIN_AFIO_AF(GPIOD_PIN15, STM32F4xx_AF_system)) |
801 |
|
802 |
/*
|
803 |
* GPIOE setup:
|
804 |
*
|
805 |
* PE0 - PIN0 (input floating)
|
806 |
* PE1 - PIN1 (input floating)
|
807 |
* PE2 - PIN2 (input floating)
|
808 |
* PE3 - PIN3 (input floating)
|
809 |
* PE4 - PIN4 (input floating)
|
810 |
* PE5 - PIN5 (input floating)
|
811 |
* PE6 - PIN6 (input floating)
|
812 |
* PE7 - PIN7 (input floating)
|
813 |
* PE8 - PIN8 (input floating)
|
814 |
* PE9 - PIN9 (input floating)
|
815 |
* PE10 - PIN10 (input floating)
|
816 |
* PE11 - PIN11 (input floating)
|
817 |
* PE12 - PIN12 (input floating)
|
818 |
* PE13 - PIN13 (input floating)
|
819 |
* PE14 - PIN14 (input floating)
|
820 |
* PE15 - PIN15 (input floating)
|
821 |
*/
|
822 |
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
823 |
PIN_MODE_INPUT(GPIOE_PIN1) | \ |
824 |
PIN_MODE_INPUT(GPIOE_PIN2) | \ |
825 |
PIN_MODE_INPUT(GPIOE_PIN3) | \ |
826 |
PIN_MODE_INPUT(GPIOE_PIN4) | \ |
827 |
PIN_MODE_INPUT(GPIOE_PIN5) | \ |
828 |
PIN_MODE_INPUT(GPIOE_PIN6) | \ |
829 |
PIN_MODE_INPUT(GPIOE_PIN7) | \ |
830 |
PIN_MODE_INPUT(GPIOE_PIN8) | \ |
831 |
PIN_MODE_INPUT(GPIOE_PIN9) | \ |
832 |
PIN_MODE_INPUT(GPIOE_PIN10) | \ |
833 |
PIN_MODE_INPUT(GPIOE_PIN11) | \ |
834 |
PIN_MODE_INPUT(GPIOE_PIN12) | \ |
835 |
PIN_MODE_INPUT(GPIOE_PIN13) | \ |
836 |
PIN_MODE_INPUT(GPIOE_PIN14) | \ |
837 |
PIN_MODE_INPUT(GPIOE_PIN15)) |
838 |
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
|
839 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ |
840 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ |
841 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ |
842 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ |
843 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ |
844 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ |
845 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ |
846 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ |
847 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ |
848 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ |
849 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ |
850 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ |
851 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ |
852 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ |
853 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) |
854 |
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_LOW(GPIOE_PIN0) | \
|
855 |
PIN_OSPEED_LOW(GPIOE_PIN1) | \ |
856 |
PIN_OSPEED_LOW(GPIOE_PIN2) | \ |
857 |
PIN_OSPEED_LOW(GPIOE_PIN3) | \ |
858 |
PIN_OSPEED_LOW(GPIOE_PIN4) | \ |
859 |
PIN_OSPEED_LOW(GPIOE_PIN5) | \ |
860 |
PIN_OSPEED_LOW(GPIOE_PIN6) | \ |
861 |
PIN_OSPEED_LOW(GPIOE_PIN7) | \ |
862 |
PIN_OSPEED_LOW(GPIOE_PIN8) | \ |
863 |
PIN_OSPEED_LOW(GPIOE_PIN9) | \ |
864 |
PIN_OSPEED_LOW(GPIOE_PIN10) | \ |
865 |
PIN_OSPEED_LOW(GPIOE_PIN11) | \ |
866 |
PIN_OSPEED_LOW(GPIOE_PIN12) | \ |
867 |
PIN_OSPEED_LOW(GPIOE_PIN13) | \ |
868 |
PIN_OSPEED_LOW(GPIOE_PIN14) | \ |
869 |
PIN_OSPEED_LOW(GPIOE_PIN15)) |
870 |
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \
|
871 |
PIN_PUPDR_FLOATING(GPIOE_PIN1) | \ |
872 |
PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ |
873 |
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ |
874 |
PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ |
875 |
PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ |
876 |
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ |
877 |
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ |
878 |
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ |
879 |
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ |
880 |
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ |
881 |
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ |
882 |
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ |
883 |
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ |
884 |
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ |
885 |
PIN_PUPDR_FLOATING(GPIOE_PIN15)) |
886 |
#define VAL_GPIOE_ODR (PIN_ODR_LOW(GPIOE_PIN0) | \
|
887 |
PIN_ODR_LOW(GPIOE_PIN1) | \ |
888 |
PIN_ODR_LOW(GPIOE_PIN2) | \ |
889 |
PIN_ODR_LOW(GPIOE_PIN3) | \ |
890 |
PIN_ODR_LOW(GPIOE_PIN4) | \ |
891 |
PIN_ODR_LOW(GPIOE_PIN5) | \ |
892 |
PIN_ODR_LOW(GPIOE_PIN6) | \ |
893 |
PIN_ODR_LOW(GPIOE_PIN7) | \ |
894 |
PIN_ODR_LOW(GPIOE_PIN8) | \ |
895 |
PIN_ODR_LOW(GPIOE_PIN9) | \ |
896 |
PIN_ODR_LOW(GPIOE_PIN10) | \ |
897 |
PIN_ODR_LOW(GPIOE_PIN11) | \ |
898 |
PIN_ODR_LOW(GPIOE_PIN12) | \ |
899 |
PIN_ODR_LOW(GPIOE_PIN13) | \ |
900 |
PIN_ODR_LOW(GPIOE_PIN14) | \ |
901 |
PIN_ODR_LOW(GPIOE_PIN15)) |
902 |
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, STM32F4xx_AF_system) | \
|
903 |
PIN_AFIO_AF(GPIOE_PIN1, STM32F4xx_AF_system) | \ |
904 |
PIN_AFIO_AF(GPIOE_PIN2, STM32F4xx_AF_system) | \ |
905 |
PIN_AFIO_AF(GPIOE_PIN3, STM32F4xx_AF_system) | \ |
906 |
PIN_AFIO_AF(GPIOE_PIN4, STM32F4xx_AF_system) | \ |
907 |
PIN_AFIO_AF(GPIOE_PIN5, STM32F4xx_AF_system) | \ |
908 |
PIN_AFIO_AF(GPIOE_PIN6, STM32F4xx_AF_system) | \ |
909 |
PIN_AFIO_AF(GPIOE_PIN7, STM32F4xx_AF_system)) |
910 |
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, STM32F4xx_AF_system) | \
|
911 |
PIN_AFIO_AF(GPIOE_PIN9, STM32F4xx_AF_system) | \ |
912 |
PIN_AFIO_AF(GPIOE_PIN10, STM32F4xx_AF_system) | \ |
913 |
PIN_AFIO_AF(GPIOE_PIN11, STM32F4xx_AF_system) | \ |
914 |
PIN_AFIO_AF(GPIOE_PIN12, STM32F4xx_AF_system) | \ |
915 |
PIN_AFIO_AF(GPIOE_PIN13, STM32F4xx_AF_system) | \ |
916 |
PIN_AFIO_AF(GPIOE_PIN14, STM32F4xx_AF_system) | \ |
917 |
PIN_AFIO_AF(GPIOE_PIN15, STM32F4xx_AF_system)) |
918 |
|
919 |
/*
|
920 |
* GPIOF setup:
|
921 |
*
|
922 |
* PF0 - PIN0 (input floating)
|
923 |
* PF1 - PIN1 (input floating)
|
924 |
* PF2 - PIN2 (input floating)
|
925 |
* PF3 - PIN3 (input floating)
|
926 |
* PF4 - PIN4 (input floating)
|
927 |
* PF5 - PIN5 (input floating)
|
928 |
* PF6 - PIN6 (input floating)
|
929 |
* PF7 - PIN7 (input floating)
|
930 |
* PF8 - PIN8 (input floating)
|
931 |
* PF9 - PIN9 (input floating)
|
932 |
* PF10 - PIN10 (input floating)
|
933 |
* PF11 - PIN11 (input floating)
|
934 |
* PF12 - PIN12 (input floating)
|
935 |
* PF13 - PIN13 (input floating)
|
936 |
* PF14 - PIN14 (input floating)
|
937 |
* PF15 - PIN15 (input floating)
|
938 |
*/
|
939 |
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \
|
940 |
PIN_MODE_INPUT(GPIOF_PIN1) | \ |
941 |
PIN_MODE_INPUT(GPIOF_PIN2) | \ |
942 |
PIN_MODE_INPUT(GPIOF_PIN3) | \ |
943 |
PIN_MODE_INPUT(GPIOF_PIN4) | \ |
944 |
PIN_MODE_INPUT(GPIOF_PIN5) | \ |
945 |
PIN_MODE_INPUT(GPIOF_PIN6) | \ |
946 |
PIN_MODE_INPUT(GPIOF_PIN7) | \ |
947 |
PIN_MODE_INPUT(GPIOF_PIN8) | \ |
948 |
PIN_MODE_INPUT(GPIOF_PIN9) | \ |
949 |
PIN_MODE_INPUT(GPIOF_PIN10) | \ |
950 |
PIN_MODE_INPUT(GPIOF_PIN11) | \ |
951 |
PIN_MODE_INPUT(GPIOF_PIN12) | \ |
952 |
PIN_MODE_INPUT(GPIOF_PIN13) | \ |
953 |
PIN_MODE_INPUT(GPIOF_PIN14) | \ |
954 |
PIN_MODE_INPUT(GPIOF_PIN15)) |
955 |
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
|
956 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ |
957 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ |
958 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ |
959 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ |
960 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ |
961 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ |
962 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ |
963 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ |
964 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ |
965 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ |
966 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ |
967 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ |
968 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ |
969 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ |
970 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) |
971 |
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_LOW(GPIOF_PIN0) | \
|
972 |
PIN_OSPEED_LOW(GPIOF_PIN1) | \ |
973 |
PIN_OSPEED_LOW(GPIOF_PIN2) | \ |
974 |
PIN_OSPEED_LOW(GPIOF_PIN3) | \ |
975 |
PIN_OSPEED_LOW(GPIOF_PIN4) | \ |
976 |
PIN_OSPEED_LOW(GPIOF_PIN5) | \ |
977 |
PIN_OSPEED_LOW(GPIOF_PIN6) | \ |
978 |
PIN_OSPEED_LOW(GPIOF_PIN7) | \ |
979 |
PIN_OSPEED_LOW(GPIOF_PIN8) | \ |
980 |
PIN_OSPEED_LOW(GPIOF_PIN9) | \ |
981 |
PIN_OSPEED_LOW(GPIOF_PIN10) | \ |
982 |
PIN_OSPEED_LOW(GPIOF_PIN11) | \ |
983 |
PIN_OSPEED_LOW(GPIOF_PIN12) | \ |
984 |
PIN_OSPEED_LOW(GPIOF_PIN13) | \ |
985 |
PIN_OSPEED_LOW(GPIOF_PIN14) | \ |
986 |
PIN_OSPEED_LOW(GPIOF_PIN15)) |
987 |
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \
|
988 |
PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ |
989 |
PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ |
990 |
PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ |
991 |
PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ |
992 |
PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ |
993 |
PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ |
994 |
PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ |
995 |
PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ |
996 |
PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ |
997 |
PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ |
998 |
PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ |
999 |
PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ |
1000 |
PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ |
1001 |
PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ |
1002 |
PIN_PUPDR_FLOATING(GPIOF_PIN15)) |
1003 |
#define VAL_GPIOF_ODR (PIN_ODR_LOW(GPIOF_PIN0) | \
|
1004 |
PIN_ODR_LOW(GPIOF_PIN1) | \ |
1005 |
PIN_ODR_LOW(GPIOF_PIN2) | \ |
1006 |
PIN_ODR_LOW(GPIOF_PIN3) | \ |
1007 |
PIN_ODR_LOW(GPIOF_PIN4) | \ |
1008 |
PIN_ODR_LOW(GPIOF_PIN5) | \ |
1009 |
PIN_ODR_LOW(GPIOF_PIN6) | \ |
1010 |
PIN_ODR_LOW(GPIOF_PIN7) | \ |
1011 |
PIN_ODR_LOW(GPIOF_PIN8) | \ |
1012 |
PIN_ODR_LOW(GPIOF_PIN9) | \ |
1013 |
PIN_ODR_LOW(GPIOF_PIN10) | \ |
1014 |
PIN_ODR_LOW(GPIOF_PIN11) | \ |
1015 |
PIN_ODR_LOW(GPIOF_PIN12) | \ |
1016 |
PIN_ODR_LOW(GPIOF_PIN13) | \ |
1017 |
PIN_ODR_LOW(GPIOF_PIN14) | \ |
1018 |
PIN_ODR_LOW(GPIOF_PIN15)) |
1019 |
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, STM32F4xx_AF_system) | \
|
1020 |
PIN_AFIO_AF(GPIOF_PIN1, STM32F4xx_AF_system) | \ |
1021 |
PIN_AFIO_AF(GPIOF_PIN2, STM32F4xx_AF_system) | \ |
1022 |
PIN_AFIO_AF(GPIOF_PIN3, STM32F4xx_AF_system) | \ |
1023 |
PIN_AFIO_AF(GPIOF_PIN4, STM32F4xx_AF_system) | \ |
1024 |
PIN_AFIO_AF(GPIOF_PIN5, STM32F4xx_AF_system) | \ |
1025 |
PIN_AFIO_AF(GPIOF_PIN6, STM32F4xx_AF_system) | \ |
1026 |
PIN_AFIO_AF(GPIOF_PIN7, STM32F4xx_AF_system)) |
1027 |
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, STM32F4xx_AF_system) | \
|
1028 |
PIN_AFIO_AF(GPIOF_PIN9, STM32F4xx_AF_system) | \ |
1029 |
PIN_AFIO_AF(GPIOF_PIN10, STM32F4xx_AF_system) | \ |
1030 |
PIN_AFIO_AF(GPIOF_PIN11, STM32F4xx_AF_system) | \ |
1031 |
PIN_AFIO_AF(GPIOF_PIN12, STM32F4xx_AF_system) | \ |
1032 |
PIN_AFIO_AF(GPIOF_PIN13, STM32F4xx_AF_system) | \ |
1033 |
PIN_AFIO_AF(GPIOF_PIN14, STM32F4xx_AF_system) | \ |
1034 |
PIN_AFIO_AF(GPIOF_PIN15, STM32F4xx_AF_system)) |
1035 |
|
1036 |
/*
|
1037 |
* GPIOG setup:
|
1038 |
*
|
1039 |
* PG0 - PIN0 (input floating)
|
1040 |
* PG1 - PIN1 (input floating)
|
1041 |
* PG2 - PIN2 (input floating)
|
1042 |
* PG3 - PIN3 (input floating)
|
1043 |
* PG4 - PIN4 (input floating)
|
1044 |
* PG5 - PIN5 (input floating)
|
1045 |
* PG6 - PIN6 (input floating)
|
1046 |
* PG7 - PIN7 (input floating)
|
1047 |
* PG8 - PIN8 (input floating)
|
1048 |
* PG9 - PIN9 (input floating)
|
1049 |
* PG10 - PIN10 (input floating)
|
1050 |
* PG11 - PIN11 (input floating)
|
1051 |
* PG12 - PIN12 (input floating)
|
1052 |
* PG13 - PIN13 (input floating)
|
1053 |
* PG14 - PIN14 (input floating)
|
1054 |
* PG15 - PIN15 (input floating)
|
1055 |
*/
|
1056 |
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
|
1057 |
PIN_MODE_INPUT(GPIOG_PIN1) | \ |
1058 |
PIN_MODE_INPUT(GPIOG_PIN2) | \ |
1059 |
PIN_MODE_INPUT(GPIOG_PIN3) | \ |
1060 |
PIN_MODE_INPUT(GPIOG_PIN4) | \ |
1061 |
PIN_MODE_INPUT(GPIOG_PIN5) | \ |
1062 |
PIN_MODE_INPUT(GPIOG_PIN6) | \ |
1063 |
PIN_MODE_INPUT(GPIOG_PIN7) | \ |
1064 |
PIN_MODE_INPUT(GPIOG_PIN8) | \ |
1065 |
PIN_MODE_INPUT(GPIOG_PIN9) | \ |
1066 |
PIN_MODE_INPUT(GPIOG_PIN10) | \ |
1067 |
PIN_MODE_INPUT(GPIOG_PIN11) | \ |
1068 |
PIN_MODE_INPUT(GPIOG_PIN12) | \ |
1069 |
PIN_MODE_INPUT(GPIOG_PIN13) | \ |
1070 |
PIN_MODE_INPUT(GPIOG_PIN14) | \ |
1071 |
PIN_MODE_INPUT(GPIOG_PIN15)) |
1072 |
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
|
1073 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ |
1074 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ |
1075 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ |
1076 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ |
1077 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ |
1078 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ |
1079 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ |
1080 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ |
1081 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ |
1082 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ |
1083 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ |
1084 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ |
1085 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ |
1086 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ |
1087 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) |
1088 |
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_LOW(GPIOG_PIN0) | \
|
1089 |
PIN_OSPEED_LOW(GPIOG_PIN1) | \ |
1090 |
PIN_OSPEED_LOW(GPIOG_PIN2) | \ |
1091 |
PIN_OSPEED_LOW(GPIOG_PIN3) | \ |
1092 |
PIN_OSPEED_LOW(GPIOG_PIN4) | \ |
1093 |
PIN_OSPEED_LOW(GPIOG_PIN5) | \ |
1094 |
PIN_OSPEED_LOW(GPIOG_PIN6) | \ |
1095 |
PIN_OSPEED_LOW(GPIOG_PIN7) | \ |
1096 |
PIN_OSPEED_LOW(GPIOG_PIN8) | \ |
1097 |
PIN_OSPEED_LOW(GPIOG_PIN9) | \ |
1098 |
PIN_OSPEED_LOW(GPIOG_PIN10) | \ |
1099 |
PIN_OSPEED_LOW(GPIOG_PIN11) | \ |
1100 |
PIN_OSPEED_LOW(GPIOG_PIN12) | \ |
1101 |
PIN_OSPEED_LOW(GPIOG_PIN13) | \ |
1102 |
PIN_OSPEED_LOW(GPIOG_PIN14) | \ |
1103 |
PIN_OSPEED_LOW(GPIOG_PIN15)) |
1104 |
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
|
1105 |
PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ |
1106 |
PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ |
1107 |
PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ |
1108 |
PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ |
1109 |
PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ |
1110 |
PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ |
1111 |
PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ |
1112 |
PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ |
1113 |
PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ |
1114 |
PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ |
1115 |
PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ |
1116 |
PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ |
1117 |
PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ |
1118 |
PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ |
1119 |
PIN_PUPDR_FLOATING(GPIOG_PIN15)) |
1120 |
#define VAL_GPIOG_ODR (PIN_ODR_LOW(GPIOG_PIN0) | \
|
1121 |
PIN_ODR_LOW(GPIOG_PIN1) | \ |
1122 |
PIN_ODR_LOW(GPIOG_PIN2) | \ |
1123 |
PIN_ODR_LOW(GPIOG_PIN3) | \ |
1124 |
PIN_ODR_LOW(GPIOG_PIN4) | \ |
1125 |
PIN_ODR_LOW(GPIOG_PIN5) | \ |
1126 |
PIN_ODR_LOW(GPIOG_PIN6) | \ |
1127 |
PIN_ODR_LOW(GPIOG_PIN7) | \ |
1128 |
PIN_ODR_LOW(GPIOG_PIN8) | \ |
1129 |
PIN_ODR_LOW(GPIOG_PIN9) | \ |
1130 |
PIN_ODR_LOW(GPIOG_PIN10) | \ |
1131 |
PIN_ODR_LOW(GPIOG_PIN11) | \ |
1132 |
PIN_ODR_LOW(GPIOG_PIN12) | \ |
1133 |
PIN_ODR_LOW(GPIOG_PIN13) | \ |
1134 |
PIN_ODR_LOW(GPIOG_PIN14) | \ |
1135 |
PIN_ODR_LOW(GPIOG_PIN15)) |
1136 |
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, STM32F4xx_AF_system) | \
|
1137 |
PIN_AFIO_AF(GPIOG_PIN1, STM32F4xx_AF_system) | \ |
1138 |
PIN_AFIO_AF(GPIOG_PIN2, STM32F4xx_AF_system) | \ |
1139 |
PIN_AFIO_AF(GPIOG_PIN3, STM32F4xx_AF_system) | \ |
1140 |
PIN_AFIO_AF(GPIOG_PIN4, STM32F4xx_AF_system) | \ |
1141 |
PIN_AFIO_AF(GPIOG_PIN5, STM32F4xx_AF_system) | \ |
1142 |
PIN_AFIO_AF(GPIOG_PIN6, STM32F4xx_AF_system) | \ |
1143 |
PIN_AFIO_AF(GPIOG_PIN7, STM32F4xx_AF_system)) |
1144 |
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, STM32F4xx_AF_system) | \
|
1145 |
PIN_AFIO_AF(GPIOG_PIN9, STM32F4xx_AF_system) | \ |
1146 |
PIN_AFIO_AF(GPIOG_PIN10, STM32F4xx_AF_system) | \ |
1147 |
PIN_AFIO_AF(GPIOG_PIN11, STM32F4xx_AF_system) | \ |
1148 |
PIN_AFIO_AF(GPIOG_PIN12, STM32F4xx_AF_system) | \ |
1149 |
PIN_AFIO_AF(GPIOG_PIN13, STM32F4xx_AF_system) | \ |
1150 |
PIN_AFIO_AF(GPIOG_PIN14, STM32F4xx_AF_system) | \ |
1151 |
PIN_AFIO_AF(GPIOG_PIN15, STM32F4xx_AF_system)) |
1152 |
|
1153 |
/*
|
1154 |
* GPIOH setup:
|
1155 |
*
|
1156 |
* PH0 - OSC_IN (input floating)
|
1157 |
* PH1 - OSC_OUT (input floating)
|
1158 |
* PH2 - PIN2 (input floating)
|
1159 |
* PH3 - PIN3 (input floating)
|
1160 |
* PH4 - PIN4 (input floating)
|
1161 |
* PH5 - PIN5 (input floating)
|
1162 |
* PH6 - PIN6 (input floating)
|
1163 |
* PH7 - PIN7 (input floating)
|
1164 |
* PH8 - PIN8 (input floating)
|
1165 |
* PH9 - PIN9 (input floating)
|
1166 |
* PH10 - PIN10 (input floating)
|
1167 |
* PH11 - PIN11 (input floating)
|
1168 |
* PH12 - PIN12 (input floating)
|
1169 |
* PH13 - PIN13 (input floating)
|
1170 |
* PH14 - PIN14 (input floating)
|
1171 |
* PH15 - PIN15 (input floating)
|
1172 |
*/
|
1173 |
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
|
1174 |
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ |
1175 |
PIN_MODE_INPUT(GPIOH_PIN2) | \ |
1176 |
PIN_MODE_INPUT(GPIOH_PIN3) | \ |
1177 |
PIN_MODE_INPUT(GPIOH_PIN4) | \ |
1178 |
PIN_MODE_INPUT(GPIOH_PIN5) | \ |
1179 |
PIN_MODE_INPUT(GPIOH_PIN6) | \ |
1180 |
PIN_MODE_INPUT(GPIOH_PIN7) | \ |
1181 |
PIN_MODE_INPUT(GPIOH_PIN8) | \ |
1182 |
PIN_MODE_INPUT(GPIOH_PIN9) | \ |
1183 |
PIN_MODE_INPUT(GPIOH_PIN10) | \ |
1184 |
PIN_MODE_INPUT(GPIOH_PIN11) | \ |
1185 |
PIN_MODE_INPUT(GPIOH_PIN12) | \ |
1186 |
PIN_MODE_INPUT(GPIOH_PIN13) | \ |
1187 |
PIN_MODE_INPUT(GPIOH_PIN14) | \ |
1188 |
PIN_MODE_INPUT(GPIOH_PIN15)) |
1189 |
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
|
1190 |
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ |
1191 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ |
1192 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ |
1193 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ |
1194 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ |
1195 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ |
1196 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ |
1197 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ |
1198 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ |
1199 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ |
1200 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ |
1201 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ |
1202 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ |
1203 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ |
1204 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) |
1205 |
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOH_OSC_IN) | \
|
1206 |
PIN_OSPEED_VERYHIGH(GPIOH_OSC_OUT) | \ |
1207 |
PIN_OSPEED_LOW(GPIOH_PIN2) | \ |
1208 |
PIN_OSPEED_LOW(GPIOH_PIN3) | \ |
1209 |
PIN_OSPEED_LOW(GPIOH_PIN4) | \ |
1210 |
PIN_OSPEED_LOW(GPIOH_PIN5) | \ |
1211 |
PIN_OSPEED_LOW(GPIOH_PIN6) | \ |
1212 |
PIN_OSPEED_LOW(GPIOH_PIN7) | \ |
1213 |
PIN_OSPEED_LOW(GPIOH_PIN8) | \ |
1214 |
PIN_OSPEED_LOW(GPIOH_PIN9) | \ |
1215 |
PIN_OSPEED_LOW(GPIOH_PIN10) | \ |
1216 |
PIN_OSPEED_LOW(GPIOH_PIN11) | \ |
1217 |
PIN_OSPEED_LOW(GPIOH_PIN12) | \ |
1218 |
PIN_OSPEED_LOW(GPIOH_PIN13) | \ |
1219 |
PIN_OSPEED_LOW(GPIOH_PIN14) | \ |
1220 |
PIN_OSPEED_LOW(GPIOH_PIN15)) |
1221 |
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
1222 |
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ |
1223 |
PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ |
1224 |
PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ |
1225 |
PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ |
1226 |
PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ |
1227 |
PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ |
1228 |
PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ |
1229 |
PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ |
1230 |
PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ |
1231 |
PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ |
1232 |
PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ |
1233 |
PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ |
1234 |
PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ |
1235 |
PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ |
1236 |
PIN_PUPDR_FLOATING(GPIOH_PIN15)) |
1237 |
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
1238 |
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ |
1239 |
PIN_ODR_HIGH(GPIOH_PIN2) | \ |
1240 |
PIN_ODR_HIGH(GPIOH_PIN3) | \ |
1241 |
PIN_ODR_HIGH(GPIOH_PIN4) | \ |
1242 |
PIN_ODR_HIGH(GPIOH_PIN5) | \ |
1243 |
PIN_ODR_HIGH(GPIOH_PIN6) | \ |
1244 |
PIN_ODR_HIGH(GPIOH_PIN7) | \ |
1245 |
PIN_ODR_HIGH(GPIOH_PIN8) | \ |
1246 |
PIN_ODR_HIGH(GPIOH_PIN9) | \ |
1247 |
PIN_ODR_HIGH(GPIOH_PIN10) | \ |
1248 |
PIN_ODR_HIGH(GPIOH_PIN11) | \ |
1249 |
PIN_ODR_HIGH(GPIOH_PIN12) | \ |
1250 |
PIN_ODR_HIGH(GPIOH_PIN13) | \ |
1251 |
PIN_ODR_HIGH(GPIOH_PIN14) | \ |
1252 |
PIN_ODR_HIGH(GPIOH_PIN15)) |
1253 |
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, STM32F4xx_AF_system) | \
|
1254 |
PIN_AFIO_AF(GPIOH_OSC_OUT, STM32F4xx_AF_system) | \ |
1255 |
PIN_AFIO_AF(GPIOH_PIN2, STM32F4xx_AF_system) | \ |
1256 |
PIN_AFIO_AF(GPIOH_PIN3, STM32F4xx_AF_system) | \ |
1257 |
PIN_AFIO_AF(GPIOH_PIN4, STM32F4xx_AF_system) | \ |
1258 |
PIN_AFIO_AF(GPIOH_PIN5, STM32F4xx_AF_system) | \ |
1259 |
PIN_AFIO_AF(GPIOH_PIN6, STM32F4xx_AF_system) | \ |
1260 |
PIN_AFIO_AF(GPIOH_PIN7, STM32F4xx_AF_system)) |
1261 |
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, STM32F4xx_AF_system) | \
|
1262 |
PIN_AFIO_AF(GPIOH_PIN9, STM32F4xx_AF_system) | \ |
1263 |
PIN_AFIO_AF(GPIOH_PIN10, STM32F4xx_AF_system) | \ |
1264 |
PIN_AFIO_AF(GPIOH_PIN11, STM32F4xx_AF_system) | \ |
1265 |
PIN_AFIO_AF(GPIOH_PIN12, STM32F4xx_AF_system) | \ |
1266 |
PIN_AFIO_AF(GPIOH_PIN13, STM32F4xx_AF_system) | \ |
1267 |
PIN_AFIO_AF(GPIOH_PIN14, STM32F4xx_AF_system) | \ |
1268 |
PIN_AFIO_AF(GPIOH_PIN15, STM32F4xx_AF_system)) |
1269 |
|
1270 |
/*
|
1271 |
* GPIOI setup:
|
1272 |
*
|
1273 |
* PI0 - PIN0 (input floating)
|
1274 |
* PI1 - PIN1 (input floating)
|
1275 |
* PI2 - PIN2 (input floating)
|
1276 |
* PI3 - PIN3 (input floating)
|
1277 |
* PI4 - PIN4 (input floating)
|
1278 |
* PI5 - PIN5 (input floating)
|
1279 |
* PI6 - PIN6 (input floating)
|
1280 |
* PI7 - PIN7 (input floating)
|
1281 |
* PI8 - PIN8 (input floating)
|
1282 |
* PI9 - PIN9 (input floating)
|
1283 |
* PI10 - PIN10 (input floating)
|
1284 |
* PI11 - PIN11 (input floating)
|
1285 |
* PI12 - PIN12 (input floating)
|
1286 |
* PI13 - PIN13 (input floating)
|
1287 |
* PI14 - PIN14 (input floating)
|
1288 |
* PI15 - PIN15 (input floating)
|
1289 |
*/
|
1290 |
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
|
1291 |
PIN_MODE_INPUT(GPIOI_PIN1) | \ |
1292 |
PIN_MODE_INPUT(GPIOI_PIN2) | \ |
1293 |
PIN_MODE_INPUT(GPIOI_PIN3) | \ |
1294 |
PIN_MODE_INPUT(GPIOI_PIN4) | \ |
1295 |
PIN_MODE_INPUT(GPIOI_PIN5) | \ |
1296 |
PIN_MODE_INPUT(GPIOI_PIN6) | \ |
1297 |
PIN_MODE_INPUT(GPIOI_PIN7) | \ |
1298 |
PIN_MODE_INPUT(GPIOI_PIN8) | \ |
1299 |
PIN_MODE_INPUT(GPIOI_PIN9) | \ |
1300 |
PIN_MODE_INPUT(GPIOI_PIN10) | \ |
1301 |
PIN_MODE_INPUT(GPIOI_PIN11) | \ |
1302 |
PIN_MODE_INPUT(GPIOI_PIN12) | \ |
1303 |
PIN_MODE_INPUT(GPIOI_PIN13) | \ |
1304 |
PIN_MODE_INPUT(GPIOI_PIN14) | \ |
1305 |
PIN_MODE_INPUT(GPIOI_PIN15)) |
1306 |
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
|
1307 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ |
1308 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ |
1309 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ |
1310 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ |
1311 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ |
1312 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ |
1313 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ |
1314 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ |
1315 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ |
1316 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ |
1317 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ |
1318 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ |
1319 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ |
1320 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ |
1321 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) |
1322 |
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_LOW(GPIOI_PIN0) | \
|
1323 |
PIN_OSPEED_LOW(GPIOI_PIN1) | \ |
1324 |
PIN_OSPEED_LOW(GPIOI_PIN2) | \ |
1325 |
PIN_OSPEED_LOW(GPIOI_PIN3) | \ |
1326 |
PIN_OSPEED_LOW(GPIOI_PIN4) | \ |
1327 |
PIN_OSPEED_LOW(GPIOI_PIN5) | \ |
1328 |
PIN_OSPEED_LOW(GPIOI_PIN6) | \ |
1329 |
PIN_OSPEED_LOW(GPIOI_PIN7) | \ |
1330 |
PIN_OSPEED_LOW(GPIOI_PIN8) | \ |
1331 |
PIN_OSPEED_LOW(GPIOI_PIN9) | \ |
1332 |
PIN_OSPEED_LOW(GPIOI_PIN10) | \ |
1333 |
PIN_OSPEED_LOW(GPIOI_PIN11) | \ |
1334 |
PIN_OSPEED_LOW(GPIOI_PIN12) | \ |
1335 |
PIN_OSPEED_LOW(GPIOI_PIN13) | \ |
1336 |
PIN_OSPEED_LOW(GPIOI_PIN14) | \ |
1337 |
PIN_OSPEED_LOW(GPIOI_PIN15)) |
1338 |
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \
|
1339 |
PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ |
1340 |
PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ |
1341 |
PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ |
1342 |
PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ |
1343 |
PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ |
1344 |
PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ |
1345 |
PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ |
1346 |
PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ |
1347 |
PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ |
1348 |
PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ |
1349 |
PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ |
1350 |
PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ |
1351 |
PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ |
1352 |
PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ |
1353 |
PIN_PUPDR_FLOATING(GPIOI_PIN15)) |
1354 |
#define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \
|
1355 |
PIN_ODR_LOW(GPIOI_PIN1) | \ |
1356 |
PIN_ODR_LOW(GPIOI_PIN2) | \ |
1357 |
PIN_ODR_LOW(GPIOI_PIN3) | \ |
1358 |
PIN_ODR_LOW(GPIOI_PIN4) | \ |
1359 |
PIN_ODR_LOW(GPIOI_PIN5) | \ |
1360 |
PIN_ODR_LOW(GPIOI_PIN6) | \ |
1361 |
PIN_ODR_LOW(GPIOI_PIN7) | \ |
1362 |
PIN_ODR_LOW(GPIOI_PIN8) | \ |
1363 |
PIN_ODR_LOW(GPIOI_PIN9) | \ |
1364 |
PIN_ODR_LOW(GPIOI_PIN10) | \ |
1365 |
PIN_ODR_LOW(GPIOI_PIN11) | \ |
1366 |
PIN_ODR_LOW(GPIOI_PIN12) | \ |
1367 |
PIN_ODR_LOW(GPIOI_PIN13) | \ |
1368 |
PIN_ODR_LOW(GPIOI_PIN14) | \ |
1369 |
PIN_ODR_LOW(GPIOI_PIN15)) |
1370 |
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, STM32F4xx_AF_system) | \
|
1371 |
PIN_AFIO_AF(GPIOI_PIN1, STM32F4xx_AF_system) | \ |
1372 |
PIN_AFIO_AF(GPIOI_PIN2, STM32F4xx_AF_system) | \ |
1373 |
PIN_AFIO_AF(GPIOI_PIN3, STM32F4xx_AF_system) | \ |
1374 |
PIN_AFIO_AF(GPIOI_PIN4, STM32F4xx_AF_system) | \ |
1375 |
PIN_AFIO_AF(GPIOI_PIN5, STM32F4xx_AF_system) | \ |
1376 |
PIN_AFIO_AF(GPIOI_PIN6, STM32F4xx_AF_system) | \ |
1377 |
PIN_AFIO_AF(GPIOI_PIN7, STM32F4xx_AF_system)) |
1378 |
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, STM32F4xx_AF_system) | \
|
1379 |
PIN_AFIO_AF(GPIOI_PIN9, STM32F4xx_AF_system) | \ |
1380 |
PIN_AFIO_AF(GPIOI_PIN10, STM32F4xx_AF_system) | \ |
1381 |
PIN_AFIO_AF(GPIOI_PIN11, STM32F4xx_AF_system) | \ |
1382 |
PIN_AFIO_AF(GPIOI_PIN12, STM32F4xx_AF_system) | \ |
1383 |
PIN_AFIO_AF(GPIOI_PIN13, STM32F4xx_AF_system) | \ |
1384 |
PIN_AFIO_AF(GPIOI_PIN14, STM32F4xx_AF_system) | \ |
1385 |
PIN_AFIO_AF(GPIOI_PIN15, STM32F4xx_AF_system)) |
1386 |
|
1387 |
#if !defined(_FROM_ASM_)
|
1388 |
#ifdef __cplusplus
|
1389 |
extern "C" { |
1390 |
#endif
|
1391 |
void boardInit(void); |
1392 |
#ifdef __cplusplus
|
1393 |
} |
1394 |
#endif
|
1395 |
#endif /* _FROM_ASM_ */ |
1396 |
|
1397 |
#endif /* BOARD_H */ |
1398 |
|
1399 |
/** @} */
|