amiro-blt / Target / Modules / PowerManagement_1-1 / Boot / lib / stdperiphlib / CMSIS / Include / core_cmInstr.h @ 367c0652
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1 | 69661903 | Thomas Schöpping | /**************************************************************************//** |
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2 | * @file core_cmInstr.h
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3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
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4 | * @version V3.01
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5 | * @date 06. March 2012
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6 | *
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7 | * @note
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8 | * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
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9 | *
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10 | * @par
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11 | * ARM Limited (ARM) is supplying this software for use with Cortex-M
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12 | * processor based microcontrollers. This file can be freely distributed
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13 | * within development tools that are supporting such ARM based processors.
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14 | *
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15 | * @par
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16 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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17 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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18 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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19 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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20 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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21 | *
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22 | ******************************************************************************/
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23 | |||
24 | #ifndef __CORE_CMINSTR_H
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25 | #define __CORE_CMINSTR_H
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26 | |||
27 | |||
28 | /* ########################## Core Instruction Access ######################### */
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29 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
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30 | Access to dedicated instructions
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31 | @{
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32 | */
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33 | |||
34 | #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ |
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35 | /* ARM armcc specific functions */
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36 | |||
37 | #if (__ARMCC_VERSION < 400677) |
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38 | #error "Please use ARM Compiler Toolchain V4.0.677 or later!" |
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39 | #endif
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40 | |||
41 | |||
42 | /** \brief No Operation
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43 | |||
44 | No Operation does nothing. This instruction can be used for code alignment purposes.
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45 | */
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46 | #define __NOP __nop
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47 | |||
48 | |||
49 | /** \brief Wait For Interrupt
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50 | |||
51 | Wait For Interrupt is a hint instruction that suspends execution
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52 | until one of a number of events occurs.
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53 | */
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54 | #define __WFI __wfi
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55 | |||
56 | |||
57 | /** \brief Wait For Event
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58 | |||
59 | Wait For Event is a hint instruction that permits the processor to enter
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60 | a low-power state until one of a number of events occurs.
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61 | */
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62 | #define __WFE __wfe
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63 | |||
64 | |||
65 | /** \brief Send Event
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66 | |||
67 | Send Event is a hint instruction. It causes an event to be signaled to the CPU.
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68 | */
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69 | #define __SEV __sev
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70 | |||
71 | |||
72 | /** \brief Instruction Synchronization Barrier
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73 | |||
74 | Instruction Synchronization Barrier flushes the pipeline in the processor,
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75 | so that all instructions following the ISB are fetched from cache or
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76 | memory, after the instruction has been completed.
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77 | */
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78 | #define __ISB() __isb(0xF) |
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79 | |||
80 | |||
81 | /** \brief Data Synchronization Barrier
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82 | |||
83 | This function acts as a special kind of Data Memory Barrier.
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84 | It completes when all explicit memory accesses before this instruction complete.
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85 | */
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86 | #define __DSB() __dsb(0xF) |
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87 | |||
88 | |||
89 | /** \brief Data Memory Barrier
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90 | |||
91 | This function ensures the apparent order of the explicit memory operations before
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92 | and after the instruction, without ensuring their completion.
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93 | */
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94 | #define __DMB() __dmb(0xF) |
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95 | |||
96 | |||
97 | /** \brief Reverse byte order (32 bit)
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98 | |||
99 | This function reverses the byte order in integer value.
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100 | |||
101 | \param [in] value Value to reverse
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102 | \return Reversed value
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103 | */
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104 | #define __REV __rev
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105 | |||
106 | |||
107 | /** \brief Reverse byte order (16 bit)
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108 | |||
109 | This function reverses the byte order in two unsigned short values.
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110 | |||
111 | \param [in] value Value to reverse
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112 | \return Reversed value
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113 | */
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114 | __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
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115 | { |
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116 | rev16 r0, r0 |
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117 | bx lr |
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118 | } |
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119 | |||
120 | |||
121 | /** \brief Reverse byte order in signed short value
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122 | |||
123 | This function reverses the byte order in a signed short value with sign extension to integer.
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124 | |||
125 | \param [in] value Value to reverse
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126 | \return Reversed value
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127 | */
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128 | __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
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129 | { |
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130 | revsh r0, r0 |
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131 | bx lr |
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132 | } |
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133 | |||
134 | |||
135 | /** \brief Rotate Right in unsigned value (32 bit)
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136 | |||
137 | This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
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138 | |||
139 | \param [in] value Value to rotate
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140 | \param [in] value Number of Bits to rotate
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141 | \return Rotated value
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142 | */
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143 | #define __ROR __ror
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144 | |||
145 | |||
146 | #if (__CORTEX_M >= 0x03) |
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147 | |||
148 | /** \brief Reverse bit order of value
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149 | |||
150 | This function reverses the bit order of the given value.
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151 | |||
152 | \param [in] value Value to reverse
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153 | \return Reversed value
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154 | */
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155 | #define __RBIT __rbit
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156 | |||
157 | |||
158 | /** \brief LDR Exclusive (8 bit)
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159 | |||
160 | This function performs a exclusive LDR command for 8 bit value.
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161 | |||
162 | \param [in] ptr Pointer to data
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163 | \return value of type uint8_t at (*ptr)
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164 | */
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165 | #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
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166 | |||
167 | |||
168 | /** \brief LDR Exclusive (16 bit)
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169 | |||
170 | This function performs a exclusive LDR command for 16 bit values.
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171 | |||
172 | \param [in] ptr Pointer to data
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173 | \return value of type uint16_t at (*ptr)
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174 | */
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175 | #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
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176 | |||
177 | |||
178 | /** \brief LDR Exclusive (32 bit)
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179 | |||
180 | This function performs a exclusive LDR command for 32 bit values.
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181 | |||
182 | \param [in] ptr Pointer to data
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183 | \return value of type uint32_t at (*ptr)
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184 | */
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185 | #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
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186 | |||
187 | |||
188 | /** \brief STR Exclusive (8 bit)
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189 | |||
190 | This function performs a exclusive STR command for 8 bit values.
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191 | |||
192 | \param [in] value Value to store
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193 | \param [in] ptr Pointer to location
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194 | \return 0 Function succeeded
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195 | \return 1 Function failed
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196 | */
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197 | #define __STREXB(value, ptr) __strex(value, ptr)
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198 | |||
199 | |||
200 | /** \brief STR Exclusive (16 bit)
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201 | |||
202 | This function performs a exclusive STR command for 16 bit values.
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203 | |||
204 | \param [in] value Value to store
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205 | \param [in] ptr Pointer to location
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206 | \return 0 Function succeeded
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207 | \return 1 Function failed
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208 | */
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209 | #define __STREXH(value, ptr) __strex(value, ptr)
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210 | |||
211 | |||
212 | /** \brief STR Exclusive (32 bit)
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213 | |||
214 | This function performs a exclusive STR command for 32 bit values.
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215 | |||
216 | \param [in] value Value to store
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217 | \param [in] ptr Pointer to location
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218 | \return 0 Function succeeded
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219 | \return 1 Function failed
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220 | */
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221 | #define __STREXW(value, ptr) __strex(value, ptr)
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222 | |||
223 | |||
224 | /** \brief Remove the exclusive lock
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225 | |||
226 | This function removes the exclusive lock which is created by LDREX.
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227 | |||
228 | */
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229 | #define __CLREX __clrex
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230 | |||
231 | |||
232 | /** \brief Signed Saturate
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233 | |||
234 | This function saturates a signed value.
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235 | |||
236 | \param [in] value Value to be saturated
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237 | \param [in] sat Bit position to saturate to (1..32)
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238 | \return Saturated value
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239 | */
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240 | #define __SSAT __ssat
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241 | |||
242 | |||
243 | /** \brief Unsigned Saturate
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244 | |||
245 | This function saturates an unsigned value.
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246 | |||
247 | \param [in] value Value to be saturated
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248 | \param [in] sat Bit position to saturate to (0..31)
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249 | \return Saturated value
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250 | */
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251 | #define __USAT __usat
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252 | |||
253 | |||
254 | /** \brief Count leading zeros
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255 | |||
256 | This function counts the number of leading zeros of a data value.
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257 | |||
258 | \param [in] value Value to count the leading zeros
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259 | \return number of leading zeros in value
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260 | */
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261 | #define __CLZ __clz
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262 | |||
263 | #endif /* (__CORTEX_M >= 0x03) */ |
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264 | |||
265 | |||
266 | |||
267 | #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/ |
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268 | /* IAR iccarm specific functions */
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269 | |||
270 | #include <cmsis_iar.h> |
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271 | |||
272 | |||
273 | #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ |
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274 | /* TI CCS specific functions */
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275 | |||
276 | #include <cmsis_ccs.h> |
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277 | |||
278 | |||
279 | #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ |
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280 | /* GNU gcc specific functions */
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281 | |||
282 | /** \brief No Operation
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283 | |||
284 | No Operation does nothing. This instruction can be used for code alignment purposes.
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285 | */
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286 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void) |
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287 | { |
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288 | __ASM volatile ("nop"); |
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289 | } |
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290 | |||
291 | |||
292 | /** \brief Wait For Interrupt
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293 | |||
294 | Wait For Interrupt is a hint instruction that suspends execution
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295 | until one of a number of events occurs.
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296 | */
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297 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void) |
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298 | { |
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299 | __ASM volatile ("wfi"); |
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300 | } |
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301 | |||
302 | |||
303 | /** \brief Wait For Event
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304 | |||
305 | Wait For Event is a hint instruction that permits the processor to enter
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306 | a low-power state until one of a number of events occurs.
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307 | */
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308 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void) |
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309 | { |
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310 | __ASM volatile ("wfe"); |
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311 | } |
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312 | |||
313 | |||
314 | /** \brief Send Event
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315 | |||
316 | Send Event is a hint instruction. It causes an event to be signaled to the CPU.
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317 | */
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318 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void) |
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319 | { |
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320 | __ASM volatile ("sev"); |
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321 | } |
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322 | |||
323 | |||
324 | /** \brief Instruction Synchronization Barrier
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325 | |||
326 | Instruction Synchronization Barrier flushes the pipeline in the processor,
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327 | so that all instructions following the ISB are fetched from cache or
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328 | memory, after the instruction has been completed.
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329 | */
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330 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void) |
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331 | { |
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332 | __ASM volatile ("isb"); |
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333 | } |
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334 | |||
335 | |||
336 | /** \brief Data Synchronization Barrier
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337 | |||
338 | This function acts as a special kind of Data Memory Barrier.
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339 | It completes when all explicit memory accesses before this instruction complete.
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340 | */
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341 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void) |
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342 | { |
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343 | __ASM volatile ("dsb"); |
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344 | } |
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345 | |||
346 | |||
347 | /** \brief Data Memory Barrier
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348 | |||
349 | This function ensures the apparent order of the explicit memory operations before
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350 | and after the instruction, without ensuring their completion.
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351 | */
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352 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void) |
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353 | { |
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354 | __ASM volatile ("dmb"); |
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355 | } |
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356 | |||
357 | |||
358 | /** \brief Reverse byte order (32 bit)
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359 | |||
360 | This function reverses the byte order in integer value.
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361 | |||
362 | \param [in] value Value to reverse
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363 | \return Reversed value
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364 | */
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365 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value) |
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366 | { |
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367 | uint32_t result; |
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368 | |||
369 | __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); |
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370 | return(result);
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371 | } |
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372 | |||
373 | |||
374 | /** \brief Reverse byte order (16 bit)
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375 | |||
376 | This function reverses the byte order in two unsigned short values.
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377 | |||
378 | \param [in] value Value to reverse
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379 | \return Reversed value
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380 | */
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381 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value) |
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382 | { |
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383 | uint32_t result; |
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384 | |||
385 | __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); |
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386 | return(result);
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387 | } |
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388 | |||
389 | |||
390 | /** \brief Reverse byte order in signed short value
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391 | |||
392 | This function reverses the byte order in a signed short value with sign extension to integer.
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393 | |||
394 | \param [in] value Value to reverse
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395 | \return Reversed value
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396 | */
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397 | __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value) |
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398 | { |
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399 | uint32_t result; |
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400 | |||
401 | __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); |
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402 | return(result);
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403 | } |
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404 | |||
405 | |||
406 | /** \brief Rotate Right in unsigned value (32 bit)
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407 | |||
408 | This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
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409 | |||
410 | \param [in] value Value to rotate
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411 | \param [in] value Number of Bits to rotate
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412 | \return Rotated value
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413 | */
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414 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2) |
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415 | { |
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416 | |||
417 | __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) ); |
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418 | return(op1);
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419 | } |
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420 | |||
421 | |||
422 | #if (__CORTEX_M >= 0x03) |
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423 | |||
424 | /** \brief Reverse bit order of value
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425 | |||
426 | This function reverses the bit order of the given value.
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427 | |||
428 | \param [in] value Value to reverse
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429 | \return Reversed value
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430 | */
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431 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value) |
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432 | { |
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433 | uint32_t result; |
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434 | |||
435 | __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); |
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436 | return(result);
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437 | } |
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438 | |||
439 | |||
440 | /** \brief LDR Exclusive (8 bit)
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441 | |||
442 | This function performs a exclusive LDR command for 8 bit value.
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443 | |||
444 | \param [in] ptr Pointer to data
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445 | \return value of type uint8_t at (*ptr)
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446 | */
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447 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
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448 | { |
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449 | uint8_t result; |
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450 | |||
451 | __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); |
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452 | return(result);
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453 | } |
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454 | |||
455 | |||
456 | /** \brief LDR Exclusive (16 bit)
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457 | |||
458 | This function performs a exclusive LDR command for 16 bit values.
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459 | |||
460 | \param [in] ptr Pointer to data
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461 | \return value of type uint16_t at (*ptr)
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462 | */
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463 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
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464 | { |
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465 | uint16_t result; |
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466 | |||
467 | __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); |
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468 | return(result);
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469 | } |
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470 | |||
471 | |||
472 | /** \brief LDR Exclusive (32 bit)
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473 | |||
474 | This function performs a exclusive LDR command for 32 bit values.
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475 | |||
476 | \param [in] ptr Pointer to data
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477 | \return value of type uint32_t at (*ptr)
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478 | */
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479 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
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480 | { |
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481 | uint32_t result; |
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482 | |||
483 | __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); |
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484 | return(result);
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485 | } |
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486 | |||
487 | |||
488 | /** \brief STR Exclusive (8 bit)
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489 | |||
490 | This function performs a exclusive STR command for 8 bit values.
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491 | |||
492 | \param [in] value Value to store
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493 | \param [in] ptr Pointer to location
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494 | \return 0 Function succeeded
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495 | \return 1 Function failed
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496 | */
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497 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
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498 | { |
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499 | uint32_t result; |
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500 | |||
501 | __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); |
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502 | return(result);
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503 | } |
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504 | |||
505 | |||
506 | /** \brief STR Exclusive (16 bit)
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507 | |||
508 | This function performs a exclusive STR command for 16 bit values.
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509 | |||
510 | \param [in] value Value to store
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511 | \param [in] ptr Pointer to location
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512 | \return 0 Function succeeded
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513 | \return 1 Function failed
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514 | */
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515 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
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516 | { |
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517 | uint32_t result; |
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518 | |||
519 | __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); |
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520 | return(result);
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521 | } |
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522 | |||
523 | |||
524 | /** \brief STR Exclusive (32 bit)
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525 | |||
526 | This function performs a exclusive STR command for 32 bit values.
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527 | |||
528 | \param [in] value Value to store
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529 | \param [in] ptr Pointer to location
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530 | \return 0 Function succeeded
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531 | \return 1 Function failed
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532 | */
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533 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
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534 | { |
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535 | uint32_t result; |
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536 | |||
537 | __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) ); |
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538 | return(result);
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539 | } |
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540 | |||
541 | |||
542 | /** \brief Remove the exclusive lock
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543 | |||
544 | This function removes the exclusive lock which is created by LDREX.
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545 | |||
546 | */
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547 | __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void) |
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548 | { |
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549 | __ASM volatile ("clrex"); |
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550 | } |
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551 | |||
552 | |||
553 | /** \brief Signed Saturate
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554 | |||
555 | This function saturates a signed value.
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||
556 | |||
557 | \param [in] value Value to be saturated
|
||
558 | \param [in] sat Bit position to saturate to (1..32)
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||
559 | \return Saturated value
|
||
560 | */
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||
561 | #define __SSAT(ARG1,ARG2) \
|
||
562 | ({ \ |
||
563 | uint32_t __RES, __ARG1 = (ARG1); \ |
||
564 | __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ |
||
565 | __RES; \ |
||
566 | }) |
||
567 | |||
568 | |||
569 | /** \brief Unsigned Saturate
|
||
570 | |||
571 | This function saturates an unsigned value.
|
||
572 | |||
573 | \param [in] value Value to be saturated
|
||
574 | \param [in] sat Bit position to saturate to (0..31)
|
||
575 | \return Saturated value
|
||
576 | */
|
||
577 | #define __USAT(ARG1,ARG2) \
|
||
578 | ({ \ |
||
579 | uint32_t __RES, __ARG1 = (ARG1); \ |
||
580 | __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ |
||
581 | __RES; \ |
||
582 | }) |
||
583 | |||
584 | |||
585 | /** \brief Count leading zeros
|
||
586 | |||
587 | This function counts the number of leading zeros of a data value.
|
||
588 | |||
589 | \param [in] value Value to count the leading zeros
|
||
590 | \return number of leading zeros in value
|
||
591 | */
|
||
592 | __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value) |
||
593 | { |
||
594 | uint8_t result; |
||
595 | |||
596 | __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) ); |
||
597 | return(result);
|
||
598 | } |
||
599 | |||
600 | #endif /* (__CORTEX_M >= 0x03) */ |
||
601 | |||
602 | |||
603 | |||
604 | |||
605 | #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/ |
||
606 | /* TASKING carm specific functions */
|
||
607 | |||
608 | /*
|
||
609 | * The CMSIS functions have been implemented as intrinsics in the compiler.
|
||
610 | * Please use "carm -?i" to get an up to date list of all intrinsics,
|
||
611 | * Including the CMSIS ones.
|
||
612 | */
|
||
613 | |||
614 | #endif
|
||
615 | |||
616 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ |
||
617 | |||
618 | #endif /* __CORE_CMINSTR_H */ |