amiro-blt / Target / Source / ARMCM4_STM32 / GCC / vectors.c @ 69661903
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/************************************************************************************//** |
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* \file Source\ARMCM4_STM32\GCC\vectors.c
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* \brief Bootloader interrupt vector table source file.
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* \ingroup Target_ARMCM4_STM32
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2013 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with OpenBLT.
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* If not, see <http://www.gnu.org/licenses/>.
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*
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* A special exception to the GPL is included to allow you to distribute a combined work
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* that includes OpenBLT without being obliged to provide the source code for any
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* proprietary components. The exception text is included at the bottom of the license
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* file <license.html>.
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*
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* \endinternal
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "boot.h" /* bootloader generic header */ |
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/****************************************************************************************
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* External data declarations
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****************************************************************************************/
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extern blt_int32u _estack; /* stack end address (memory.x) */ |
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/************************************************************************************//** |
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** \brief Catch-all for unused interrrupt service routines.
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** \return none.
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**
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****************************************************************************************/
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void UnusedISR(void) |
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{ |
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/* unexpected interrupt occured, so trigger an assertion to halt the system */
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ASSERT_RT(BLT_FALSE); |
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} /*** end of UnusedISR ***/
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/****************************************************************************************
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* I N T E R R U P T V E C T O R T A B L E
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****************************************************************************************/
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extern void reset_handler(void); /* implemented in cstart.c */ |
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/** \brief Structure type for vector table entries. */
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typedef union |
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{ |
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void (*func)(void); /**< for ISR function pointers */ |
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blt_int32u ptr; /**< for stack pointer entry */
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}tIsrFunc; |
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/** \brief Interrupt vector table. */
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__attribute__ ((section(".isr_vector")))
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const tIsrFunc _vectab[] =
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{ |
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{ .ptr = (blt_int32u)&_estack }, /* the initial stack pointer */
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{ reset_handler }, /* the reset handler */
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{ UnusedISR }, /* NMI Handler */
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{ UnusedISR }, /* Hard Fault Handler */
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{ UnusedISR }, /* MPU Fault Handler */
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{ UnusedISR }, /* Bus Fault Handler */
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{ UnusedISR }, /* Usage Fault Handler */
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{ UnusedISR }, /* Reserved */
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{ UnusedISR }, /* Reserved */
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{ UnusedISR }, /* Reserved */
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{ UnusedISR }, /* Reserved */
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{ UnusedISR }, /* SVCall Handler */
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{ UnusedISR }, /* Debug Monitor Handler */
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{ UnusedISR }, /* Reserved */
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{ UnusedISR }, /* PendSV Handler */
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{ UnusedISR }, /* SysTick Handler */
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{ UnusedISR }, /* Window Watchdog */
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{ UnusedISR }, /* PVD through EXTI Line detect */
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{ UnusedISR }, /* Tamper */
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{ UnusedISR }, /* RTC */
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{ UnusedISR }, /* Flash */
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{ UnusedISR }, /* RCC */
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{ UnusedISR }, /* EXTI Line 0 */
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{ UnusedISR }, /* EXTI Line 1 */
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{ UnusedISR }, /* EXTI Line 2 */
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{ UnusedISR }, /* EXTI Line 3 */
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{ UnusedISR }, /* EXTI Line 4 */
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{ UnusedISR }, /* DMA1 Channel 0 */
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{ UnusedISR }, /* DMA1 Channel 1 */
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{ UnusedISR }, /* DMA1 Channel 2 */
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{ UnusedISR }, /* DMA1 Channel 3 */
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{ UnusedISR }, /* DMA1 Channel 4 */
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{ UnusedISR }, /* DMA1 Channel 5 */
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{ UnusedISR }, /* DMA1 Channel 6 */
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{ UnusedISR }, /* ADC1 and ADC2, ADC3s */
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{ UnusedISR }, /* CAN1 TX */
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{ UnusedISR }, /* CAN1 RX0 */
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{ UnusedISR }, /* CAN1 RX1 */
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{ UnusedISR }, /* CAN1 SCE */
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{ UnusedISR }, /* EXTI Line 9..5 */
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{ UnusedISR }, /* TIM1 Break and TIM9 */
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{ UnusedISR }, /* TIM1 Update and TIM10 */
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{ UnusedISR }, /* TIM1 Trigger/Comm. and TIM11 */
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{ UnusedISR }, /* TIM1 Capture Compare */
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{ UnusedISR }, /* TIM2 */
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{ UnusedISR }, /* TIM3 */
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{ UnusedISR }, /* TIM4 */
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{ UnusedISR }, /* I2C1 Event */
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{ UnusedISR }, /* I2C1 Error */
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{ UnusedISR }, /* I2C2 Event */
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{ UnusedISR }, /* I2C1 Error */
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{ UnusedISR }, /* SPI1 */
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{ UnusedISR }, /* SPI2 */
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{ UnusedISR }, /* USART1 */
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{ UnusedISR }, /* USART2 */
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{ UnusedISR }, /* USART3 */
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{ UnusedISR }, /* EXTI Line 15..10 */
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{ UnusedISR }, /* RTC alarm through EXTI line */
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{ UnusedISR }, /* USB OTG FS Wakeup */
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{ UnusedISR }, /* TIM8 Break and TIM12 */
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{ UnusedISR }, /* TIM8 Update and TIM13 */
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{ UnusedISR }, /* TIM8 Trigger/Comm. and TIM14 */
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{ UnusedISR }, /* TIM8 Capture Compare */
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{ UnusedISR }, /* DMA1 Stream7 */
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{ UnusedISR }, /* FSMC */
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{ UnusedISR }, /* SDIO */
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{ UnusedISR }, /* TIM5 */
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{ UnusedISR }, /* SPI3 */
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{ UnusedISR }, /* UART4 */
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{ UnusedISR }, /* UART5 */
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{ UnusedISR }, /* TIM6 and DAC1&2 underrun err. */
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{ UnusedISR }, /* TIM7 */
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{ UnusedISR }, /* DMA2 Stream 0 */
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{ UnusedISR }, /* DMA2 Stream 1 */
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{ UnusedISR }, /* DMA2 Stream 2 */
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{ UnusedISR }, /* DMA2 Stream 3 */
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{ UnusedISR }, /* DMA2 Stream 4 */
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{ UnusedISR }, /* Ethernet */
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{ UnusedISR }, /* Ethernet Wakeup */
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{ UnusedISR }, /* CAN2 TX */
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{ UnusedISR }, /* CAN2 RX0 */
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{ UnusedISR }, /* CAN2 RX1 */
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{ UnusedISR }, /* CAN2 SCE */
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{ UnusedISR }, /* USB OTG FS */
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{ UnusedISR }, /* DMA2 Stream 5 */
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{ UnusedISR }, /* DMA2 Stream 6 */
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{ UnusedISR }, /* DMA2 Stream 7 */
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{ UnusedISR }, /* USART6 */
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{ UnusedISR }, /* I2C3 event */
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{ UnusedISR }, /* I2C3 error */
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{ UnusedISR }, /* USB OTG HS End Point 1 Out */
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{ UnusedISR }, /* USB OTG HS End Point 1 In */
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{ UnusedISR }, /* USB OTG HS Wakeup through EXTI*/
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{ UnusedISR }, /* USB OTG HS */
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{ UnusedISR }, /* DCMI */
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{ UnusedISR }, /* CRYP crypto */
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{ UnusedISR }, /* Hash and Rng */
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{ UnusedISR } /* FPU */
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}; |
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/************************************ end of vectors.c *********************************/
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