amiro-lld / include / deca_instance.h @ fce9feec
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| 1 | fce9feec | Robin Ewers | /*! ----------------------------------------------------------------------------
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| 2 | * @file instance.h
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| 3 | * @brief DecaWave header for application level instance
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| 4 | *
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| 5 | * @attention
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| 6 | *
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| 7 | * Copyright 2015 (c) DecaWave Ltd, Dublin, Ireland.
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| 8 | *
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| 9 | * All rights reserved.
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| 10 | *
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| 11 | * @author DecaWave
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| 12 | */
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| 13 | #ifndef _DECAINSTANCE_H_
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| 14 | #define _DECAINSTANCE_H_
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| 15 | |||
| 16 | #ifdef __cplusplus
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| 17 | extern "C" { |
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| 18 | #endif
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| 19 | |||
| 20 | #include <amiro-lld.h> |
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| 21 | #if defined(AMIROLLD_CFG_USE_DW1000) || defined(__DOXYGEN__)
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| 22 | #include <alld_dw1000.h> |
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| 23 | |||
| 24 | /******************************************************************************************************************
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| 25 | ********************* NOTES on TREK compile/build time features/options ***********************************************************
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| 26 | *******************************************************************************************************************/
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| 27 | #define DEEP_SLEEP (1) //To enable deep-sleep set this to 1 |
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| 28 | //DEEP_SLEEP mode can be used, for example, by a Tag instance to put the DW1000 into low-power deep-sleep mode while it is
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| 29 | //waiting for start of next ranging exchange
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| 30 | |||
| 31 | #define CORRECT_RANGE_BIAS (1) // Compensate for small bias due to uneven accumulator growth at close up high power |
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| 32 | |||
| 33 | #define ANCTOANCTWR (1) //if set to 1 then anchor to anchor two-way ranging will be done in the last 2 slots, this |
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| 34 | //is used for TREK demo, to aid in anchor installation,
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| 35 | |||
| 36 | #define TAG_HASTO_RANGETO_A0 (0) //if set to 1 then tag will only send the Final if the Response from A0 has been received |
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| 37 | |||
| 38 | #define READ_EVENT_COUNTERS (0) //read event counters - can be used for debug to periodically output event counters |
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| 39 | |||
| 40 | #define DISCOVERY (0) //set to 1 to enable tag discovery - tags starts by sending blinks (with own ID) and then |
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| 41 | //anchor assigns a slot to it and gives it short address
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| 42 | |||
| 43 | /******************************************************************************************************************
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| 44 | *******************************************************************************************************************
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| 45 | *******************************************************************************************************************/
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| 46 | |||
| 47 | #define NUM_INST 1 // one instance (tag or anchor - controlling one DW1000) |
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| 48 | #define SPEED_OF_LIGHT (299702547.0) // in m/s in air |
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| 49 | #define MASK_40BIT (0x00FFFFFFFFFF) // DW1000 counter is 40 bits |
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| 50 | #define MASK_TXDTS (0x00FFFFFFFE00) // The TX timestamp will snap to 8 ns resolution - mask lower 9 bits. |
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| 51 | |||
| 52 | //! callback events
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| 53 | #define DWT_SIG_RX_NOERR 0 |
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| 54 | #define DWT_SIG_TX_DONE 1 // Frame has been sent |
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| 55 | #define DWT_SIG_RX_OKAY 2 // Frame Received with Good CRC |
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| 56 | #define DWT_SIG_RX_ERROR 3 // Frame Received but CRC is wrong |
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| 57 | #define DWT_SIG_RX_TIMEOUT 4 // Timeout on receive has elapsed |
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| 58 | #define DWT_SIG_TX_AA_DONE 6 // ACK frame has been sent (as a result of auto-ACK) |
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| 59 | #define DWT_SIG_RX_BLINK 7 // Received ISO EUI 64 blink message |
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| 60 | #define DWT_SIG_RX_PHR_ERROR 8 // Error found in PHY Header |
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| 61 | #define DWT_SIG_RX_SYNCLOSS 9 // Un-recoverable error in Reed Solomon Decoder |
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| 62 | #define DWT_SIG_RX_SFDTIMEOUT 10 // Saw preamble but got no SFD within configured time |
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| 63 | #define DWT_SIG_RX_PTOTIMEOUT 11 // Got preamble detection timeout (no preamble detected) |
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| 64 | |||
| 65 | #define DWT_SIG_TX_PENDING 12 // TX is pending |
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| 66 | #define DWT_SIG_TX_ERROR 13 // TX failed |
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| 67 | #define DWT_SIG_RX_PENDING 14 // RX has been re-enabled |
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| 68 | #define DWT_SIG_DW_IDLE 15 // DW radio is in IDLE (no TX or RX pending) |
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| 69 | |||
| 70 | #define SIG_RX_UNKNOWN 99 // Received an unknown frame |
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| 71 | |||
| 72 | //DecaRTLS frame function codes
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| 73 | #define RTLS_DEMO_MSG_RNG_INIT (0x71) // Ranging initiation message |
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| 74 | #define RTLS_DEMO_MSG_TAG_POLL (0x81) // Tag poll message |
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| 75 | #define RTLS_DEMO_MSG_ANCH_RESP (0x70) // Anchor response to poll |
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| 76 | #define RTLS_DEMO_MSG_ANCH_POLL (0x7A) // Anchor to anchor poll message |
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| 77 | #define RTLS_DEMO_MSG_ANCH_RESP2 (0x7B) // Anchor response to poll from anchor |
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| 78 | #define RTLS_DEMO_MSG_ANCH_FINAL (0x7C) // Anchor final massage back to Anchor |
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| 79 | #define RTLS_DEMO_MSG_TAG_FINAL (0x82) // Tag final massage back to Anchor |
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| 80 | |||
| 81 | |||
| 82 | //lengths including the Decaranging Message Function Code byte
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| 83 | //absolute length = 17 +
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| 84 | #define RANGINGINIT_MSG_LEN 5 // FunctionCode(1), Sleep Correction Time (2), Tag Address (2) |
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| 85 | |||
| 86 | //absolute length = 11 +
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| 87 | #define TAG_POLL_MSG_LEN 2 // FunctionCode(1), Range Num (1) |
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| 88 | #define ANCH_RESPONSE_MSG_LEN 8 // FunctionCode(1), Sleep Correction Time (2), Measured_TOF_Time(4), Range Num (1) (previous) |
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| 89 | #define TAG_FINAL_MSG_LEN 33 // FunctionCode(1), Range Num (1), Poll_TxTime(5), |
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| 90 | // Resp0_RxTime(5), Resp1_RxTime(5), Resp2_RxTime(5), Resp3_RxTime(5), Final_TxTime(5), Valid Response Mask (1)
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| 91 | #define ANCH_POLL_MSG_LEN_S 2 // FunctionCode(1), Range Num (1), |
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| 92 | #define ANCH_POLL_MSG_LEN 4 // FunctionCode(1), Range Num (1), Next Anchor (2) |
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| 93 | #define ANCH_FINAL_MSG_LEN 33 // FunctionCode(1), Range Num (1), Poll_TxTime(5), |
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| 94 | // Resp0_RxTime(5), Resp1_RxTime(5), Resp2_RxTime(5), Resp3_RxTime(5), Final_TxTime(5), Valid Response Mask (1)
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| 95 | #define MAX_MAC_MSG_DATA_LEN (TAG_FINAL_MSG_LEN) //max message len of the above |
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| 96 | |||
| 97 | #define STANDARD_FRAME_SIZE 127 |
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| 98 | |||
| 99 | #define ADDR_BYTE_SIZE_L (8) |
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| 100 | #define ADDR_BYTE_SIZE_S (2) |
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| 101 | |||
| 102 | #define FRAME_CONTROL_BYTES 2 |
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| 103 | #define FRAME_SEQ_NUM_BYTES 1 |
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| 104 | #define FRAME_PANID 2 |
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| 105 | #define FRAME_CRC 2 |
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| 106 | #define FRAME_SOURCE_ADDRESS_S (ADDR_BYTE_SIZE_S)
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| 107 | #define FRAME_DEST_ADDRESS_S (ADDR_BYTE_SIZE_S)
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| 108 | #define FRAME_SOURCE_ADDRESS_L (ADDR_BYTE_SIZE_L)
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| 109 | #define FRAME_DEST_ADDRESS_L (ADDR_BYTE_SIZE_L)
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| 110 | #define FRAME_CTRLP (FRAME_CONTROL_BYTES + FRAME_SEQ_NUM_BYTES + FRAME_PANID) //5 |
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| 111 | #define FRAME_CRTL_AND_ADDRESS_L (FRAME_DEST_ADDRESS_L + FRAME_SOURCE_ADDRESS_L + FRAME_CTRLP) //21 bytes for 64-bit addresses) |
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| 112 | #define FRAME_CRTL_AND_ADDRESS_S (FRAME_DEST_ADDRESS_S + FRAME_SOURCE_ADDRESS_S + FRAME_CTRLP) //9 bytes for 16-bit addresses) |
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| 113 | #define FRAME_CRTL_AND_ADDRESS_LS (FRAME_DEST_ADDRESS_L + FRAME_SOURCE_ADDRESS_S + FRAME_CTRLP) //15 bytes for one 16-bit address and one 64-bit address) |
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| 114 | #define MAX_USER_PAYLOAD_STRING_LL (STANDARD_FRAME_SIZE-FRAME_CRTL_AND_ADDRESS_L-TAG_FINAL_MSG_LEN-FRAME_CRC) //127 - 21 - 16 - 2 = 88 |
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| 115 | #define MAX_USER_PAYLOAD_STRING_SS (STANDARD_FRAME_SIZE-FRAME_CRTL_AND_ADDRESS_S-TAG_FINAL_MSG_LEN-FRAME_CRC) //127 - 9 - 16 - 2 = 100 |
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| 116 | #define MAX_USER_PAYLOAD_STRING_LS (STANDARD_FRAME_SIZE-FRAME_CRTL_AND_ADDRESS_LS-TAG_FINAL_MSG_LEN-FRAME_CRC) //127 - 15 - 16 - 2 = 94 |
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| 117 | |||
| 118 | //NOTE: the user payload assumes that there are only 88 "free" bytes to be used for the user message (it does not scale according to the addressing modes)
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| 119 | #define MAX_USER_PAYLOAD_STRING MAX_USER_PAYLOAD_STRING_LL
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| 120 | |||
| 121 | #define BLINK_FRAME_CONTROL_BYTES (1) |
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| 122 | #define BLINK_FRAME_SEQ_NUM_BYTES (1) |
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| 123 | #define BLINK_FRAME_CRC (FRAME_CRC)
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| 124 | #define BLINK_FRAME_SOURCE_ADDRESS (ADDR_BYTE_SIZE_L)
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| 125 | #define BLINK_FRAME_CTRLP (BLINK_FRAME_CONTROL_BYTES + BLINK_FRAME_SEQ_NUM_BYTES) //2 |
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| 126 | #define BLINK_FRAME_CRTL_AND_ADDRESS (BLINK_FRAME_SOURCE_ADDRESS + BLINK_FRAME_CTRLP) //10 bytes |
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| 127 | #define BLINK_FRAME_LEN_BYTES (BLINK_FRAME_CRTL_AND_ADDRESS + BLINK_FRAME_CRC)
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| 128 | |||
| 129 | |||
| 130 | #if (DISCOVERY == 0) |
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| 131 | #define MAX_TAG_LIST_SIZE (8) |
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| 132 | #else
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| 133 | #define MAX_TAG_LIST_SIZE (100) |
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| 134 | #endif
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| 135 | |||
| 136 | |||
| 137 | #define MAX_ANCHOR_LIST_SIZE (4) //this is limited to 4 in this application |
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| 138 | #define NUM_EXPECTED_RESPONSES (3) //e.g. MAX_ANCHOR_LIST_SIZE - 1 |
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| 139 | |||
| 140 | #define NUM_EXPECTED_RESPONSES_ANC0 (2) //anchor A0 expects response from A1 and A2 |
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| 141 | #define NUM_EXPECTED_RESPONSES_ANC1 (1) //anchor A1 expects response from A2 |
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| 142 | |||
| 143 | #define GATEWAY_ANCHOR_ADDR (0x8000) |
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| 144 | #define A1_ANCHOR_ADDR (0x8001) |
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| 145 | #define A2_ANCHOR_ADDR (0x8002) |
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| 146 | #define A3_ANCHOR_ADDR (0x8003) |
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| 147 | |||
| 148 | #define WAIT4TAGFINAL 2 |
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| 149 | #define WAIT4ANCFINAL 1 |
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| 150 | |||
| 151 | // !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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| 152 | // NOTE: the maximum RX timeout is ~ 65ms
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| 153 | // !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
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| 154 | |||
| 155 | #define INST_DONE_WAIT_FOR_NEXT_EVENT 1 //this signifies that the current event has been processed and instance is ready for next one |
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| 156 | #define INST_DONE_WAIT_FOR_NEXT_EVENT_TO 2 //this signifies that the current event has been processed and that instance is waiting for next one with a timeout |
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| 157 | //which will trigger if no event coming in specified time
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| 158 | #define INST_NOT_DONE_YET 0 //this signifies that the instance is still processing the current event |
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| 159 | |||
| 160 | //application data message byte offsets
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| 161 | #define FCODE 0 // Function code is 1st byte of messageData |
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| 162 | #define PTXT 2 // Poll TX time |
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| 163 | #define RRXT0 7 // A0 Response RX time |
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| 164 | #define RRXT1 12 // A1 Response RX time |
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| 165 | #define RRXT2 17 // A2 Response RX time |
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| 166 | #define RRXT3 22 // A3 Response RX time |
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| 167 | #define FTXT 27 // Final TX time |
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| 168 | #define VRESP 32 // Mask of valid response times (e.g. if bit 1 = A0's response time is valid) |
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| 169 | #define RES_TAG_SLP0 1 // Response tag sleep correction LSB |
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| 170 | #define RES_TAG_SLP1 2 // Response tag sleep correction MSB |
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| 171 | #define TOFR 3 // ToF (n-1) 4 bytes |
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| 172 | #define TOFRN 7 // range number 1 byte |
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| 173 | #define POLL_RNUM 1 // Poll message range number |
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| 174 | #define POLL_NANC 2 // Address of next anchor to send a poll message (e.g. A1) |
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| 175 | #define RES_TAG_ADD0 3 // Tag's short address (slot num) LSB |
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| 176 | #define RES_TAG_ADD1 4 // Tag's short address (slot num) MSB |
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| 177 | |||
| 178 | |||
| 179 | #define BLINK_PERIOD (2000) //ms (Blink at 2Hz initially) |
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| 180 | |||
| 181 | #define DW_RX_ON_DELAY (16) //us - the DW RX has 16 us RX on delay before it will receive any data |
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| 182 | |||
| 183 | //this it the delay used for configuring the receiver on delay (wait for response delay)
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| 184 | //NOTE: this RX_RESPONSE_TURNAROUND is dependent on the microprocessor and code optimisations
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| 185 | #define RX_RESPONSE_TURNAROUND (300) //this takes into account any turnaround/processing time (reporting received poll and sending the response) |
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| 186 | |||
| 187 | #define PTO_PACS (3) //tag will use PTO to reduce power consumption (if no response coming stop RX) |
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| 188 | |||
| 189 | //Tag will range to 3 or 4 anchors
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| 190 | //Each ranging exchange will consist of minimum of 3 messages (Poll, Response, Final)
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| 191 | //and a maximum of 6 messages (Poll, Response x 4, Final)
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| 192 | //Thus the ranging exchange will take either 28 ms for 110 kbps and 5 ms for 6.81 Mbps.
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| 193 | //NOTE: the above times are for 110k rate with 64 symb non-standard SFD and 1024 preamble length
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| 194 | |||
| 195 | |||
| 196 | |||
| 197 | //Anchor to Anchor Ranging
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| 198 | //1. A0 sends a Poll
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| 199 | //2. A1 responds (to A0's Poll) after RX_RESPONSE_TURNAROUND (300 us) + response frame length = fixedReplyDelayAnc1 ~= 480 us
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| 200 | //3. A0 turns its receiver on (after 300 us) expecting A1's response (this is done automatically in 1. by using WAIT4RESP)
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| 201 | //4. A2 responds (to A0's Poll) after 2*fixedReplyDelayAnc1 ~= 960 us.
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| 202 | //5. A0 turns its receiver on (last Rx on time + fixedReplyDelayAnc1) expecting A2's response (this is done after reception of A1's response using delayed RX)
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| 203 | //6. A0 sends a Final this is timed from the Poll TX time = pollTx2FinalTxDelayAnc ~= 1550 us (1250+300)
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| 204 | //7. A1 and A2 turn on their receivers to expect this Final frame (this is done automatically in 2. AND 4. by using WAIT4RESP)
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| 205 | |||
| 206 | |||
| 207 | //Tag to Anchor Ranging
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| 208 | //1. Tag sends a Poll
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| 209 | //2. A0 responds (delayed response) after fixedReplyDelayAnc1, A0 will re-enable its receiver automatically (by using WAIT4RESP)
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| 210 | //3. A1, A2, A3 re-enble the receiver to receive A0's response
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| 211 | //4. A1 responds and will re-enable its receiver automatically (by using WAIT4RESP)
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| 212 | //5. A2, A3 re-enble the receiver to receive A1's response
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| 213 | //6. A2 responds and will re-enable its receiver automatically (by using WAIT4RESP)
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| 214 | //7. A0, A3 re-enable the receiver to receive A2's response
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| 215 | //9. A3 responds and will re-enable its receiver automatically (by using WAIT4RESP)
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| 216 | //10. A0, A1, A2, A3 - all receive the Final from the tag
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| 217 | |||
| 218 | |||
| 219 | //Tag Discovery mode
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| 220 | //1. Tag sends a Blink
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| 221 | //2. A0 responds with Ranging Init giving it short address and slot time correction
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| 222 | //3. Tag sleeps until the next period and then starts ranging exchange
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| 223 | |||
| 224 | |||
| 225 | typedef enum instanceModes{TAG, ANCHOR, ANCHOR_RNG, NUM_MODES} INST_MODE; |
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| 226 | //Tag = Exchanges DecaRanging messages (Poll-Response-Final) with Anchor and enabling Anchor to calculate the range between the two instances
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| 227 | //Anchor = see above
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| 228 | //Anchor_Rng = the anchor (assumes a tag function) and ranges to another anchor - used in Anchor to Anchor TWR for auto positioning function
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| 229 | |||
| 230 | |||
| 231 | // instance sending a poll (starting TWR) is INITIATOR
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| 232 | // instance which receives a poll (and will be involved in the TWR) is RESPONDER
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| 233 | // instance which does not receive a poll (default state) will be a LISTENER - will send no responses
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| 234 | typedef enum instanceTWRModes{INITIATOR, RESPONDER_A, RESPONDER_B, RESPONDER_T, LISTENER, GREETER, ATWR_MODES} ATWR_MODE; |
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| 235 | |||
| 236 | |||
| 237 | #define TOF_REPORT_NUL 0 |
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| 238 | #define TOF_REPORT_T2A 1 |
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| 239 | #define TOF_REPORT_A2A 2 |
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| 240 | |||
| 241 | #define INVALID_TOF (0xABCDFFFF) |
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| 242 | |||
| 243 | typedef enum inst_states |
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| 244 | {
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| 245 | TA_INIT, //0
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| 246 | |||
| 247 | TA_TXE_WAIT, //1 - state in which the instance will enter sleep (if ranging finished) or proceed to transmit a message
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| 248 | TA_TXBLINK_WAIT_SEND, //2 - configuration and sending of Blink message
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| 249 | TA_TXPOLL_WAIT_SEND, //2 - configuration and sending of Poll message
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| 250 | TA_TXFINAL_WAIT_SEND, //3 - configuration and sending of Final message
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| 251 | TA_TXRESPONSE_WAIT_SEND, //4 - a place holder - response is sent from call back
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| 252 | TA_TX_WAIT_CONF, //5 - confirmation of TX done message
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| 253 | |||
| 254 | TA_RXE_WAIT, //6
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| 255 | TA_RX_WAIT_DATA, //7
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| 256 | |||
| 257 | TA_SLEEP_DONE, //8
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| 258 | TA_TXRESPONSE_SENT_POLLRX, //9
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| 259 | TA_TXRESPONSE_SENT_RESPRX, //10
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| 260 | TA_TXRESPONSE_SENT_TORX, //11
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| 261 | TA_TXRESPONSE_SENT_APOLLRX, //12
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| 262 | TA_TXRESPONSE_SENT_ARESPRX //13
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| 263 | |||
| 264 | } INST_STATES; |
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| 265 | |||
| 266 | |||
| 267 | // This file defines data and functions for access to Parameters in the Device
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| 268 | //message structure for Poll, Response and Final message
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| 269 | |||
| 270 | typedef struct |
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| 271 | {
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| 272 | uint8_t frameCtrl[2]; // frame control bytes 00-01 |
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| 273 | uint8_t seqNum; // sequence_number 02
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| 274 | uint8_t panID[2]; // PAN ID 03-04 |
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| 275 | uint8_t destAddr[ADDR_BYTE_SIZE_L]; // 05-12 using 64 bit addresses
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| 276 | uint8_t sourceAddr[ADDR_BYTE_SIZE_L]; // 13-20 using 64 bit addresses
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| 277 | uint8_t messageData[MAX_USER_PAYLOAD_STRING_LL] ; // 22-124 (application data and any user payload)
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| 278 | uint8_t fcs[2] ; // 125-126 we allow space for the CRC as it is logically part of the message. However ScenSor TX calculates and adds these bytes. |
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| 279 | } srd_msg_dlsl ; |
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| 280 | |||
| 281 | typedef struct |
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| 282 | {
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| 283 | uint8_t frameCtrl[2]; // frame control bytes 00-01 |
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| 284 | uint8_t seqNum; // sequence_number 02
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| 285 | uint8_t panID[2]; // PAN ID 03-04 |
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| 286 | uint8_t destAddr[ADDR_BYTE_SIZE_S]; // 05-06
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| 287 | uint8_t sourceAddr[ADDR_BYTE_SIZE_S]; // 07-08
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| 288 | uint8_t messageData[MAX_USER_PAYLOAD_STRING_SS] ; // 09-124 (application data and any user payload)
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| 289 | uint8_t fcs[2] ; // 125-126 we allow space for the CRC as it is logically part of the message. However ScenSor TX calculates and adds these bytes. |
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| 290 | } srd_msg_dsss ; |
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| 291 | |||
| 292 | typedef struct |
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| 293 | {
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| 294 | uint8_t frameCtrl[2]; // frame control bytes 00-01 |
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| 295 | uint8_t seqNum; // sequence_number 02
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| 296 | uint8_t panID[2]; // PAN ID 03-04 |
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| 297 | uint8_t destAddr[ADDR_BYTE_SIZE_L]; // 05-12 using 64 bit addresses
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| 298 | uint8_t sourceAddr[ADDR_BYTE_SIZE_S]; // 13-14
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| 299 | uint8_t messageData[MAX_USER_PAYLOAD_STRING_LS] ; // 15-124 (application data and any user payload)
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| 300 | uint8_t fcs[2] ; // 125-126 we allow space for the CRC as it is logically part of the message. However ScenSor TX calculates and adds these bytes. |
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| 301 | } srd_msg_dlss ; |
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| 302 | |||
| 303 | typedef struct |
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| 304 | {
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| 305 | uint8_t frameCtrl[2]; // frame control bytes 00-01 |
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| 306 | uint8_t seqNum; // sequence_number 02
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| 307 | uint8_t panID[2]; // PAN ID 03-04 |
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| 308 | uint8_t destAddr[ADDR_BYTE_SIZE_S]; // 05-06
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| 309 | uint8_t sourceAddr[ADDR_BYTE_SIZE_L]; // 07-14 using 64 bit addresses
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| 310 | uint8_t messageData[MAX_USER_PAYLOAD_STRING_LS] ; // 15-124 (application data and any user payload)
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| 311 | uint8_t fcs[2] ; // 125-126 we allow space for the CRC as it is logically part of the message. However ScenSor TX calculates and adds these bytes. |
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| 312 | } srd_msg_dssl ; |
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| 313 | |||
| 314 | //12 octets for Minimum IEEE ID blink
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| 315 | typedef struct |
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| 316 | {
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| 317 | uint8_t frameCtrl; // frame control bytes 00
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| 318 | uint8_t seqNum; // sequence_number 01
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| 319 | uint8_t tagID[BLINK_FRAME_SOURCE_ADDRESS]; // 02-09 64 bit address
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| 320 | uint8_t fcs[2] ; // 10-11 we allow space for the CRC as it is logically part of the message. However ScenSor TX calculates and adds these bytes. |
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| 321 | } iso_IEEE_EUI64_blink_msg ; |
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| 322 | |||
| 323 | |||
| 324 | typedef struct |
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| 325 | {
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| 326 | uint8_t channelNumber ; // valid range is 1 to 11
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| 327 | uint8_t preambleCode ; // 00 = use NS code, 1 to 24 selects code
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| 328 | uint8_t pulseRepFreq ; // NOMINAL_4M, NOMINAL_16M, or NOMINAL_64M
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| 329 | uint8_t dataRate ; // DATA_RATE_1 (110K), DATA_RATE_2 (850K), DATA_RATE_3 (6M81)
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| 330 | uint8_t preambleLen ; // values expected are 64, (128), (256), (512), 1024, (2048), and 4096
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| 331 | uint8_t pacSize ; |
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| 332 | uint8_t nsSFD ; |
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| 333 | uint16_t sfdTO; //!< SFD timeout value (in symbols) e.g. preamble length (128) + SFD(8) - PAC + some margin ~ 135us... DWT_SFDTOC_DEF; //default value
|
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| 334 | } instanceConfig_t ; |
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| 335 | |||
| 336 | typedef struct |
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| 337 | {
|
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| 338 | uint16_t slotDuration_ms ; //slot duration (time for 1 tag to range to 4 anchors)
|
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| 339 | uint16_t numSlots ; // number of slots in one superframe (number of tags supported)
|
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| 340 | uint16_t sfPeriod_ms ; // superframe period in ms
|
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| 341 | uint16_t tagPeriod_ms ; // the time during which tag ranges to anchors and then sleeps, should be same as FRAME PERIOD so that tags don't interfere
|
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| 342 | uint16_t pollTxToFinalTxDly_us ; //response delay time (Poll to Final delay)
|
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| 343 | } sfConfig_t ; |
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| 344 | |||
| 345 | /******************************************************************************************************************
|
||
| 346 | *******************************************************************************************************************
|
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| 347 | *******************************************************************************************************************/
|
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| 348 | |||
| 349 | //size of the event queue, in this application there should be at most 2 unprocessed events,
|
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| 350 | //i.e. if there is a transmission with wait for response then the TX callback followed by RX callback could be executed
|
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| 351 | //in turn and the event queued up before the instance processed the TX event.
|
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| 352 | #define MAX_EVENT_NUMBER (4) |
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| 353 | |||
| 354 | typedef struct |
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| 355 | {
|
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| 356 | uint8_t type; // event type - if 0 there is no event in the queue
|
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| 357 | //uint8_t typeSave; // holds the event type - does not clear (used to show what event has been processed)
|
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| 358 | uint8_t typePend; // set if there is a pending event (i.e. DW is not in IDLE (TX/RX pending)
|
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| 359 | uint16_t rxLength ; // length of RX data (does not apply to TX events)
|
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| 360 | |||
| 361 | uint64_t timeStamp ; // last timestamp (Tx or Rx) - 40 bit DW1000 time
|
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| 362 | |||
| 363 | uint32_t timeStamp32l ; // last tx/rx timestamp - low 32 bits of the 40 bit DW1000 time
|
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| 364 | uint32_t timeStamp32h ; // last tx/rx timestamp - high 32 bits of the 40 bit DW1000 time
|
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| 365 | |||
| 366 | uint32_t uTimeStamp ; //32 bit system counter (ms) - STM32 tick time (at time of IRQ)
|
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| 367 | |||
| 368 | union {
|
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| 369 | //holds received frame (after a good RX frame event)
|
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| 370 | uint8_t frame[STANDARD_FRAME_SIZE]; |
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| 371 | srd_msg_dlsl rxmsg_ll ; //64 bit addresses
|
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| 372 | srd_msg_dssl rxmsg_sl ; |
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| 373 | srd_msg_dlss rxmsg_ls ; |
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| 374 | srd_msg_dsss rxmsg_ss ; //16 bit addresses
|
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| 375 | iso_IEEE_EUI64_blink_msg rxblinkmsg; |
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| 376 | }msgu; |
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| 377 | |||
| 378 | //uint8_t gotit; //stores the instance function which processed the event (used for debug)
|
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| 379 | }event_data_t ; |
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| 380 | |||
| 381 | // TX power and PG delay configuration structure
|
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| 382 | typedef struct { |
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| 383 | uint8_t pgDelay; |
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| 384 | |||
| 385 | //TX POWER
|
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| 386 | //31:24 BOOST_0.125ms_PWR
|
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| 387 | //23:16 BOOST_0.25ms_PWR-TX_SHR_PWR
|
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| 388 | //15:8 BOOST_0.5ms_PWR-TX_PHR_PWR
|
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| 389 | //7:0 DEFAULT_PWR-TX_DATA_PWR
|
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| 390 | uint32_t txPwr[2]; // |
||
| 391 | }tx_struct; |
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| 392 | |||
| 393 | typedef struct |
||
| 394 | {
|
||
| 395 | INST_MODE mode; //instance mode (tag or anchor)
|
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| 396 | ATWR_MODE twrMode; |
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| 397 | INST_STATES testAppState ; //state machine - current state
|
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| 398 | INST_STATES nextState ; //state machine - next state
|
||
| 399 | INST_STATES previousState ; //state machine - previous state
|
||
| 400 | |||
| 401 | //configuration structures
|
||
| 402 | dwt_config_t configData ; //DW1000 channel configuration
|
||
| 403 | dwt_txconfig_t configTX ; //DW1000 TX power configuration
|
||
| 404 | uint16_t txAntennaDelay ; //DW1000 TX antenna delay
|
||
| 405 | uint16_t rxAntennaDelay ; //DW1000 RX antenna delay
|
||
| 406 | uint32_t txPower ; //DW1000 TX power
|
||
| 407 | uint8_t txPowerChanged; //power has been changed - update the register on next TWR exchange
|
||
| 408 | uint8_t antennaDelayChanged; //antenna delay has been changed - update the register on next TWR exchange
|
||
| 409 | |||
| 410 | uint16_t instanceAddress16; //contains tag/anchor 16 bit address
|
||
| 411 | |||
| 412 | //timeouts and delays
|
||
| 413 | int32_t tagPeriod_ms; // in ms, tag ranging + sleeping period
|
||
| 414 | int32_t tagSleepTime_ms; //in milliseconds - defines the nominal Tag sleep time period
|
||
| 415 | int32_t tagSleepRnd_ms; //add an extra slot duration to sleep time to avoid collision before getting synced by anchor 0
|
||
| 416 | |||
| 417 | //this is the delay used for the delayed transmit
|
||
| 418 | uint64_t pollTx2FinalTxDelay ; //this is delay from Poll Tx time to Final Tx time in DW1000 units (40-bit)
|
||
| 419 | uint64_t pollTx2FinalTxDelayAnc ; //this is delay from Poll Tx time to Final Tx time in DW1000 units (40-bit) for Anchor to Anchor ranging
|
||
| 420 | uint32_t fixedReplyDelayAnc32h ; //this is a delay used for calculating delayed TX/delayed RX on time (units: 32bit of 40bit DW time)
|
||
| 421 | uint16_t anc1RespTx2FinalRxDelay_sy ; //This is delay for RX on when A1 expecting Final form A0 or A2 expecting Final from A1
|
||
| 422 | uint16_t anc2RespTx2FinalRxDelay_sy ; //This is delay for RX on when A2 waiting for A0's final (anc to anc ranging)
|
||
| 423 | uint32_t preambleDuration32h ; //preamble duration in device time (32 MSBs of the 40 bit time)
|
||
| 424 | uint32_t tagRespRxDelay_sy ; //TX to RX delay time when tag is awaiting response message an another anchor
|
||
| 425 | uint32_t ancRespRxDelay_sy ; //TX to RX delay time when anchor is awaiting response message an another anchor
|
||
| 426 | |||
| 427 | int fwtoTime_sy ; //this is FWTO for response message (used by initiating anchor in anchor to anchor ranging) |
||
| 428 | int fwto4RespFrame_sy ; //this is a frame wait timeout used when awaiting reception of Response frames (used by both tag/anchor) |
||
| 429 | int fwto4FinalFrame_sy ; //this is a frame wait timeout used when awaiting reception of Final frames |
||
| 430 | uint32_t delayedTRXTime32h; // time at which to do delayed TX or delayed RX (note TX time is time of SFD, RX time is RX on time)
|
||
| 431 | |||
| 432 | //message structure used for holding the data of the frame to transmit before it is written to the DW1000
|
||
| 433 | srd_msg_dsss msg_f ; // ranging message frame with 16-bit addresses
|
||
| 434 | iso_IEEE_EUI64_blink_msg blinkmsg ; // frame structure (used for tx blink message)
|
||
| 435 | srd_msg_dlss rng_initmsg ; // ranging init message (destination long, source short)
|
||
| 436 | |||
| 437 | //Tag function address/message configuration
|
||
| 438 | uint8_t shortAdd_idx ; // device's 16-bit address low byte (used as index into arrays [0 - 3])
|
||
| 439 | uint8_t eui64[8]; // device's EUI 64-bit address |
||
| 440 | uint16_t psduLength ; // used for storing the TX frame length
|
||
| 441 | uint8_t frameSN; // modulo 256 frame sequence number - it is incremented for each new frame transmission
|
||
| 442 | uint16_t panID ; // panid used in the frames
|
||
| 443 | |||
| 444 | //64 bit timestamps
|
||
| 445 | //union of TX timestamps
|
||
| 446 | union {
|
||
| 447 | uint64_t txTimeStamp ; // last tx timestamp
|
||
| 448 | uint64_t tagPollTxTime ; // tag's poll tx timestamp
|
||
| 449 | uint64_t anchorRespTxTime ; // anchor's reponse tx timestamp
|
||
| 450 | }txu; |
||
| 451 | uint32_t tagPollTxTime32h ; |
||
| 452 | uint64_t tagPollRxTime ; // receive time of poll message
|
||
| 453 | |||
| 454 | |||
| 455 | //application control parameters
|
||
| 456 | uint8_t wait4ack ; // if this is set to DWT_RESPONSE_EXPECTED, then the receiver will turn on automatically after TX completion
|
||
| 457 | uint8_t wait4final ; |
||
| 458 | |||
| 459 | uint8_t instToSleep; // if set the instance will go to sleep before sending the blink/poll message
|
||
| 460 | uint8_t instanceTimerEn; // enable/start a timer
|
||
| 461 | uint32_t instanceWakeTime_ms; // micro time at which the tag was waken up
|
||
| 462 | uint32_t nextWakeUpTime_ms; // micro time at which to wake up tag
|
||
| 463 | |||
| 464 | uint8_t rxResponseMaskAnc; // bit mask - bit 0 not used;
|
||
| 465 | // bit 1 = received response from anchor ID = 1;
|
||
| 466 | // bit 2 from anchor ID = 2,
|
||
| 467 | // bit 3 set if two responses (from Anchor 1 and Anchor 2) received and A0 got third response (from A2)
|
||
| 468 | |||
| 469 | uint8_t rxResponseMask; // bit mask - bit 0 = received response from anchor ID = 0, bit 1 from anchor ID = 1 etc...
|
||
| 470 | uint8_t rxResponseMaskReport; // this will be set before outputting range reports to signify which are valid
|
||
| 471 | uint8_t rangeNum; // incremented for each sequence of ranges (each slot)
|
||
| 472 | uint8_t rangeNumA[MAX_TAG_LIST_SIZE]; // array which holds last range number from each tag
|
||
| 473 | uint8_t rangeNumAnc; // incremented for each sequence of ranges (each slot) - anchor to anchor ranging
|
||
| 474 | uint8_t rangeNumAAnc[MAX_ANCHOR_LIST_SIZE]; //array which holds last range number for each anchor
|
||
| 475 | |||
| 476 | int8_t rxResps; // how many responses were received to a poll (in current ranging exchange)
|
||
| 477 | int8_t remainingRespToRx ; // how many responses remain to be received (in current ranging exchange)
|
||
| 478 | |||
| 479 | uint16_t sframePeriod_ms; // superframe period in ms
|
||
| 480 | uint16_t slotDuration_ms; // slot duration in ms
|
||
| 481 | uint16_t numSlots; |
||
| 482 | uint32_t a0SlotTime_ms; // relative time in superframe at which A0 starts ranging (this is start of 2nd last slot)
|
||
| 483 | uint32_t a1SlotTime_ms; // absolute time in superframe at which A1 starts ranging
|
||
| 484 | uint32_t a2aStartTime_ms; // absolute time in superframe at which A0 starts ranging
|
||
| 485 | int32_t tagSleepCorrection_ms; // tag's sleep correction to keep it in it's assigned slot
|
||
| 486 | |||
| 487 | //diagnostic counters/data, results and logging
|
||
| 488 | uint32_t tof[MAX_TAG_LIST_SIZE]; //this is an array which holds last ToF from particular tag (ID 0-(MAX_TAG_LIST_SIZE-1))
|
||
| 489 | |||
| 490 | //this is an array which holds last ToF to each anchor it should
|
||
| 491 | uint32_t tofArray[MAX_ANCHOR_LIST_SIZE]; //contain 4 ToF to 4 anchors all relating to same range number sequence
|
||
| 492 | |||
| 493 | uint32_t tofAnc[MAX_ANCHOR_LIST_SIZE]; //this is an array which holds last ToFs from particular anchors (0, 0-1, 0-2, 1-2)
|
||
| 494 | |||
| 495 | //this is an array which holds last ToFs of the Anchor to Anchor ranging
|
||
| 496 | uint32_t tofArrayAnc[MAX_ANCHOR_LIST_SIZE]; //it contains 3 ToFs relating to same range number sequence (0, 0-1, 0-2, 1-2)
|
||
| 497 | |||
| 498 | #if (DISCOVERY ==1) |
||
| 499 | uint8_t tagListLen ; |
||
| 500 | uint8_t tagList[MAX_TAG_LIST_SIZE][8];
|
||
| 501 | #endif
|
||
| 502 | |||
| 503 | //debug counters
|
||
| 504 | //int txMsgCount; //number of transmitted messages
|
||
| 505 | //int rxMsgCount; //number of received messages
|
||
| 506 | //int rxTimeouts ; //number of received timeout events
|
||
| 507 | //int lateTX; //number of "LATE" TX events
|
||
| 508 | //int lateRX; //number of "LATE" RX events
|
||
| 509 | |||
| 510 | |||
| 511 | //ranging counters
|
||
| 512 | int longTermRangeCount ; //total number of ranges |
||
| 513 | |||
| 514 | int newRange; //flag set when there is a new range to report TOF_REPORT_A2A or TOF_REPORT_T2A |
||
| 515 | int newRangeAncAddress; //last 4 bytes of anchor address - used for printing/range output display |
||
| 516 | int newRangeTagAddress; //last 4 bytes of tag address - used for printing/range output display |
||
| 517 | int newRangeTime;
|
||
| 518 | |||
| 519 | uint8_t gatewayAnchor ; //set to TRUE = 1 if anchor address == GATEWAY_ANCHOR_ADDR
|
||
| 520 | |||
| 521 | //event queue - used to store DW1000 events as they are processed by the dw_isr/callback functions
|
||
| 522 | event_data_t dwevent[MAX_EVENT_NUMBER]; //this holds any TX/RX events and associated message data
|
||
| 523 | uint8_t dweventIdxOut; |
||
| 524 | uint8_t dweventIdxIn; |
||
| 525 | uint8_t dweventPeek; |
||
| 526 | uint8_t monitor; |
||
| 527 | uint32_t timeofTx ; |
||
| 528 | |||
| 529 | uint8_t smartPowerEn; |
||
| 530 | |||
| 531 | #if (READ_EVENT_COUNTERS == 1) |
||
| 532 | dwt_deviceentcnts_t ecounters; |
||
| 533 | #endif
|
||
| 534 | |||
| 535 | } instance_data_t ; |
||
| 536 | |||
| 537 | //-------------------------------------------------------------------------------------------------------------
|
||
| 538 | //
|
||
| 539 | // Functions used in logging/displaying range and status data
|
||
| 540 | //
|
||
| 541 | //-------------------------------------------------------------------------------------------------------------
|
||
| 542 | |||
| 543 | // function to calculate and the range from given Time of Flight
|
||
| 544 | int instance_calculate_rangefromTOF(int idx, uint32_t tofx); |
||
| 545 | |||
| 546 | void instance_cleardisttable(int idx); |
||
| 547 | void instance_set_tagdist(int tidx, int aidx); |
||
| 548 | double instance_get_tagdist(int idx); |
||
| 549 | |||
| 550 | double instance_get_idist(int idx); |
||
| 551 | double instance_get_idistraw(int idx); |
||
| 552 | int instance_get_idist_mm(int idx); |
||
| 553 | int instance_get_idistraw_mm(int idx); |
||
| 554 | uint8_t instance_validranges(void);
|
||
| 555 | |||
| 556 | int instance_get_rnum(void); |
||
| 557 | int instance_get_rnuma(int idx); |
||
| 558 | int instance_get_rnumanc(int idx); |
||
| 559 | int instance_get_lcount(void); |
||
| 560 | |||
| 561 | int instance_newrangeancadd(void); |
||
| 562 | int instance_newrangetagadd(void); |
||
| 563 | int instance_newrangepolltim(void); |
||
| 564 | int instance_newrange(void); |
||
| 565 | int instance_newrangetim(void); |
||
| 566 | |||
| 567 | int instance_calc_ranges(uint32_t *array, uint16_t size, int reportRange, uint8_t* mask); |
||
| 568 | |||
| 569 | // clear the status/ranging data
|
||
| 570 | void instance_clearcounts(void) ; |
||
| 571 | |||
| 572 | void instance_cleardisttableall(void); |
||
| 573 | //-------------------------------------------------------------------------------------------------------------
|
||
| 574 | //
|
||
| 575 | // Functions used in driving/controlling the ranging application
|
||
| 576 | //
|
||
| 577 | //-------------------------------------------------------------------------------------------------------------
|
||
| 578 | |||
| 579 | // Call init, then call config, then call run.
|
||
| 580 | // initialise the instance (application) structures and DW1000 device
|
||
| 581 | int instance_init(int role, DW1000Driver* drv); |
||
| 582 | // configure the instance and DW1000 device
|
||
| 583 | void instance_config(instanceConfig_t *config, sfConfig_t *sfconfig) ;
|
||
| 584 | |||
| 585 | // configure the MAC address
|
||
| 586 | void instance_set_16bit_address(uint16_t address) ;
|
||
| 587 | void instance_config_frameheader_16bit(instance_data_t *inst);
|
||
| 588 | |||
| 589 | void tag_process_rx_timeout(instance_data_t *inst);
|
||
| 590 | |||
| 591 | // called (periodically or from and interrupt) to process any outstanding TX/RX events and to drive the ranging application
|
||
| 592 | int tag_run(void) ; |
||
| 593 | int anch_run(void) ; // returns indication of status report change |
||
| 594 | |||
| 595 | // configure TX/RX callback functions that are called from DW1000 ISR
|
||
| 596 | void rx_ok_cb_tag(const dwt_cb_data_t *cb_data); |
||
| 597 | void rx_to_cb_tag(const dwt_cb_data_t *cb_data); |
||
| 598 | void rx_err_cb_tag(const dwt_cb_data_t *cb_data); |
||
| 599 | //void tx_conf_cb_tag(const dwt_cb_data_t *cb_data);
|
||
| 600 | |||
| 601 | void rx_ok_cb_anch(const dwt_cb_data_t *cb_data); |
||
| 602 | void rx_to_cb_anch(const dwt_cb_data_t *cb_data); |
||
| 603 | void rx_err_cb_anch(const dwt_cb_data_t *cb_data); |
||
| 604 | void tx_conf_cb(const dwt_cb_data_t *cb_data); |
||
| 605 | |||
| 606 | void instance_set_replydelay(int delayms); |
||
| 607 | |||
| 608 | // set/get the instance roles e.g. Tag/Anchor
|
||
| 609 | // done though instance_init void instance_set_role(int mode) ; //
|
||
| 610 | int instance_get_role(void) ; |
||
| 611 | // get the DW1000 device ID (e.g. 0xDECA0130 for DW1000)
|
||
| 612 | uint32_t instance_readdeviceid(void) ; // Return Device ID reg, enables validation of physical device presence |
||
| 613 | |||
| 614 | void rnganch_change_back_to_anchor(instance_data_t *inst);
|
||
| 615 | int instance_send_delayed_frame(instance_data_t *inst, int delayedTx); |
||
| 616 | |||
| 617 | uint64_t instance_convert_usec_to_devtimeu (double microsecu);
|
||
| 618 | |||
| 619 | |||
| 620 | void instance_seteventtime(event_data_t *dw_event, uint8_t* timeStamp);
|
||
| 621 | |||
| 622 | int instance_peekevent(void); |
||
| 623 | |||
| 624 | void instance_saveevent(event_data_t newevent, uint8_t etype);
|
||
| 625 | |||
| 626 | event_data_t instance_getsavedevent(void);
|
||
| 627 | |||
| 628 | void instance_putevent(event_data_t newevent, uint8_t etype);
|
||
| 629 | |||
| 630 | event_data_t* instance_getevent(int x);
|
||
| 631 | |||
| 632 | void instance_clearevents(void); |
||
| 633 | |||
| 634 | void instance_notify_DW1000_inIDLE(int idle); |
||
| 635 | |||
| 636 | // configure the antenna delays
|
||
| 637 | void instance_config_antennadelays(uint16_t tx, uint16_t rx);
|
||
| 638 | void instance_set_antennadelays(void); |
||
| 639 | uint16_t instance_get_txantdly(void);
|
||
| 640 | uint16_t instance_get_rxantdly(void);
|
||
| 641 | |||
| 642 | // configure the TX power
|
||
| 643 | void instance_config_txpower(uint32_t txpower);
|
||
| 644 | void instance_set_txpower(void); |
||
| 645 | int instance_starttxtest(int framePeriod); |
||
| 646 | |||
| 647 | |||
| 648 | instance_data_t* instance_get_local_structure_ptr(unsigned int x); |
||
| 649 | |||
| 650 | #ifdef __cplusplus
|
||
| 651 | } |
||
| 652 | #endif
|
||
| 653 | #endif /* defined(AMIROLLD_CFG_USE_DW1000) */ |
||
| 654 | #endif //__DECAINSTANCE_H__ |