amiro-os / os / hal / ports / STM32 / LLD / QEIv1 / hal_qei_lld.h @ 0128be0f
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1 | e545e620 | Thomas Schöpping | /*
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2 | AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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3 | Copyright (C) 2016..2018 Thomas Schöpping et al.
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4 | |||
5 | This program is free software: you can redistribute it and/or modify
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6 | it under the terms of the GNU General Public License as published by
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7 | the Free Software Foundation, either version 3 of the License, or
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8 | (at your option) any later version.
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9 | |||
10 | This program is distributed in the hope that it will be useful,
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11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 | GNU General Public License for more details.
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14 | |||
15 | You should have received a copy of the GNU General Public License
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16 | along with this program. If not, see <http://www.gnu.org/licenses/>.
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17 | */
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18 | |||
19 | 3f899f5d | Thomas Schöpping | /**
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20 | e545e620 | Thomas Schöpping | * @file STM32/hal_qei_lld.h
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21 | 3f899f5d | Thomas Schöpping | * @brief STM32 QEI subsystem low level driver header.
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22 | *
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23 | * @addtogroup QEI
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24 | * @{
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25 | */
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26 | |||
27 | e545e620 | Thomas Schöpping | #ifndef _HAL_QEI_LLD_H_
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28 | #define _HAL_QEI_LLD_H_
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29 | 58fe0e0b | Thomas Schöpping | |
30 | #include "stm32_tim.h" |
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31 | |||
32 | #if HAL_USE_QEI || defined(__DOXYGEN__)
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33 | |||
34 | /*===========================================================================*/
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35 | /* Driver constants. */
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36 | /*===========================================================================*/
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37 | |||
38 | /**
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39 | * @brief Number of input channels per QEI driver.
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40 | */
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41 | #define QEI_CHANNELS 2 |
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42 | |||
43 | /*===========================================================================*/
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44 | /* Driver pre-compile time settings. */
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45 | /*===========================================================================*/
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46 | |||
47 | /**
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48 | * @name Configuration options
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49 | * @{
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50 | */
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51 | /**
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52 | * @brief QEID1 driver enable switch.
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53 | * @details If set to @p TRUE the support for QEID1 is included.
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54 | * @note The default is @p TRUE.
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55 | */
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56 | #if !defined(STM32_QEI_USE_TIM1) || defined(__DOXYGEN__)
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57 | #define STM32_QEI_USE_TIM1 TRUE
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58 | #endif
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59 | |||
60 | /**
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61 | * @brief QEID2 driver enable switch.
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62 | * @details If set to @p TRUE the support for QEID2 is included.
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63 | * @note The default is @p TRUE.
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64 | */
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65 | #if !defined(STM32_QEI_USE_TIM2) || defined(__DOXYGEN__)
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66 | #define STM32_QEI_USE_TIM2 TRUE
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67 | #endif
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68 | |||
69 | /**
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70 | * @brief QEID3 driver enable switch.
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71 | * @details If set to @p TRUE the support for QEID3 is included.
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72 | * @note The default is @p TRUE.
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73 | */
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74 | #if !defined(STM32_QEI_USE_TIM3) || defined(__DOXYGEN__)
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75 | #define STM32_QEI_USE_TIM3 TRUE
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76 | #endif
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77 | |||
78 | /**
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79 | * @brief QEID4 driver enable switch.
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80 | * @details If set to @p TRUE the support for QEID4 is included.
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81 | * @note The default is @p TRUE.
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82 | */
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83 | #if !defined(STM32_QEI_USE_TIM4) || defined(__DOXYGEN__)
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84 | #define STM32_QEI_USE_TIM4 TRUE
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85 | #endif
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86 | |||
87 | /**
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88 | * @brief QEID5 driver enable switch.
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89 | * @details If set to @p TRUE the support for QEID5 is included.
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90 | * @note The default is @p TRUE.
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91 | */
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92 | #if !defined(STM32_QEI_USE_TIM5) || defined(__DOXYGEN__)
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93 | #define STM32_QEI_USE_TIM5 TRUE
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94 | #endif
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95 | |||
96 | /**
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97 | * @brief QEID8 driver enable switch.
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98 | * @details If set to @p TRUE the support for QEID8 is included.
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99 | * @note The default is @p TRUE.
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100 | */
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101 | #if !defined(STM32_QEI_USE_TIM8) || defined(__DOXYGEN__)
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102 | #define STM32_QEI_USE_TIM8 TRUE
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103 | #endif
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104 | /** @} */
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105 | |||
106 | /*===========================================================================*/
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107 | /* Derived constants and error checks. */
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108 | /*===========================================================================*/
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109 | |||
110 | #if STM32_QEI_USE_TIM1 && !STM32_HAS_TIM1
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111 | #error "TIM1 not present in the selected device" |
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112 | #endif
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113 | |||
114 | #if STM32_QEI_USE_TIM2 && !STM32_HAS_TIM2
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115 | #error "TIM2 not present in the selected device" |
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116 | #endif
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117 | |||
118 | #if STM32_QEI_USE_TIM3 && !STM32_HAS_TIM3
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119 | #error "TIM3 not present in the selected device" |
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120 | #endif
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121 | |||
122 | #if STM32_QEI_USE_TIM4 && !STM32_HAS_TIM4
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123 | #error "TIM4 not present in the selected device" |
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124 | #endif
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125 | |||
126 | #if STM32_QEI_USE_TIM5 && !STM32_HAS_TIM5
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127 | #error "TIM5 not present in the selected device" |
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128 | #endif
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129 | |||
130 | #if STM32_QEI_USE_TIM8 && !STM32_HAS_TIM8
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131 | #error "TIM8 not present in the selected device" |
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132 | #endif
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133 | |||
134 | #if !STM32_QEI_USE_TIM1 && !STM32_QEI_USE_TIM2 && \
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135 | !STM32_QEI_USE_TIM3 && !STM32_QEI_USE_TIM4 && \ |
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136 | !STM32_QEI_USE_TIM5 && !STM32_QEI_USE_TIM8 |
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137 | #error "QEI driver activated but no TIM peripheral assigned" |
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138 | #endif
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139 | |||
140 | /*===========================================================================*/
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141 | /* Driver data structures and types. */
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142 | /*===========================================================================*/
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143 | |||
144 | /**
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145 | * @brief QEI driver mode.
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146 | */
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147 | typedef enum { |
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148 | QEI_COUNT_BOTH = 0,
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149 | QEI_COUNT_CH1 = 1,
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150 | QEI_COUNT_CH2 = 2,
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151 | } qeimode_t; |
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152 | |||
153 | /**
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154 | * @brief QEI input mode.
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155 | */
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156 | typedef enum { |
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157 | QEI_INPUT_NONINVERTED = 0, /**< Input channel noninverted.*/ |
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158 | QEI_INPUT_INVERTED = 1, /**< Input channel inverted.*/ |
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159 | } qeiinputmode_t; |
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160 | |||
161 | /**
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162 | * @brief QEI count type.
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163 | */
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164 | typedef uint32_t qeicnt_t;
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165 | |||
166 | /**
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167 | * @brief Driver channel configuration structure.
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168 | */
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169 | typedef struct { |
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170 | /**
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171 | * @brief Channel input logic.
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172 | */
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173 | qeiinputmode_t mode; |
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174 | /* End of the mandatory fields.*/
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175 | } QEIChannelConfig; |
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176 | |||
177 | /**
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178 | * @brief Driver configuration structure.
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179 | */
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180 | typedef struct { |
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181 | /**
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182 | * @brief Driver mode.
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183 | */
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184 | qeimode_t mode; |
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185 | /**
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186 | * @brief Channels configurations.
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187 | */
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188 | QEIChannelConfig channels[QEI_CHANNELS]; |
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189 | /**
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190 | * @brief Range in pulses.
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191 | */
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192 | qeicnt_t range; |
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193 | /* End of the mandatory fields.*/
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194 | } QEIConfig; |
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195 | |||
196 | /**
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197 | * @brief Structure representing an QEI driver.
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198 | */
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199 | struct QEIDriver {
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200 | /**
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201 | * @brief Driver state.
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202 | */
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203 | qeistate_t state; |
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204 | /**
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205 | * @brief Current configuration data.
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206 | */
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207 | const QEIConfig *config;
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208 | #if defined(QEI_DRIVER_EXT_FIELDS)
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209 | QEI_DRIVER_EXT_FIELDS |
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210 | #endif
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211 | /* End of the mandatory fields.*/
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212 | /**
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213 | * @brief Pointer to the TIMx registers block.
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214 | */
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215 | stm32_tim_t *tim; |
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216 | }; |
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217 | |||
218 | /*===========================================================================*/
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219 | /* Driver macros. */
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220 | /*===========================================================================*/
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221 | |||
222 | /**
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223 | * @brief Returns the direction of the last transition.
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224 | * @details The direction is defined as boolean and is
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225 | * calculated at each transition on any input.
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226 | *
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227 | * @param[in] qeip pointer to the @p QEIDriver object
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228 | * @return The request direction.
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229 | * @retval FALSE Position counted up.
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230 | * @retval TRUE Position counted down.
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231 | *
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232 | * @iclass
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233 | */
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234 | #define qei_lld_get_direction(qeip) !!((qeip)->tim->CR1 & TIM_CR1_DIR)
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235 | |||
236 | /**
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237 | * @brief Returns the position of the encoder.
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238 | * @details The position is defined as number of pulses since last reset.
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239 | *
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240 | * @param[in] qeip pointer to the @p QEIDriver object
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241 | * @return The number of pulses.
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242 | *
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243 | * @iclass
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244 | */
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245 | #define qei_lld_get_position(qeip) ((qeip)->tim->CNT)
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246 | |||
247 | /**
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248 | * @brief Returns the range of the encoder.
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249 | * @details The range is defined as number of maximum pulse count.
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250 | *
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251 | * @param[in] qeip pointer to the @p QEIDriver object
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252 | * @return The number of pulses.
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253 | *
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254 | * @iclass
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255 | */
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256 | #define qei_lld_get_range(qeip) ((qeip)->tim->ARR + 1) |
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257 | |||
258 | /*===========================================================================*/
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259 | /* External declarations. */
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260 | /*===========================================================================*/
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261 | |||
262 | #if STM32_QEI_USE_TIM1 && !defined(__DOXYGEN__)
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263 | extern QEIDriver QEID1;
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264 | #endif
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265 | |||
266 | #if STM32_QEI_USE_TIM2 && !defined(__DOXYGEN__)
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267 | extern QEIDriver QEID2;
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268 | #endif
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269 | |||
270 | #if STM32_QEI_USE_TIM3 && !defined(__DOXYGEN__)
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271 | extern QEIDriver QEID3;
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272 | #endif
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273 | |||
274 | #if STM32_QEI_USE_TIM4 && !defined(__DOXYGEN__)
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275 | extern QEIDriver QEID4;
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276 | #endif
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277 | |||
278 | #if STM32_QEI_USE_TIM5 && !defined(__DOXYGEN__)
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279 | extern QEIDriver QEID5;
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280 | #endif
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281 | |||
282 | #if STM32_QEI_USE_TIM8 && !defined(__DOXYGEN__)
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283 | extern QEIDriver QEID8;
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284 | #endif
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285 | |||
286 | #ifdef __cplusplus
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287 | extern "C" { |
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288 | #endif
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289 | void qei_lld_init(void); |
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290 | void qei_lld_start(QEIDriver *qeip);
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291 | void qei_lld_stop(QEIDriver *qeip);
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292 | void qei_lld_enable(QEIDriver *qeip);
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293 | void qei_lld_disable(QEIDriver *qeip);
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294 | #ifdef __cplusplus
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295 | } |
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296 | #endif
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297 | |||
298 | #endif /* HAL_USE_QEI */ |
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299 | |||
300 | e545e620 | Thomas Schöpping | #endif /* _HAL_QEI_LLD_H_ */ |
301 | 3f899f5d | Thomas Schöpping | |
302 | /** @} */ |