amiro-os / os / hal / ports / rules_data.ld @ 20a4e01c
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/* |
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AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
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Copyright (C) 2016..2018 Thomas Schöpping et al. |
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|
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This program is free software: you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation, either version 3 of the License, or |
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(at your option) any later version. |
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|
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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|
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You should have received a copy of the GNU General Public License |
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along with this program. If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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|
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__ram0_start__ = ORIGIN(ram0); |
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__ram0_size__ = LENGTH(ram0); |
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__ram0_end__ = __ram0_start__ + __ram0_size__; |
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__ram1_start__ = ORIGIN(ram1); |
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__ram1_size__ = LENGTH(ram1); |
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__ram1_end__ = __ram1_start__ + __ram1_size__; |
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__ram2_start__ = ORIGIN(ram2); |
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__ram2_size__ = LENGTH(ram2); |
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__ram2_end__ = __ram2_start__ + __ram2_size__; |
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__ram3_start__ = ORIGIN(ram3); |
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__ram3_size__ = LENGTH(ram3); |
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__ram3_end__ = __ram3_start__ + __ram3_size__; |
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__ram4_start__ = ORIGIN(ram4); |
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__ram4_size__ = LENGTH(ram4); |
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__ram4_end__ = __ram4_start__ + __ram4_size__; |
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__ram5_start__ = ORIGIN(ram5); |
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__ram5_size__ = LENGTH(ram5); |
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__ram5_end__ = __ram5_start__ + __ram5_size__; |
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__ram6_start__ = ORIGIN(ram6); |
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__ram6_size__ = LENGTH(ram6); |
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__ram6_end__ = __ram6_start__ + __ram6_size__; |
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__ram7_start__ = ORIGIN(ram7); |
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__ram7_size__ = LENGTH(ram7); |
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__ram7_end__ = __ram7_start__ + __ram7_size__; |
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|
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ENTRY(Reset_Handler) |
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|
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SECTIONS |
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{ |
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.data : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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PROVIDE(_textdata = LOADADDR(.data)); |
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PROVIDE(_data = .); |
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_textdata_start = LOADADDR(.data); |
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_data_start = .; |
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*(.data) |
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*(.data.*) |
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*(.ramtext) |
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. = ALIGN(4); |
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PROVIDE(_edata = .); |
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_data_end = .; |
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} > DATA_RAM AT > DATA_RAM_LMA |
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|
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.bss (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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_bss_start = .; |
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*(.bss) |
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*(.bss.*) |
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*(COMMON) |
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. = ALIGN(4); |
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_bss_end = .; |
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PROVIDE(end = .); |
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} > BSS_RAM |
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|
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.ram0_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram0_init_text__ = LOADADDR(.ram0_init); |
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__ram0_init__ = .; |
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KEEP(*(.ram0_init)) |
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KEEP(*(.ram0_init.*)) |
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. = ALIGN(4); |
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} > ram0 AT > RAM_INIT_FLASH_LMA |
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|
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.ram0 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram0_clear__ = .; |
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*(.ram0_clear) |
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*(.ram0_clear.*) |
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. = ALIGN(4); |
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__ram0_noinit__ = .; |
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*(.ram0) |
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*(.ram0.*) |
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. = ALIGN(4); |
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__ram0_free__ = .; |
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} > ram0 |
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|
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.ram1_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram1_init_text__ = LOADADDR(.ram1_init); |
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__ram1_init__ = .; |
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KEEP(*(.ram1_init)) |
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KEEP(*(.ram1_init.*)) |
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. = ALIGN(4); |
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} > ram1 AT > RAM_INIT_FLASH_LMA |
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|
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.ram1 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram1_clear__ = .; |
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*(.ram1_clear) |
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*(.ram1_clear.*) |
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. = ALIGN(4); |
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__ram1_noinit__ = .; |
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*(.ram1) |
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*(.ram1.*) |
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. = ALIGN(4); |
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__ram1_free__ = .; |
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} > ram1 |
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|
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.ram2_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram2_init_text__ = LOADADDR(.ram2_init); |
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__ram2_init__ = .; |
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KEEP(*(.ram2_init)) |
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KEEP(*(.ram2_init.*)) |
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. = ALIGN(4); |
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} > ram2 AT > RAM_INIT_FLASH_LMA |
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|
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.ram2 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram2_clear__ = .; |
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*(.ram2_clear) |
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*(.ram2_clear.*) |
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. = ALIGN(4); |
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__ram2_noinit__ = .; |
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*(.ram2) |
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*(.ram2.*) |
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. = ALIGN(4); |
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__ram2_free__ = .; |
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} > ram2 |
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|
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.ram3_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram3_init_text__ = LOADADDR(.ram3_init); |
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__ram3_init__ = .; |
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KEEP(*(.ram3_init)) |
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KEEP(*(.ram3_init.*)) |
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. = ALIGN(4); |
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} > ram3 AT > RAM_INIT_FLASH_LMA |
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|
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.ram3 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram3_clear__ = .; |
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*(.ram3_clear) |
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*(.ram3_clear.*) |
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. = ALIGN(4); |
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__ram3_noinit__ = .; |
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*(.ram3) |
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*(.ram3.*) |
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. = ALIGN(4); |
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__ram3_free__ = .; |
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} > ram3 |
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|
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.ram4_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram4_init_text__ = LOADADDR(.ram4_init); |
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__ram4_init__ = .; |
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KEEP(*(.ram4_init)) |
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KEEP(*(.ram4_init.*)) |
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. = ALIGN(4); |
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} > ram4 AT > RAM_INIT_FLASH_LMA |
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|
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.ram4 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram4_clear__ = .; |
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*(.ram4_clear) |
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*(.ram4_clear.*) |
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. = ALIGN(4); |
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__ram4_noinit__ = .; |
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*(.ram4) |
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*(.ram4.*) |
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. = ALIGN(4); |
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__ram4_free__ = .; |
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} > ram4 |
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|
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.ram5_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram5_init_text__ = LOADADDR(.ram5_init); |
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__ram5_init__ = .; |
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KEEP(*(.ram5_init)) |
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KEEP(*(.ram5_init.*)) |
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. = ALIGN(4); |
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} > ram5 AT > RAM_INIT_FLASH_LMA |
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|
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.ram5 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram5_clear__ = .; |
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*(.ram5_clear) |
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*(.ram5_clear.*) |
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. = ALIGN(4); |
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__ram5_noinit__ = .; |
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*(.ram5) |
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*(.ram5.*) |
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. = ALIGN(4); |
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__ram5_free__ = .; |
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} > ram5 |
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|
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.ram6_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram6_init_text__ = LOADADDR(.ram6_init); |
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__ram6_init__ = .; |
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KEEP(*(.ram6_init)) |
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KEEP(*(.ram6_init.*)) |
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. = ALIGN(4); |
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} > ram6 AT > RAM_INIT_FLASH_LMA |
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|
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.ram6 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram6_clear__ = .; |
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*(.ram6_clear) |
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*(.ram6_clear.*) |
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. = ALIGN(4); |
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__ram6_noinit__ = .; |
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*(.ram6) |
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*(.ram6.*) |
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. = ALIGN(4); |
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__ram6_free__ = .; |
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} > ram6 |
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|
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.ram7_init : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram7_init_text__ = LOADADDR(.ram7_init); |
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__ram7_init__ = .; |
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KEEP(*(.ram7_init)) |
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KEEP(*(.ram7_init.*)) |
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. = ALIGN(4); |
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} > ram7 AT > RAM_INIT_FLASH_LMA |
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|
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.ram7 (NOLOAD) : ALIGN(4) |
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{ |
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. = ALIGN(4); |
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__ram7_clear__ = .; |
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*(.ram7_clear) |
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*(.ram7_clear.*) |
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. = ALIGN(4); |
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__ram7_noinit__ = .; |
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*(.ram7) |
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*(.ram7.*) |
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. = ALIGN(4); |
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__ram7_free__ = .; |
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} > ram7 |
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|
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/* The default heap uses the (statically) unused part of a RAM section.*/ |
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.heap (NOLOAD) : |
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{ |
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. = ALIGN(8); |
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__heap_base__ = .; |
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. = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); |
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__heap_end__ = .; |
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} > HEAP_RAM |
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} |
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