amiro-os / os / hal / ports / rules_data.ld @ 20a4e01c
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1 | e545e620 | Thomas Schöpping | /* |
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2 | AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
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3 | Copyright (C) 2016..2018 Thomas Schöpping et al. |
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4 | |||
5 | This program is free software: you can redistribute it and/or modify |
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6 | it under the terms of the GNU General Public License as published by |
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7 | the Free Software Foundation, either version 3 of the License, or |
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8 | (at your option) any later version. |
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9 | |||
10 | This program is distributed in the hope that it will be useful, |
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11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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13 | GNU General Public License for more details. |
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14 | |||
15 | You should have received a copy of the GNU General Public License |
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16 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
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17 | */ |
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18 | |||
19 | __ram0_start__ = ORIGIN(ram0); |
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20 | __ram0_size__ = LENGTH(ram0); |
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21 | __ram0_end__ = __ram0_start__ + __ram0_size__; |
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22 | __ram1_start__ = ORIGIN(ram1); |
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23 | __ram1_size__ = LENGTH(ram1); |
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24 | __ram1_end__ = __ram1_start__ + __ram1_size__; |
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25 | __ram2_start__ = ORIGIN(ram2); |
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26 | __ram2_size__ = LENGTH(ram2); |
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27 | __ram2_end__ = __ram2_start__ + __ram2_size__; |
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28 | __ram3_start__ = ORIGIN(ram3); |
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29 | __ram3_size__ = LENGTH(ram3); |
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30 | __ram3_end__ = __ram3_start__ + __ram3_size__; |
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31 | __ram4_start__ = ORIGIN(ram4); |
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32 | __ram4_size__ = LENGTH(ram4); |
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33 | __ram4_end__ = __ram4_start__ + __ram4_size__; |
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34 | __ram5_start__ = ORIGIN(ram5); |
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35 | __ram5_size__ = LENGTH(ram5); |
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36 | __ram5_end__ = __ram5_start__ + __ram5_size__; |
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37 | __ram6_start__ = ORIGIN(ram6); |
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38 | __ram6_size__ = LENGTH(ram6); |
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39 | __ram6_end__ = __ram6_start__ + __ram6_size__; |
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40 | __ram7_start__ = ORIGIN(ram7); |
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41 | __ram7_size__ = LENGTH(ram7); |
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42 | __ram7_end__ = __ram7_start__ + __ram7_size__; |
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43 | |||
44 | ENTRY(Reset_Handler) |
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45 | |||
46 | SECTIONS |
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47 | { |
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48 | .data : ALIGN(4) |
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49 | { |
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50 | . = ALIGN(4); |
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51 | PROVIDE(_textdata = LOADADDR(.data)); |
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52 | PROVIDE(_data = .); |
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53 | _textdata_start = LOADADDR(.data); |
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54 | _data_start = .; |
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55 | *(.data) |
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56 | *(.data.*) |
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57 | *(.ramtext) |
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58 | . = ALIGN(4); |
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59 | PROVIDE(_edata = .); |
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60 | _data_end = .; |
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61 | } > DATA_RAM AT > DATA_RAM_LMA |
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62 | |||
63 | .bss (NOLOAD) : ALIGN(4) |
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64 | { |
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65 | . = ALIGN(4); |
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66 | _bss_start = .; |
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67 | *(.bss) |
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68 | *(.bss.*) |
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69 | *(COMMON) |
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70 | . = ALIGN(4); |
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71 | _bss_end = .; |
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72 | PROVIDE(end = .); |
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73 | } > BSS_RAM |
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74 | |||
75 | .ram0_init : ALIGN(4) |
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76 | { |
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77 | . = ALIGN(4); |
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78 | __ram0_init_text__ = LOADADDR(.ram0_init); |
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79 | __ram0_init__ = .; |
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80 | KEEP(*(.ram0_init)) |
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81 | KEEP(*(.ram0_init.*)) |
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82 | . = ALIGN(4); |
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83 | } > ram0 AT > RAM_INIT_FLASH_LMA |
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84 | |||
85 | .ram0 (NOLOAD) : ALIGN(4) |
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86 | { |
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87 | . = ALIGN(4); |
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88 | __ram0_clear__ = .; |
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89 | *(.ram0_clear) |
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90 | *(.ram0_clear.*) |
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91 | . = ALIGN(4); |
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92 | __ram0_noinit__ = .; |
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93 | *(.ram0) |
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94 | *(.ram0.*) |
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95 | . = ALIGN(4); |
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96 | __ram0_free__ = .; |
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97 | } > ram0 |
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98 | |||
99 | .ram1_init : ALIGN(4) |
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100 | { |
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101 | . = ALIGN(4); |
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102 | __ram1_init_text__ = LOADADDR(.ram1_init); |
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103 | __ram1_init__ = .; |
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104 | KEEP(*(.ram1_init)) |
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105 | KEEP(*(.ram1_init.*)) |
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106 | . = ALIGN(4); |
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107 | } > ram1 AT > RAM_INIT_FLASH_LMA |
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108 | |||
109 | .ram1 (NOLOAD) : ALIGN(4) |
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110 | { |
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111 | . = ALIGN(4); |
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112 | __ram1_clear__ = .; |
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113 | *(.ram1_clear) |
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114 | *(.ram1_clear.*) |
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115 | . = ALIGN(4); |
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116 | __ram1_noinit__ = .; |
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117 | *(.ram1) |
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118 | *(.ram1.*) |
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119 | . = ALIGN(4); |
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120 | __ram1_free__ = .; |
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121 | } > ram1 |
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122 | |||
123 | .ram2_init : ALIGN(4) |
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124 | { |
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125 | . = ALIGN(4); |
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126 | __ram2_init_text__ = LOADADDR(.ram2_init); |
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127 | __ram2_init__ = .; |
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128 | KEEP(*(.ram2_init)) |
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129 | KEEP(*(.ram2_init.*)) |
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130 | . = ALIGN(4); |
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131 | } > ram2 AT > RAM_INIT_FLASH_LMA |
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132 | |||
133 | .ram2 (NOLOAD) : ALIGN(4) |
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134 | { |
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135 | . = ALIGN(4); |
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136 | __ram2_clear__ = .; |
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137 | *(.ram2_clear) |
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138 | *(.ram2_clear.*) |
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139 | . = ALIGN(4); |
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140 | __ram2_noinit__ = .; |
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141 | *(.ram2) |
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142 | *(.ram2.*) |
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143 | . = ALIGN(4); |
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144 | __ram2_free__ = .; |
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145 | } > ram2 |
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146 | |||
147 | .ram3_init : ALIGN(4) |
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148 | { |
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149 | . = ALIGN(4); |
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150 | __ram3_init_text__ = LOADADDR(.ram3_init); |
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151 | __ram3_init__ = .; |
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152 | KEEP(*(.ram3_init)) |
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153 | KEEP(*(.ram3_init.*)) |
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154 | . = ALIGN(4); |
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155 | } > ram3 AT > RAM_INIT_FLASH_LMA |
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156 | |||
157 | .ram3 (NOLOAD) : ALIGN(4) |
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158 | { |
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159 | . = ALIGN(4); |
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160 | __ram3_clear__ = .; |
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161 | *(.ram3_clear) |
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162 | *(.ram3_clear.*) |
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163 | . = ALIGN(4); |
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164 | __ram3_noinit__ = .; |
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165 | *(.ram3) |
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166 | *(.ram3.*) |
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167 | . = ALIGN(4); |
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168 | __ram3_free__ = .; |
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169 | } > ram3 |
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170 | |||
171 | .ram4_init : ALIGN(4) |
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172 | { |
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173 | . = ALIGN(4); |
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174 | __ram4_init_text__ = LOADADDR(.ram4_init); |
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175 | __ram4_init__ = .; |
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176 | KEEP(*(.ram4_init)) |
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177 | KEEP(*(.ram4_init.*)) |
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178 | . = ALIGN(4); |
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179 | } > ram4 AT > RAM_INIT_FLASH_LMA |
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180 | |||
181 | .ram4 (NOLOAD) : ALIGN(4) |
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182 | { |
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183 | . = ALIGN(4); |
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184 | __ram4_clear__ = .; |
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185 | *(.ram4_clear) |
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186 | *(.ram4_clear.*) |
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187 | . = ALIGN(4); |
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188 | __ram4_noinit__ = .; |
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189 | *(.ram4) |
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190 | *(.ram4.*) |
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191 | . = ALIGN(4); |
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192 | __ram4_free__ = .; |
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193 | } > ram4 |
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194 | |||
195 | .ram5_init : ALIGN(4) |
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196 | { |
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197 | . = ALIGN(4); |
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198 | __ram5_init_text__ = LOADADDR(.ram5_init); |
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199 | __ram5_init__ = .; |
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200 | KEEP(*(.ram5_init)) |
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201 | KEEP(*(.ram5_init.*)) |
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202 | . = ALIGN(4); |
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203 | } > ram5 AT > RAM_INIT_FLASH_LMA |
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204 | |||
205 | .ram5 (NOLOAD) : ALIGN(4) |
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206 | { |
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207 | . = ALIGN(4); |
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208 | __ram5_clear__ = .; |
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209 | *(.ram5_clear) |
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210 | *(.ram5_clear.*) |
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211 | . = ALIGN(4); |
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212 | __ram5_noinit__ = .; |
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213 | *(.ram5) |
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214 | *(.ram5.*) |
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215 | . = ALIGN(4); |
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216 | __ram5_free__ = .; |
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217 | } > ram5 |
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218 | |||
219 | .ram6_init : ALIGN(4) |
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220 | { |
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221 | . = ALIGN(4); |
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222 | __ram6_init_text__ = LOADADDR(.ram6_init); |
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223 | __ram6_init__ = .; |
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224 | KEEP(*(.ram6_init)) |
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225 | KEEP(*(.ram6_init.*)) |
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226 | . = ALIGN(4); |
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227 | } > ram6 AT > RAM_INIT_FLASH_LMA |
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228 | |||
229 | .ram6 (NOLOAD) : ALIGN(4) |
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230 | { |
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231 | . = ALIGN(4); |
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232 | __ram6_clear__ = .; |
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233 | *(.ram6_clear) |
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234 | *(.ram6_clear.*) |
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235 | . = ALIGN(4); |
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236 | __ram6_noinit__ = .; |
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237 | *(.ram6) |
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238 | *(.ram6.*) |
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239 | . = ALIGN(4); |
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240 | __ram6_free__ = .; |
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241 | } > ram6 |
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242 | |||
243 | .ram7_init : ALIGN(4) |
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244 | { |
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245 | . = ALIGN(4); |
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246 | __ram7_init_text__ = LOADADDR(.ram7_init); |
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247 | __ram7_init__ = .; |
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248 | KEEP(*(.ram7_init)) |
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249 | KEEP(*(.ram7_init.*)) |
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250 | . = ALIGN(4); |
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251 | } > ram7 AT > RAM_INIT_FLASH_LMA |
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252 | |||
253 | .ram7 (NOLOAD) : ALIGN(4) |
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254 | { |
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255 | . = ALIGN(4); |
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256 | __ram7_clear__ = .; |
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257 | *(.ram7_clear) |
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258 | *(.ram7_clear.*) |
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259 | . = ALIGN(4); |
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260 | __ram7_noinit__ = .; |
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261 | *(.ram7) |
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262 | *(.ram7.*) |
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263 | . = ALIGN(4); |
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264 | __ram7_free__ = .; |
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265 | } > ram7 |
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266 | |||
267 | /* The default heap uses the (statically) unused part of a RAM section.*/ |
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268 | .heap (NOLOAD) : |
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269 | { |
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270 | . = ALIGN(8); |
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271 | __heap_base__ = .; |
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272 | . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); |
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273 | __heap_end__ = .; |
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274 | } > HEAP_RAM |
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275 | } |