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amiro-os / modules / DiWheelDrive_1-1 / board.h @ 510b93cc

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1 e545e620 Thomas Schöpping
/*
2
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
3 84f0ce9e Thomas Schöpping
Copyright (C) 2016..2019  Thomas Schöpping et al.
4 e545e620 Thomas Schöpping

5
This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
9

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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
14

15
You should have received a copy of the GNU General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.
17
*/
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19 53710ca3 Marc Rothmann
/**
20 37bacabf Thomas Schöpping
 * @file
21 53710ca3 Marc Rothmann
 * @brief   DiWheeDrive v1.1 Board specific macros.
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 *
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 * @addtogroup diwheeldrive_board
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 * @{
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 */
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27 6ff06bbf Thomas Schöpping
#ifndef BOARD_H
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#define BOARD_H
29 e545e620 Thomas Schöpping
30 cda14729 Thomas Schöpping
/*===========================================================================*/
31
/* Driver constants.                                                         */
32
/*===========================================================================*/
33
34 e545e620 Thomas Schöpping
/*
35 043cdf33 Thomas Schöpping
 * Setup for AMiRo DiWheelDrive v1.1 board.
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 */
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38
/*
39
 * Board identifier.
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 */
41 3cb82b1a Thomas Schöpping
#define BOARD_DIWHEELDRIVE_1_1
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#define BOARD_NAME              "AMiRo DiWheelDrive v1.1"
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44
/*
45
 * Board oscillators-related settings.
46
 * NOTE: LSE not fitted.
47
 */
48
#if !defined(STM32_LSECLK)
49
#define STM32_LSECLK                0U
50
#endif
51
52
#if !defined(STM32_HSECLK)
53
#define STM32_HSECLK                8000000U
54
#endif
55
56
/*
57
 * Board voltages.
58
 * Required for performance limits calculation.
59
 */
60
#define STM32_VDD                   330U
61
62
/*
63
 * MCU type as defined in the ST header.
64
 */
65
#define STM32F103xE
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67
/*
68
 * IO pins assignments.
69
 */
70
#define GPIOA_WKUP                  0U
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#define GPIOA_LED                   1U
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#define GPIOA_DRIVE_PWM1A           2U
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#define GPIOA_DRIVE_PWM1B           3U
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#define GPIOA_PIN4                  4U
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#define GPIOA_MOTION_SCLK           5U
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#define GPIOA_MOTION_MISO           6U
77
#define GPIOA_MOTION_MOSI           7U
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#define GPIOA_PIN8                  8U
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#define GPIOA_PROG_RX               9U
80
#define GPIOA_PROG_TX               10U
81
#define GPIOA_CAN_RX                11U
82
#define GPIOA_CAN_TX                12U
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#define GPIOA_SWDIO                 13U
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#define GPIOA_SWCLK                 14U
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#define GPIOA_DRIVE_PWM2B           15U
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87
#define GPIOB_PIN0                  0U
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#define GPIOB_DRIVE_SENSE2          1U
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#define GPIOB_POWER_EN              2U
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#define GPIOB_DRIVE_PWM2A           3U
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#define GPIOB_PIN4                  4U
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#define GPIOB_COMPASS_DRDY          5U
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#define GPIOB_DRIVE_ENC1A           6U
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#define GPIOB_DRIVE_ENC1B           7U
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#define GPIOB_COMPASS_SCL           8U
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#define GPIOB_COMPASS_SDA           9U
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#define GPIOB_IR_SCL                10U
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#define GPIOB_IR_SDA                11U
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#define GPIOB_IR_INT                12U
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#define GPIOB_GYRO_DRDY             13U
101
#define GPIOB_SYS_UART_UP           14U
102
#define GPIOB_ACCEL_INT_N           15U
103
104
#define GPIOC_DRIVE_SENSE1          0U
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#define GPIOC_SYS_INT_N             1U
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#define GPIOC_PIN2                  2U
107
#define GPIOC_PATH_DCSTAT           3U
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#define GPIOC_PIN4                  4U
109
#define GPIOC_PATH_DCEN             5U
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#define GPIOC_DRIVE_ENC2B           6U
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#define GPIOC_DRIVE_ENC2A           7U
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#define GPIOC_SYS_PD_N              8U
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#define GPIOC_SYS_REG_EN            9U
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#define GPIOC_SYS_UART_RX           10U
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#define GPIOC_SYS_UART_TX           11U
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#define GPIOC_PIN12                 12U
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#define GPIOC_ACCEL_SS_N            13U
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#define GPIOC_GYRO_SS_N             14U
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#define GPIOC_PIN15                 15U
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#define GPIOD_OSC_IN                0U
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#define GPIOD_OSC_OUT               1U
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#define GPIOD_SYS_WARMRST_N         2U
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#define GPIOD_PIN3                  3U
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#define GPIOD_PIN4                  4U
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#define GPIOD_PIN5                  5U
127
#define GPIOD_PIN6                  6U
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#define GPIOD_PIN7                  7U
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#define GPIOD_PIN8                  8U
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#define GPIOD_PIN9                  9U
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#define GPIOD_PIN10                 10U
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#define GPIOD_PIN11                 11U
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#define GPIOD_PIN12                 12U
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#define GPIOD_PIN13                 13U
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#define GPIOD_PIN14                 14U
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#define GPIOD_PIN15                 15U
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#define GPIOE_PIN0                  0U
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#define GPIOE_PIN1                  1U
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#define GPIOE_PIN2                  2U
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#define GPIOE_PIN3                  3U
142
#define GPIOE_PIN4                  4U
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#define GPIOE_PIN5                  5U
144
#define GPIOE_PIN6                  6U
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#define GPIOE_PIN7                  7U
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#define GPIOE_PIN8                  8U
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#define GPIOE_PIN9                  9U
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#define GPIOE_PIN10                 10U
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#define GPIOE_PIN11                 11U
150
#define GPIOE_PIN12                 12U
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#define GPIOE_PIN13                 13U
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#define GPIOE_PIN14                 14U
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#define GPIOE_PIN15                 15U
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#define GPIOF_PIN0                  0U
156
#define GPIOF_PIN1                  1U
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#define GPIOF_PIN2                  2U
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#define GPIOF_PIN3                  3U
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#define GPIOF_PIN4                  4U
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#define GPIOF_PIN5                  5U
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#define GPIOF_PIN6                  6U
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#define GPIOF_PIN7                  7U
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#define GPIOF_PIN8                  8U
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#define GPIOF_PIN9                  9U
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#define GPIOF_PIN10                 10U
166
#define GPIOF_PIN11                 11U
167
#define GPIOF_PIN12                 12U
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#define GPIOF_PIN13                 13U
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#define GPIOF_PIN14                 14U
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#define GPIOF_PIN15                 15U
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#define GPIOG_PIN0                  0U
173
#define GPIOG_PIN1                  1U
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#define GPIOG_PIN2                  2U
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#define GPIOG_PIN3                  3U
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#define GPIOG_PIN4                  4U
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#define GPIOG_PIN5                  5U
178
#define GPIOG_PIN6                  6U
179
#define GPIOG_PIN7                  7U
180
#define GPIOG_PIN8                  8U
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#define GPIOG_PIN9                  9U
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#define GPIOG_PIN10                 10U
183
#define GPIOG_PIN11                 11U
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#define GPIOG_PIN12                 12U
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#define GPIOG_PIN13                 13U
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#define GPIOG_PIN14                 14U
187
#define GPIOG_PIN15                 15U
188
189
/*
190
 * IO lines assignments.
191
 */
192
#define LINE_WKUP                   PAL_LINE(GPIOA, GPIOA_WKUP)
193
#define LINE_LED                    PAL_LINE(GPIOA, GPIOA_LED)
194
#define LINE_DRIVE_PWM1A            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1A)
195
#define LINE_DRIVE_PWM1B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1B)
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#define LINE_MOTION_SCLK            PAL_LINE(GPIOA, GPIOA_MOTION_SCLK)
197
#define LINE_MOTION_MISO            PAL_LINE(GPIOA, GPIOA_MOTION_MISO)
198
#define LINE_MOTION_MOSI            PAL_LINE(GPIOA, GPIOA_MOTION_MOSI)
199
#define LINE_PROG_RX                PAL_LINE(GPIOA, GPIOA_PROG_RX)
200
#define LINE_PROG_TX                PAL_LINE(GPIOA, GPIOA_PROG_TX)
201
#define LINE_CAN_RX                 PAL_LINE(GPIOA, GPIOA_CAN_RX)
202
#define LINE_CAN_TX                 PAL_LINE(GPIOA, GPIOA_CAN_TX)
203
#define LINE_SWDIO                  PAL_LINE(GPIOA, GPIOA_SWDIO)
204
#define LINE_SWCLK                  PAL_LINE(GPIOA, GPIOA_SWCLK)
205
#define LINE_DRIVE_PWM2B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM2B)
206
207
#define LINE_DRIVE_SENSE2           PAL_LINE(GPIOB, GPIOB_DRIVE_SENSE2)
208
#define LINE_POWER_EN               PAL_LINE(GPIOB, GPIOB_POWER_EN)
209
#define LINE_DRIVE_PWM2A            PAL_LINE(GPIOB, GPIOB_DRIVE_PWM2A)
210
#define LINE_COMPASS_DRDY           PAL_LINE(GPIOB, GPIOB_COMPASS_DRDY)
211
#define LINE_DRIVE_ENC1A            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1A)
212
#define LINE_DRIVE_ENC1B            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1B)
213
#define LINE_COMPASS_SCL            PAL_LINE(GPIOB, GPIOB_COMPASS_SCL)
214
#define LINE_COMPASS_SDA            PAL_LINE(GPIOB, GPIOB_COMPASS_SDA)
215
#define LINE_IR_SCL                 PAL_LINE(GPIOB, GPIOB_IR_SCL)
216
#define LINE_IR_SDA                 PAL_LINE(GPIOB, GPIOB_IR_SDA)
217
#define LINE_IR_INT                 PAL_LINE(GPIOB, GPIOB_IR_INT)
218
#define LINE_GYRO_DRDY              PAL_LINE(GPIOB, GPIOB_GYRO_DRDY)
219
#define LINE_SYS_UART_UP            PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
220
#define LINE_ACCEL_INT_N            PAL_LINE(GPIOB, GPIOB_ACCEL_INT_N)
221
222
#define LINE_DRIVE_SENSE1           PAL_LINE(GPIOC, GPIOC_DRIVE_SENSE1)
223
#define LINE_SYS_INT_N              PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
224
#define LINE_PATH_DCSTAT            PAL_LINE(GPIOC, GPIOC_PATH_DCSTAT)
225
#define LINE_PATH_DCEN              PAL_LINE(GPIOC, GPIOC_PATH_DCEN)
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#define LINE_DRIVE_ENC2B            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2B)
227
#define LINE_DRIVE_ENC2A            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2A)
228
#define LINE_SYS_PD_N               PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
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#define LINE_SYS_REG_EN             PAL_LINE(GPIOC, GPIOC_SYS_REG_EN)
230
#define LINE_SYS_UART_RX            PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
231
#define LINE_SYS_UART_TX            PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
232
#define LINE_ACCEL_SS_N             PAL_LINE(GPIOC, GPIOC_ACCEL_SS_N)
233
#define LINE_GYRO_SS_N              PAL_LINE(GPIOC, GPIOC_GYRO_SS_N)
234
235
#define LINE_OSC_IN                 PAL_LINE(GPIOD, GPIOD_OSC_IN)
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#define LINE_OSC_OUT                PAL_LINE(GPIOD, GPIOD_OSC_OUT)
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#define LINE_SYS_WARMRST_N          PAL_LINE(GPIOD, GPIOD_SYS_WARMRST_N)
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239 cda14729 Thomas Schöpping
/*===========================================================================*/
240
/* Driver pre-compile time settings.                                         */
241
/*===========================================================================*/
242
243
/*===========================================================================*/
244
/* Derived constants and error checks.                                       */
245
/*===========================================================================*/
246
247
/*===========================================================================*/
248
/* Driver data structures and types.                                         */
249
/*===========================================================================*/
250
251
/*===========================================================================*/
252
/* Driver macros.                                                            */
253
/*===========================================================================*/
254
255 e545e620 Thomas Schöpping
/*
256
 * I/O ports initial setup, this configuration is established soon after reset
257
 * in the initialization code.
258
 * Please refer to the STM32 Reference Manual for details.
259
 */
260
#define PIN_MODE_INPUT              0U
261
#define PIN_MODE_OUTPUT_2M          2U
262
#define PIN_MODE_OUTPUT_10M         1U
263
#define PIN_MODE_OUTPUT_50M         3U
264
#define PIN_CNF_INPUT_ANALOG        0U
265
#define PIN_CNF_INPUT_FLOATING      1U
266
#define PIN_CNF_INPUT_PULLX         2U
267
#define PIN_CNF_OUTPUT_PUSHPULL     0U
268
#define PIN_CNF_OUTPUT_OPENDRAIN    1U
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#define PIN_CNF_ALTERNATE_PUSHPULL  2U
270
#define PIN_CNF_ALTERNATE_OPENDRAIN 3U
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#define PIN_CR(pin, mode, cnf)      (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U))
272
#define PIN_ODR_LOW(n)              (0U << (n))
273
#define PIN_ODR_HIGH(n)             (1U << (n))
274 37bacabf Thomas Schöpping
#define PIN_IGNORE(n)               (1U << (n))
275 e545e620 Thomas Schöpping
276
/*
277
 * GPIOA setup:
278
 *
279
 * PA0  - WKUP                      (input floating)
280
 * PA1  - LED                       (output opendrain high 50MHz)
281
 * PA2  - DRIVE_PWM1A               (alternate pushpull 50MHz)
282
 * PA3  - DRIVE_PWM1B               (alternate pushpull 50MHz)
283
 * PA4  - PIN4                      (input floating)
284
 * PA5  - MOTION_SCLK               (alternate pushpull 50MHz)
285
 * PA6  - MOTION_MISO               (input pullup)
286
 * PA7  - MOTION_MOSI               (alternate pushpull 50MHz)
287
 * PA8  - PIN8                      (input floating)
288
 * PA9  - PROG_RX                   (alternate pushpull 50MHz)
289
 * PA10 - PROG_TX                   (input pullup)
290
 * PA11 - CAN_RX                    (input pullup)
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 * PA12 - CAN_TX                    (alternate pushpull 50MHz)
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 * PA13 - SWDIO                     (input pullup)
293
 * PA14 - SWCLK                     (input pullup)
294
 * PA15 - DRIVE_PWM2B               (alternate pushpull 50MHz)
295
 */
296 37bacabf Thomas Schöpping
#define VAL_GPIOAIGN                (PIN_IGNORE(GPIOA_LED)) & 0
297 e545e620 Thomas Schöpping
#define VAL_GPIOACRL                (PIN_CR(GPIOA_WKUP, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
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                                     PIN_CR(GPIOA_LED, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |            \
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                                     PIN_CR(GPIOA_DRIVE_PWM1A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
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                                     PIN_CR(GPIOA_DRIVE_PWM1B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
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                                     PIN_CR(GPIOA_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
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                                     PIN_CR(GPIOA_MOTION_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
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                                     PIN_CR(GPIOA_MOTION_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |              \
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                                     PIN_CR(GPIOA_MOTION_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
305
#define VAL_GPIOACRH                (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
306
                                     PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |      \
307
                                     PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
308
                                     PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                   \
309 933df08e Thomas Schöpping
                                     PIN_CR(GPIOA_CAN_TX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |       \
310 e545e620 Thomas Schöpping
                                     PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
311
                                     PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
312
                                     PIN_CR(GPIOA_DRIVE_PWM2B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
313
#define VAL_GPIOAODR                (PIN_ODR_HIGH(GPIOA_WKUP) |                                                    \
314
                                     PIN_ODR_HIGH(GPIOA_LED) |                                                     \
315
                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1A) |                                             \
316
                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1B) |                                             \
317
                                     PIN_ODR_LOW(GPIOA_PIN4) |                                                     \
318
                                     PIN_ODR_HIGH(GPIOA_MOTION_SCLK) |                                             \
319
                                     PIN_ODR_HIGH(GPIOA_MOTION_MISO) |                                             \
320
                                     PIN_ODR_HIGH(GPIOA_MOTION_MOSI) |                                             \
321
                                     PIN_ODR_LOW(GPIOA_PIN8) |                                                     \
322
                                     PIN_ODR_HIGH(GPIOA_PROG_RX) |                                                 \
323
                                     PIN_ODR_HIGH(GPIOA_PROG_TX) |                                                 \
324
                                     PIN_ODR_HIGH(GPIOA_CAN_RX) |                                                  \
325
                                     PIN_ODR_HIGH(GPIOA_CAN_TX) |                                                  \
326
                                     PIN_ODR_HIGH(GPIOA_SWDIO) |                                                   \
327
                                     PIN_ODR_HIGH(GPIOA_SWCLK) |                                                   \
328
                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM2B))
329
330
/*
331
 * GPIOB setup:
332
 *
333
 * PB0  - PIN0                      (input floating)
334
 * PB1  - DRIVE_SENSE2              (input analog)
335
 * PB2  - POWER_EN                  (output pushpull low 50MHz)
336
 * PB3  - DRIVE_PWM2A               (alternate pushpull 50MHz)
337
 * PB4  - PIN4                      (input floating)
338
 * PB5  - COMPASS_DRDY              (input pullup)
339
 * PB6  - DRIVE_ENC1A               (input floating)
340
 * PB7  - DRIVE_ENC1B               (input floating)
341
 * PB8  - COMPASS_SCL               (alternate opendrain 50MHz)
342
 * PB9  - COMPASS_SDA               (alternate opendrain 50MHz)
343
 * PB10 - IR_SCL                    (alternate opendrain 50MHz)
344
 * PB11 - IR_SDA                    (alternate opendrain 50MHz)
345 542939ea Thomas Schöpping
 * PB12 - IR_INT                    (input floating)
346 e545e620 Thomas Schöpping
 * PB13 - GYRO_DRDY                 (input pullup)
347
 * PB14 - SYS_UART_UP               (output opendrain high 50MHz)
348
 * PB15 - ACCEL_INT_N               (input pullup)
349
 */
350 37bacabf Thomas Schöpping
#define VAL_GPIOBIGN                (PIN_IGNORE(GPIOB_SYS_UART_UP)) & 0
351 e545e620 Thomas Schöpping
#define VAL_GPIOBCRL                (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
352
                                     PIN_CR(GPIOB_DRIVE_SENSE2, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
353
                                     PIN_CR(GPIOB_POWER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |        \
354
                                     PIN_CR(GPIOB_DRIVE_PWM2A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
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                                     PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
356
                                     PIN_CR(GPIOB_COMPASS_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |             \
357
                                     PIN_CR(GPIOB_DRIVE_ENC1A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
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                                     PIN_CR(GPIOB_DRIVE_ENC1B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
359
#define VAL_GPIOBCRH                (PIN_CR(GPIOB_COMPASS_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
360
                                     PIN_CR(GPIOB_COMPASS_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
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                                     PIN_CR(GPIOB_IR_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
362
                                     PIN_CR(GPIOB_IR_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
363
                                     PIN_CR(GPIOB_IR_INT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
364
                                     PIN_CR(GPIOB_GYRO_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
365
                                     PIN_CR(GPIOB_SYS_UART_UP, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |    \
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                                     PIN_CR(GPIOB_ACCEL_INT_N, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX))
367
#define VAL_GPIOBODR                (PIN_ODR_LOW(GPIOB_PIN0) |                                                     \
368
                                     PIN_ODR_HIGH(GPIOB_DRIVE_SENSE2) |                                            \
369
                                     PIN_ODR_LOW(GPIOB_POWER_EN) |                                                 \
370
                                     PIN_ODR_HIGH(GPIOB_DRIVE_PWM2A) |                                             \
371
                                     PIN_ODR_LOW(GPIOB_PIN4) |                                                     \
372
                                     PIN_ODR_HIGH(GPIOB_COMPASS_DRDY) |                                            \
373
                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1A) |                                             \
374
                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1B) |                                             \
375
                                     PIN_ODR_HIGH(GPIOB_COMPASS_SCL) |                                             \
376
                                     PIN_ODR_HIGH(GPIOB_COMPASS_SDA) |                                             \
377
                                     PIN_ODR_HIGH(GPIOB_IR_SCL) |                                                  \
378
                                     PIN_ODR_HIGH(GPIOB_IR_SDA) |                                                  \
379
                                     PIN_ODR_HIGH(GPIOB_IR_INT) |                                                  \
380
                                     PIN_ODR_HIGH(GPIOB_GYRO_DRDY) |                                               \
381
                                     PIN_ODR_HIGH(GPIOB_SYS_UART_UP) |                                             \
382
                                     PIN_ODR_HIGH(GPIOB_ACCEL_INT_N))
383
384
/*
385
 * GPIOC setup:
386
 *
387
 * PC0  - DRIVE_SENSE1              (input analog)
388
 * PC1  - SYS_INT_N                 (output opendrain low 50MHz)
389
 * PC2  - PIN2                      (input floating)
390
 * PC3  - PATH_DCSTAT               (input floating)
391
 * PC4  - PIN4                      (input floating)
392
 * PC5  - PATH_DCEN                 (output pushpull low 50MHz)
393
 * PC6  - DRIVE_ENC2B               (input floating)
394
 * PC7  - DRIVE_ENC2A               (input floating)
395
 * PC8  - SYS_PD_N                  (output opendrain high 50MHz)
396
 * PC9  - SYS_REG_EN                (input floating)
397
 * PC10 - SYS_UART_RX               (input floating)
398
 * PC11 - SYS_UART_TX               (input floating)
399
 * PC12 - PIN12                     (input pullup)
400
 * PC13 - ACCEL_SS_N                (output pushpull high 50MHz)
401
 * PC14 - GYRO_SS_N                 (output pushpull high 50MHz)
402
 * PC15 - PIN15                     (input floating)
403
 */
404 37bacabf Thomas Schöpping
#define VAL_GPIOCIGN                (PIN_IGNORE(GPIOC_SYS_INT_N) |                                                 \
405
                                     PIN_IGNORE(GPIOC_SYS_PD_N)) & 0
406 e545e620 Thomas Schöpping
#define VAL_GPIOCCRL                (PIN_CR(GPIOC_DRIVE_SENSE1, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
407 37bacabf Thomas Schöpping
                                     PIN_CR(GPIOC_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |      \
408 e545e620 Thomas Schöpping
                                     PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
409
                                     PIN_CR(GPIOC_PATH_DCSTAT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
410
                                     PIN_CR(GPIOC_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
411
                                     PIN_CR(GPIOC_PATH_DCEN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
412
                                     PIN_CR(GPIOC_DRIVE_ENC2B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
413
                                     PIN_CR(GPIOC_DRIVE_ENC2A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
414
#define VAL_GPIOCCRH                (PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |       \
415
                                     PIN_CR(GPIOC_SYS_REG_EN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |            \
416
                                     PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
417
                                     PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
418
                                     PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
419
                                     PIN_CR(GPIOC_ACCEL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |      \
420
                                     PIN_CR(GPIOC_GYRO_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
421
                                     PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
422
#define VAL_GPIOCODR                (PIN_ODR_HIGH(GPIOC_DRIVE_SENSE1) |                                            \
423
                                     PIN_ODR_LOW(GPIOC_SYS_INT_N) |                                                \
424
                                     PIN_ODR_LOW(GPIOC_PIN2) |                                                     \
425
                                     PIN_ODR_HIGH(GPIOC_PATH_DCSTAT) |                                             \
426
                                     PIN_ODR_LOW(GPIOC_PIN4) |                                                     \
427
                                     PIN_ODR_LOW(GPIOC_PATH_DCEN) |                                                \
428
                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2B) |                                             \
429
                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2A) |                                             \
430
                                     PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                                                \
431
                                     PIN_ODR_HIGH(GPIOC_SYS_REG_EN) |                                              \
432
                                     PIN_ODR_HIGH(GPIOC_SYS_UART_RX) |                                             \
433
                                     PIN_ODR_HIGH(GPIOC_SYS_UART_TX) |                                             \
434
                                     PIN_ODR_LOW(GPIOC_PIN12) |                                                    \
435
                                     PIN_ODR_HIGH(GPIOC_ACCEL_SS_N) |                                              \
436
                                     PIN_ODR_HIGH(GPIOC_GYRO_SS_N) |                                               \
437
                                     PIN_ODR_LOW(GPIOC_PIN15))
438
439
/*
440
 * GPIOD setup:
441
 *
442
 * PD0  - OSC_IN                    (input floating)
443
 * PD1  - OSC_OUT                   (input floating)
444
 * PD2  - SYS_WARMRST_N             (output opendrain high 50MHz)
445
 * PD3  - PIN3                      (input floating)
446
 * PD4  - PIN4                      (input floating)
447
 * PD5  - PIN5                      (input floating)
448
 * PD6  - PIN6                      (input floating)
449
 * PD7  - PIN7                      (input floating)
450
 * PD8  - PIN8                      (input floating)
451
 * PD9  - PIN9                      (input floating)
452
 * PD10 - PIN10                     (input floating)
453
 * PD11 - PIN11                     (input floating)
454
 * PD12 - PIN12                     (input floating)
455
 * PD13 - PIN13                     (input floating)
456
 * PD14 - PIN14                     (input floating)
457
 * PD15 - PIN15                     (input floating)
458
 */
459 37bacabf Thomas Schöpping
#define VAL_GPIODIGN                0
460 e545e620 Thomas Schöpping
#define VAL_GPIODCRL                (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
461
                                     PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
462
                                     PIN_CR(GPIOD_SYS_WARMRST_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |  \
463
                                     PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
464
                                     PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
465
                                     PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
466
                                     PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
467
                                     PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
468
#define VAL_GPIODCRH                (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
469
                                     PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
470
                                     PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
471
                                     PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
472
                                     PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
473
                                     PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
474
                                     PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
475
                                     PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
476
#define VAL_GPIODODR                (PIN_ODR_HIGH(GPIOD_OSC_IN) |                                                  \
477
                                     PIN_ODR_HIGH(GPIOD_OSC_OUT) |                                                 \
478
                                     PIN_ODR_HIGH(GPIOD_SYS_WARMRST_N) |                                           \
479
                                     PIN_ODR_LOW(GPIOD_PIN3) |                                                     \
480
                                     PIN_ODR_LOW(GPIOD_PIN4) |                                                     \
481
                                     PIN_ODR_LOW(GPIOD_PIN5) |                                                     \
482
                                     PIN_ODR_LOW(GPIOD_PIN6) |                                                     \
483
                                     PIN_ODR_LOW(GPIOD_PIN7) |                                                     \
484
                                     PIN_ODR_LOW(GPIOD_PIN8) |                                                     \
485
                                     PIN_ODR_LOW(GPIOD_PIN9) |                                                     \
486
                                     PIN_ODR_LOW(GPIOD_PIN10) |                                                    \
487
                                     PIN_ODR_LOW(GPIOD_PIN11) |                                                    \
488
                                     PIN_ODR_LOW(GPIOD_PIN12) |                                                    \
489
                                     PIN_ODR_LOW(GPIOD_PIN13) |                                                    \
490
                                     PIN_ODR_LOW(GPIOD_PIN14) |                                                    \
491
                                     PIN_ODR_LOW(GPIOD_PIN15))
492
493
/*
494
 * GPIOE setup:
495
 *
496
 * PE0  - PIN0                      (input floating)
497
 * PE1  - PIN1                      (input floating)
498
 * PE2  - PIN2                      (input floating)
499
 * PE3  - PIN3                      (input floating)
500
 * PE4  - PIN4                      (input floating)
501
 * PE5  - PIN5                      (input floating)
502
 * PE6  - PIN6                      (input floating)
503
 * PE7  - PIN7                      (input floating)
504
 * PE8  - PIN8                      (input floating)
505
 * PE9  - PIN9                      (input floating)
506
 * PE10 - PIN10                     (input floating)
507
 * PE11 - PIN11                     (input floating)
508
 * PE12 - PIN12                     (input floating)
509
 * PE13 - PIN13                     (input floating)
510
 * PE14 - PIN14                     (input floating)
511
 * PE15 - PIN15                     (input floating)
512
 */
513 37bacabf Thomas Schöpping
#define VAL_GPIOEIGN                0
514 e545e620 Thomas Schöpping
#define VAL_GPIOECRL                (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
515
                                     PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
516
                                     PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
517
                                     PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
518
                                     PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
519
                                     PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
520
                                     PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
521
                                     PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
522
#define VAL_GPIOECRH                (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
523
                                     PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
524
                                     PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
525
                                     PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
526
                                     PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
527
                                     PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
528
                                     PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
529
                                     PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
530
#define VAL_GPIOEODR                (PIN_ODR_LOW(GPIOE_PIN0) |                                                     \
531
                                     PIN_ODR_LOW(GPIOE_PIN1) |                                                     \
532
                                     PIN_ODR_LOW(GPIOE_PIN2) |                                                     \
533
                                     PIN_ODR_LOW(GPIOE_PIN3) |                                                     \
534
                                     PIN_ODR_LOW(GPIOE_PIN4) |                                                     \
535
                                     PIN_ODR_LOW(GPIOE_PIN5) |                                                     \
536
                                     PIN_ODR_LOW(GPIOE_PIN6) |                                                     \
537
                                     PIN_ODR_LOW(GPIOE_PIN7) |                                                     \
538
                                     PIN_ODR_LOW(GPIOE_PIN8) |                                                     \
539
                                     PIN_ODR_LOW(GPIOE_PIN9) |                                                     \
540
                                     PIN_ODR_LOW(GPIOE_PIN10) |                                                    \
541
                                     PIN_ODR_LOW(GPIOE_PIN11) |                                                    \
542
                                     PIN_ODR_LOW(GPIOE_PIN12) |                                                    \
543
                                     PIN_ODR_LOW(GPIOE_PIN13) |                                                    \
544
                                     PIN_ODR_LOW(GPIOE_PIN14) |                                                    \
545
                                     PIN_ODR_LOW(GPIOE_PIN15))
546
547
/*
548
 * GPIOF setup:
549
 *
550
 * PF0  - PIN0                      (input floating)
551
 * PF1  - PIN1                      (input floating)
552
 * PF2  - PIN2                      (input floating)
553
 * PF3  - PIN3                      (input floating)
554
 * PF4  - PIN4                      (input floating)
555
 * PF5  - PIN5                      (input floating)
556
 * PF6  - PIN6                      (input floating)
557
 * PF7  - PIN7                      (input floating)
558
 * PF8  - PIN8                      (input floating)
559
 * PF9  - PIN9                      (input floating)
560
 * PF10 - PIN10                     (input floating)
561
 * PF11 - PIN11                     (input floating)
562
 * PF12 - PIN12                     (input floating)
563
 * PF13 - PIN13                     (input floating)
564
 * PF14 - PIN14                     (input floating)
565
 * PF15 - PIN15                     (input floating)
566
 */
567 37bacabf Thomas Schöpping
#define VAL_GPIOFIGN                0
568 e545e620 Thomas Schöpping
#define VAL_GPIOFCRL                (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
569
                                     PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
570
                                     PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
571
                                     PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
572
                                     PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
573
                                     PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
574
                                     PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
575
                                     PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
576
#define VAL_GPIOFCRH                (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
577
                                     PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
578
                                     PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
579
                                     PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
580
                                     PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
581
                                     PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
582
                                     PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
583
                                     PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
584
#define VAL_GPIOFODR                (PIN_ODR_LOW(GPIOF_PIN0) |                                                     \
585
                                     PIN_ODR_LOW(GPIOF_PIN1) |                                                     \
586
                                     PIN_ODR_LOW(GPIOF_PIN2) |                                                     \
587
                                     PIN_ODR_LOW(GPIOF_PIN3) |                                                     \
588
                                     PIN_ODR_LOW(GPIOF_PIN4) |                                                     \
589
                                     PIN_ODR_LOW(GPIOF_PIN5) |                                                     \
590
                                     PIN_ODR_LOW(GPIOF_PIN6) |                                                     \
591
                                     PIN_ODR_LOW(GPIOF_PIN7) |                                                     \
592
                                     PIN_ODR_LOW(GPIOF_PIN8) |                                                     \
593
                                     PIN_ODR_LOW(GPIOF_PIN9) |                                                     \
594
                                     PIN_ODR_LOW(GPIOF_PIN10) |                                                    \
595
                                     PIN_ODR_LOW(GPIOF_PIN11) |                                                    \
596
                                     PIN_ODR_LOW(GPIOF_PIN12) |                                                    \
597
                                     PIN_ODR_LOW(GPIOF_PIN13) |                                                    \
598
                                     PIN_ODR_LOW(GPIOF_PIN14) |                                                    \
599
                                     PIN_ODR_LOW(GPIOF_PIN15))
600
601
/*
602
 * GPIOG setup:
603
 *
604
 * PG0  - PIN0                      (input floating)
605
 * PG1  - PIN1                      (input floating)
606
 * PG2  - PIN2                      (input floating)
607
 * PG3  - PIN3                      (input floating)
608
 * PG4  - PIN4                      (input floating)
609
 * PG5  - PIN5                      (input floating)
610
 * PG6  - PIN6                      (input floating)
611
 * PG7  - PIN7                      (input floating)
612
 * PG8  - PIN8                      (input floating)
613
 * PG9  - PIN9                      (input floating)
614
 * PG10 - PIN10                     (input floating)
615
 * PG11 - PIN11                     (input floating)
616
 * PG12 - PIN12                     (input floating)
617
 * PG13 - PIN13                     (input floating)
618
 * PG14 - PIN14                     (input floating)
619
 * PG15 - PIN15                     (input floating)
620
 */
621 37bacabf Thomas Schöpping
#define VAL_GPIOGIGN                0
622 e545e620 Thomas Schöpping
#define VAL_GPIOGCRL                (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
623
                                     PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
624
                                     PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
625
                                     PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
626
                                     PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
627
                                     PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
628
                                     PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
629
                                     PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
630
#define VAL_GPIOGCRH                (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
631
                                     PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
632
                                     PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
633
                                     PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
634
                                     PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
635
                                     PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
636
                                     PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
637
                                     PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
638
#define VAL_GPIOGODR                (PIN_ODR_LOW(GPIOG_PIN0) |                                                     \
639
                                     PIN_ODR_LOW(GPIOG_PIN1) |                                                     \
640
                                     PIN_ODR_LOW(GPIOG_PIN2) |                                                     \
641
                                     PIN_ODR_LOW(GPIOG_PIN3) |                                                     \
642
                                     PIN_ODR_LOW(GPIOG_PIN4) |                                                     \
643
                                     PIN_ODR_LOW(GPIOG_PIN5) |                                                     \
644
                                     PIN_ODR_LOW(GPIOG_PIN6) |                                                     \
645
                                     PIN_ODR_LOW(GPIOG_PIN7) |                                                     \
646
                                     PIN_ODR_LOW(GPIOG_PIN8) |                                                     \
647
                                     PIN_ODR_LOW(GPIOG_PIN9) |                                                     \
648
                                     PIN_ODR_LOW(GPIOG_PIN10) |                                                    \
649
                                     PIN_ODR_LOW(GPIOG_PIN11) |                                                    \
650
                                     PIN_ODR_LOW(GPIOG_PIN12) |                                                    \
651
                                     PIN_ODR_LOW(GPIOG_PIN13) |                                                    \
652
                                     PIN_ODR_LOW(GPIOG_PIN14) |                                                    \
653
                                     PIN_ODR_LOW(GPIOG_PIN15))
654
655 cda14729 Thomas Schöpping
/*===========================================================================*/
656
/* External declarations.                                                    */
657
/*===========================================================================*/
658
659 e545e620 Thomas Schöpping
#if !defined(_FROM_ASM_)
660
#ifdef __cplusplus
661
extern "C" {
662
#endif
663
  void boardInit(void);
664
#ifdef __cplusplus
665
}
666
#endif
667
#endif /* _FROM_ASM_ */
668
669 6ff06bbf Thomas Schöpping
#endif /* BOARD_H */
670 53710ca3 Marc Rothmann
671
/** @} */