amiro-os / modules / PowerManagement_1-1 / board.h @ 510b93cc
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/*
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AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2019 Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file
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* @brief PowerManagement v1.1 Board specific macros.
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*
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* @addtogroup powermanagement_board
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* @{
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*
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* Setup for AMiRo PowerManagement v1.1 board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_POWERMANAGEMENT_1_1
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#define BOARD_NAME "AMiRo PowerManagement v1.1" |
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0U |
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#endif
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000U |
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 330U |
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F405xx
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/*
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* STM32F4 alternate function definitions
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*/
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#define STM32F4xx_AF_system 0U |
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#define STM32F4xx_AF_TIM1to2 1U |
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#define STM32F4xx_AF_TIM3to5 2U |
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#define STM32F4xx_AF_TIM8to11 3U |
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#define STM32F4xx_AF_I2C1to3 4U |
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#define STM32F4xx_AF_SPI1to2 5U |
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#define STM32F4xx_AF_SPI3 6U |
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#define STM32F4xx_AF_USART1to3 7U |
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#define STM32F4xx_AF_USART4to6 8U |
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#define STM32F4xx_AF_CAN1to2_TIM12to14 9U |
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#define STM32F4xx_AF_OTG_HSFS 10U |
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#define STM32F4xx_AF_ETH 11U |
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#define STM32F4xx_AF_FSMC_SDIO_OTGHS 12U |
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#define STM32F4xx_AF_DCMI 13U |
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#define STM32F4xx_AF_EVENTOUT 15U |
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/*
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* Identifiers for the several sensor rings, which can be attached to the PowerManagement v1.1 module.
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*/
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#define BOARD_NOSENSORRING 0 |
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#define BOARD_PROXIMITYSENSOR 1 |
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#define BOARD_DISTANCESENSOR_VL53L0X 2 |
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#define BOARD_DISTANCESENSOR_VL53L1X 3 |
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/*
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* Configuration macro to define which type of sensor ring is attached.
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*/
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#if !defined(BOARD_SENSORRING) || defined(__DOXYGEN__)
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#define BOARD_SENSORRING BOARD_PROXIMITYSENSOR
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#endif
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/*
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* IO pins assignments.
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*/
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#define GPIOA_WKUP 0U |
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#define GPIOA_PIN1 1U |
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#define GPIOA_SYS_UART_TX 2U |
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#define GPIOA_SYS_UART_RX 3U |
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#define GPIOA_SYS_SPI_SS0_N 4U |
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#define GPIOA_SYS_SPI_SCLK 5U |
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#define GPIOA_SYS_SPI_MISO 6U |
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#define GPIOA_SYS_SPI_MOSI 7U |
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#define GPIOA_SYS_REG_EN 8U |
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#define GPIOA_PROG_RX 9U |
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#define GPIOA_PROG_TX 10U |
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#define GPIOA_CAN_RX 11U |
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#define GPIOA_CAN_TX 12U |
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#define GPIOA_SWDIO 13U |
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#define GPIOA_SWCLK 14U |
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#define GPIOA_SYS_SPI_SS1_N 15U |
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#define GPIOB_IR_INT1_N 0U |
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#define GPIOB_VSYS_SENSE 1U |
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#define GPIOB_POWER_EN 2U |
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#define GPIOB_SYS_UART_DN 3U |
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#define GPIOB_CHARGE_STAT2A 4U |
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#define GPIOB_BUZZER 5U |
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#define GPIOB_GAUGE_BATLOW2 6U |
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#define GPIOB_GAUGE_BATGD2_N 7U |
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#define GPIOB_GAUGE_SCL2 8U |
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#define GPIOB_GAUGE_SDA2 9U |
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#define GPIOB_GAUGE_SCL1 10U |
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#define GPIOB_GAUGE_SDA1 11U |
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#define GPIOB_LED 12U |
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#define GPIOB_BT_RTS 13U |
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#define GPIOB_BT_CTS 14U |
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#define GPIOB_SYS_UART_UP 15U |
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#define GPIOC_CHARGE_STAT1A 0U |
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#define GPIOC_GAUGE_BATLOW1 1U |
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#define GPIOC_GAUGE_BATGD1_N 2U |
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#define GPIOC_CHARGE_EN1_N 3U |
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#define GPIOC_IR_INT2_N 4U |
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#define GPIOC_TOUCH_INT_N 5U |
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#define GPIOC_SYS_DONE 6U |
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#define GPIOC_SYS_PROG_N 7U |
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#define GPIOC_PATH_DC 8U |
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#define GPIOC_SYS_SPI_DIR 9U |
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#define GPIOC_BT_RX 10U |
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#define GPIOC_BT_TX 11U |
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#define GPIOC_SYS_INT_N 12U |
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#define GPIOC_SYS_PD_N 13U |
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#define GPIOC_SYS_WARMRST_N 14U |
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#define GPIOC_BT_RST 15U |
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#define GPIOD_PIN0 0U |
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#define GPIOD_PIN1 1U |
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#define GPIOD_CHARGE_EN2_N 2U |
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#define GPIOD_PIN3 3U |
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#define GPIOD_PIN4 4U |
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#define GPIOD_PIN5 5U |
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#define GPIOD_PIN6 6U |
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#define GPIOD_PIN7 7U |
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#define GPIOD_PIN8 8U |
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#define GPIOD_PIN9 9U |
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#define GPIOD_PIN10 10U |
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#define GPIOD_PIN11 11U |
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#define GPIOD_PIN12 12U |
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#define GPIOD_PIN13 13U |
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#define GPIOD_PIN14 14U |
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#define GPIOD_PIN15 15U |
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#define GPIOE_PIN0 0U |
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#define GPIOE_PIN1 1U |
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#define GPIOE_PIN2 2U |
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#define GPIOE_PIN3 3U |
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#define GPIOE_PIN4 4U |
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#define GPIOE_PIN5 5U |
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#define GPIOE_PIN6 6U |
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#define GPIOE_PIN7 7U |
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#define GPIOE_PIN8 8U |
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#define GPIOE_PIN9 9U |
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#define GPIOE_PIN10 10U |
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#define GPIOE_PIN11 11U |
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#define GPIOE_PIN12 12U |
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#define GPIOE_PIN13 13U |
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#define GPIOE_PIN14 14U |
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#define GPIOE_PIN15 15U |
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#define GPIOF_PIN0 0U |
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#define GPIOF_PIN1 1U |
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#define GPIOF_PIN2 2U |
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#define GPIOF_PIN3 3U |
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#define GPIOF_PIN4 4U |
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#define GPIOF_PIN5 5U |
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#define GPIOF_PIN6 6U |
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#define GPIOF_PIN7 7U |
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#define GPIOF_PIN8 8U |
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#define GPIOF_PIN9 9U |
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#define GPIOF_PIN10 10U |
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#define GPIOF_PIN11 11U |
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#define GPIOF_PIN12 12U |
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#define GPIOF_PIN13 13U |
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#define GPIOF_PIN14 14U |
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#define GPIOF_PIN15 15U |
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#define GPIOG_PIN0 0U |
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#define GPIOG_PIN1 1U |
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#define GPIOG_PIN2 2U |
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#define GPIOG_PIN3 3U |
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#define GPIOG_PIN4 4U |
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#define GPIOG_PIN5 5U |
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#define GPIOG_PIN6 6U |
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#define GPIOG_PIN7 7U |
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#define GPIOG_PIN8 8U |
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#define GPIOG_PIN9 9U |
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#define GPIOG_PIN10 10U |
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#define GPIOG_PIN11 11U |
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#define GPIOG_PIN12 12U |
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#define GPIOG_PIN13 13U |
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#define GPIOG_PIN14 14U |
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#define GPIOG_PIN15 15U |
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#define GPIOH_OSC_IN 0U |
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#define GPIOH_OSC_OUT 1U |
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#define GPIOH_PIN2 2U |
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#define GPIOH_PIN3 3U |
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#define GPIOH_PIN4 4U |
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#define GPIOH_PIN5 5U |
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#define GPIOH_PIN6 6U |
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#define GPIOH_PIN7 7U |
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#define GPIOH_PIN8 8U |
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#define GPIOH_PIN9 9U |
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#define GPIOH_PIN10 10U |
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#define GPIOH_PIN11 11U |
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#define GPIOH_PIN12 12U |
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#define GPIOH_PIN13 13U |
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#define GPIOH_PIN14 14U |
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#define GPIOH_PIN15 15U |
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#define GPIOI_PIN0 0U |
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#define GPIOI_PIN1 1U |
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#define GPIOI_PIN2 2U |
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#define GPIOI_PIN3 3U |
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#define GPIOI_PIN4 4U |
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#define GPIOI_PIN5 5U |
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#define GPIOI_PIN6 6U |
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#define GPIOI_PIN7 7U |
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#define GPIOI_PIN8 8U |
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#define GPIOI_PIN9 9U |
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#define GPIOI_PIN10 10U |
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#define GPIOI_PIN11 11U |
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#define GPIOI_PIN12 12U |
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#define GPIOI_PIN13 13U |
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#define GPIOI_PIN14 14U |
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#define GPIOI_PIN15 15U |
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/*
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* IO lines assignments.
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*/
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#define LINE_WKUP PAL_LINE(GPIOA, GPIOA_WKUP)
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#define LINE_SYS_UART_TX PAL_LINE(GPIOA, GPIOA_SYS_UART_TX)
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#define LINE_SYS_UART_RX PAL_LINE(GPIOA, GPIOA_SYS_UART_RX)
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#define LINE_SYS_SPI_SS0_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N)
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#define LINE_SYS_SPI_SCLK PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK)
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#define LINE_SYS_SPI_MISO PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO)
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#define LINE_SYS_SPI_MOSI PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI)
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#define LINE_SYS_REG_EN PAL_LINE(GPIOA, GPIOA_SYS_REG_EN)
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#define LINE_PROG_RX PAL_LINE(GPIOA, GPIOA_PROG_RX)
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#define LINE_PROG_TX PAL_LINE(GPIOA, GPIOA_PROG_TX)
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#define LINE_CAN_RX PAL_LINE(GPIOA, GPIOA_CAN_RX)
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#define LINE_CAN_TX PAL_LINE(GPIOA, GPIOA_CAN_TX)
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#define LINE_SWDIO PAL_LINE(GPIOA, GPIOA_SWDIO)
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#define LINE_SWCLK PAL_LINE(GPIOA, GPIOA_SWCLK)
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#define LINE_SYS_SPI_SS1_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N)
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#define LINE_IR_INT1_N PAL_LINE(GPIOB, GPIOB_IR_INT1_N)
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#define LINE_VSYS_SENSE PAL_LINE(GPIOB, GPIOB_VSYS_SENSE)
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#define LINE_POWER_EN PAL_LINE(GPIOB, GPIOB_POWER_EN)
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#define LINE_SYS_UART_DN PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
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#define LINE_CHARGE_STAT2A PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A)
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#define LINE_BUZZER PAL_LINE(GPIOB, GPIOB_BUZZER)
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#define LINE_GAUGE_BATLOW2 PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2)
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#define LINE_GAUGE_BATGD2_N PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N)
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#define LINE_GAUGE_SCL2 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2)
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#define LINE_GAUGE_SDA2 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2)
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#define LINE_GAUGE_SCL1 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1)
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#define LINE_GAUGE_SDA1 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1)
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#define LINE_LED PAL_LINE(GPIOB, GPIOB_LED)
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#define LINE_BT_RTS PAL_LINE(GPIOB, GPIOB_BT_RTS)
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#define LINE_BT_CTS PAL_LINE(GPIOB, GPIOB_BT_CTS)
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#define LINE_SYS_UART_UP PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
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#define LINE_CHARGE_STAT1A PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A)
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#define LINE_GAUGE_BATLOW1 PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1)
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#define LINE_GAUGE_BATGD1_N PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N)
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#define LINE_CHARGE_EN1_N PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N)
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#define LINE_IR_INT2_N PAL_LINE(GPIOC, GPIOC_IR_INT2_N)
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#define LINE_TOUCH_INT_N PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N)
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#define LINE_SYS_DONE PAL_LINE(GPIOC, GPIOC_SYS_DONE)
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#define LINE_SYS_PROG_N PAL_LINE(GPIOC, GPIOC_SYS_PROG_N)
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#define LINE_PATH_DC PAL_LINE(GPIOC, GPIOC_PATH_DC)
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#define LINE_SYS_SPI_DIR PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR)
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#define LINE_BT_RX PAL_LINE(GPIOC, GPIOC_BT_RX)
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#define LINE_BT_TX PAL_LINE(GPIOC, GPIOC_BT_TX)
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#define LINE_SYS_INT_N PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
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#define LINE_SYS_PD_N PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
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#define LINE_SYS_WARMRST_N PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N)
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#define LINE_BT_RST PAL_LINE(GPIOC, GPIOC_BT_RST)
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#define LINE_CHARGE_EN2_N PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N)
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#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) |
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#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) |
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
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#define PIN_ODR_LOW(n) (0U << (n)) |
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#define PIN_ODR_HIGH(n) (1U << (n)) |
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
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#define PIN_OSPEED_LOW(n) (0U << ((n) * 2U)) |
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#define PIN_OSPEED_MEDIUM(n) (1U << ((n) * 2U)) |
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#define PIN_OSPEED_HIGH(n) (2U << ((n) * 2U)) |
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#define PIN_OSPEED_VERYHIGH(n) (3U << ((n) * 2U)) |
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
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/*
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* GPIOA setup:
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*
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* PA0 - WKUP (input floating)
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* PA1 - PIN1 (input pullup)
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* PA2 - SYS_UART_TX (input floating)
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* PA3 - SYS_UART_RX (alternate 7 pushpull floating)
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* PA4 - SYS_SPI_SS0_N (input floating)
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* PA5 - SYS_SPI_SCLK (alternate 5 pushpull floating)
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* PA6 - SYS_SPI_MISO (alternate 5 pushpull floating)
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* PA7 - SYS_SPI_MOSI (alternate 5 pushpull floating)
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* PA8 - SYS_REG_EN (output pushpull high)
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* PA9 - PROG_RX (alternate 7 pushpull floating)
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* PA10 - PROG_TX (alternate 7 pushpull pullup)
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* PA11 - CAN_RX (alternate 9 pushpull floating)
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* PA12 - CAN_TX (alternate 9 pushpull floating)
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* PA13 - SWDIO (alternate 0 pushpull floating)
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* PA14 - SWCLK (alternate 0 pushpull floating)
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* PA15 - SYS_SPI_SS1_N (input floating)
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_WKUP) | \
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PIN_MODE_INPUT(GPIOA_PIN1) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_UART_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) | \ |
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PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) | \ |
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PIN_MODE_ALTERNATE(GPIOA_PROG_RX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_PROG_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_CAN_RX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_CAN_TX) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ |
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ |
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PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N)) |
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ |
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PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N)) |
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) | \
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406 |
PIN_OSPEED_VERYHIGH(GPIOA_PIN1) | \ |
407 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) | \ |
408 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) | \ |
409 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) | \ |
410 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) | \ |
411 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) | \ |
412 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) | \ |
413 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) | \ |
414 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) | \ |
415 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) | \ |
416 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) | \ |
417 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) | \ |
418 |
PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) | \ |
419 |
PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) | \ |
420 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N)) |
421 |
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_WKUP) | \
|
422 |
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ |
423 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) | \ |
424 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) | \ |
425 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) | \ |
426 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) | \ |
427 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) | \ |
428 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) | \ |
429 |
PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) | \ |
430 |
PIN_PUPDR_FLOATING(GPIOA_PROG_RX) | \ |
431 |
PIN_PUPDR_PULLUP(GPIOA_PROG_TX) | \ |
432 |
PIN_PUPDR_FLOATING(GPIOA_CAN_RX) | \ |
433 |
PIN_PUPDR_FLOATING(GPIOA_CAN_TX) | \ |
434 |
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ |
435 |
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ |
436 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N)) |
437 |
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_WKUP) | \
|
438 |
PIN_ODR_HIGH(GPIOA_PIN1) | \ |
439 |
PIN_ODR_HIGH(GPIOA_SYS_UART_TX) | \ |
440 |
PIN_ODR_HIGH(GPIOA_SYS_UART_RX) | \ |
441 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) | \ |
442 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) | \ |
443 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) | \ |
444 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) | \ |
445 |
PIN_ODR_HIGH(GPIOA_SYS_REG_EN) | \ |
446 |
PIN_ODR_HIGH(GPIOA_PROG_RX) | \ |
447 |
PIN_ODR_HIGH(GPIOA_PROG_TX) | \ |
448 |
PIN_ODR_HIGH(GPIOA_CAN_RX) | \ |
449 |
PIN_ODR_HIGH(GPIOA_CAN_TX) | \ |
450 |
PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
451 |
PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
452 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N)) |
453 |
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) | \
|
454 |
PIN_AFIO_AF(GPIOA_PIN1, STM32F4xx_AF_system) | \ |
455 |
PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) | \ |
456 |
PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) | \ |
457 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) | \ |
458 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) | \ |
459 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) | \ |
460 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2)) |
461 |
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) | \
|
462 |
PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) | \ |
463 |
PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) | \ |
464 |
PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
465 |
PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
466 |
PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) | \ |
467 |
PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) | \ |
468 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system)) |
469 |
|
470 |
/*
|
471 |
* GPIOB setup:
|
472 |
*
|
473 |
* PB0 - IR_INT1_N (input floating)
|
474 |
* PB1 - VSYS_SENSE (analog)
|
475 |
* PB2 - POWER_EN (output pushpull high)
|
476 |
* PB3 - SYS_UART_DN (output opendrain high)
|
477 |
* PB4 - CHARGE_STAT2A (inout floating)
|
478 |
* PB5 - BUZZER (alternate 2 pushpull floating)
|
479 |
* PB6 - GAUGE_BATLOW2 (input floating)
|
480 |
* PB7 - GAUGE_BATGD2_N (input floating)
|
481 |
* PB8 - GAUGE_SCL2 (alternate 4 opendrain floating)
|
482 |
* PB9 - GAUGE_SDA2 (alternate 4 opendrain floating)
|
483 |
* PB10 - GAUGE_SCL1 (alternate 4 opendrain floating)
|
484 |
* PB11 - GAUGE_SDA1 (alternate 4 opendrain floating)
|
485 |
* PB12 - LED (output opendrain high)
|
486 |
* PB13 - BT_RTS (alternate 7 pushpull floating)
|
487 |
* PB14 - BT_CTS (inout floating)
|
488 |
* PB15 - SYS_UART_UP (output opendrain high)
|
489 |
*/
|
490 |
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_IR_INT1_N) | \
|
491 |
PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) | \ |
492 |
PIN_MODE_OUTPUT(GPIOB_POWER_EN) | \ |
493 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) | \ |
494 |
PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) | \ |
495 |
PIN_MODE_ALTERNATE(GPIOB_BUZZER) | \ |
496 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) | \ |
497 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) | \ |
498 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) | \ |
499 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) | \ |
500 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) | \ |
501 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) | \ |
502 |
PIN_MODE_OUTPUT(GPIOB_LED) | \ |
503 |
PIN_MODE_ALTERNATE(GPIOB_BT_RTS) | \ |
504 |
PIN_MODE_INPUT(GPIOB_BT_CTS) | \ |
505 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP)) |
506 |
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) | \
|
507 |
PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) | \ |
508 |
PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) | \ |
509 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) | \ |
510 |
PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) | \ |
511 |
PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) | \ |
512 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) | \ |
513 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) | \ |
514 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) | \ |
515 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) | \ |
516 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) | \ |
517 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) | \ |
518 |
PIN_OTYPE_OPENDRAIN(GPIOB_LED) | \ |
519 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) | \ |
520 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) | \ |
521 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP)) |
522 |
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) | \
|
523 |
PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) | \ |
524 |
PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) | \ |
525 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) | \ |
526 |
PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) | \ |
527 |
PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) | \ |
528 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) | \ |
529 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) | \ |
530 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) | \ |
531 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) | \ |
532 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) | \ |
533 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) | \ |
534 |
PIN_OSPEED_VERYHIGH(GPIOB_LED) | \ |
535 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) | \ |
536 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) | \ |
537 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP)) |
538 |
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) | \
|
539 |
PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) | \ |
540 |
PIN_PUPDR_FLOATING(GPIOB_POWER_EN) | \ |
541 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) | \ |
542 |
PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) | \ |
543 |
PIN_PUPDR_FLOATING(GPIOB_BUZZER) | \ |
544 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) | \ |
545 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) | \ |
546 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) | \ |
547 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) | \ |
548 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) | \ |
549 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) | \ |
550 |
PIN_PUPDR_FLOATING(GPIOB_LED) | \ |
551 |
PIN_PUPDR_FLOATING(GPIOB_BT_RTS) | \ |
552 |
PIN_PUPDR_FLOATING(GPIOB_BT_CTS) | \ |
553 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP)) |
554 |
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_IR_INT1_N) | \
|
555 |
PIN_ODR_HIGH(GPIOB_VSYS_SENSE) | \ |
556 |
PIN_ODR_HIGH(GPIOB_POWER_EN) | \ |
557 |
PIN_ODR_HIGH(GPIOB_SYS_UART_DN) | \ |
558 |
PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) | \ |
559 |
PIN_ODR_HIGH(GPIOB_BUZZER) | \ |
560 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) | \ |
561 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) | \ |
562 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) | \ |
563 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) | \ |
564 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL1) | \ |
565 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA1) | \ |
566 |
PIN_ODR_HIGH(GPIOB_LED) | \ |
567 |
PIN_ODR_HIGH(GPIOB_BT_RTS) | \ |
568 |
PIN_ODR_HIGH(GPIOB_BT_CTS) | \ |
569 |
PIN_ODR_HIGH(GPIOB_SYS_UART_UP)) |
570 |
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_IR_INT1_N, STM32F4xx_AF_system) | \
|
571 |
PIN_AFIO_AF(GPIOB_VSYS_SENSE, STM32F4xx_AF_system) | \ |
572 |
PIN_AFIO_AF(GPIOB_POWER_EN, STM32F4xx_AF_system) | \ |
573 |
PIN_AFIO_AF(GPIOB_SYS_UART_DN, STM32F4xx_AF_system) | \ |
574 |
PIN_AFIO_AF(GPIOB_CHARGE_STAT2A, STM32F4xx_AF_system) | \ |
575 |
PIN_AFIO_AF(GPIOB_BUZZER, STM32F4xx_AF_TIM3to5) | \ |
576 |
PIN_AFIO_AF(GPIOB_GAUGE_BATLOW2, STM32F4xx_AF_system) | \ |
577 |
PIN_AFIO_AF(GPIOB_GAUGE_BATGD2_N, STM32F4xx_AF_system)) |
578 |
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, STM32F4xx_AF_I2C1to3) | \
|
579 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA2, STM32F4xx_AF_I2C1to3) | \ |
580 |
PIN_AFIO_AF(GPIOB_GAUGE_SCL1, STM32F4xx_AF_I2C1to3) | \ |
581 |
PIN_AFIO_AF(GPIOB_GAUGE_SDA1, STM32F4xx_AF_I2C1to3) | \ |
582 |
PIN_AFIO_AF(GPIOB_LED, STM32F4xx_AF_system) | \ |
583 |
PIN_AFIO_AF(GPIOB_BT_RTS, STM32F4xx_AF_USART1to3) | \ |
584 |
PIN_AFIO_AF(GPIOB_BT_CTS, STM32F4xx_AF_USART1to3) | \ |
585 |
PIN_AFIO_AF(GPIOB_SYS_UART_UP, STM32F4xx_AF_system)) |
586 |
|
587 |
/*
|
588 |
* GPIOC setup:
|
589 |
*
|
590 |
* PC0 - CHARGE_STAT1A (input floating)
|
591 |
* PC1 - GAUGE_BATLOW1 (input floating)
|
592 |
* PC2 - GAUGE_BATGD1_N (input floating)
|
593 |
* PC3 - CHARGE_EN1_N (output opendrain high)
|
594 |
* PC4 - IR_INT2_N (input floating)
|
595 |
* PC5 - TOUCH_INT_N (input floating)
|
596 |
* PC6 - SYS_DONE (input floating)
|
597 |
* PC7 - SYS_PROG_N (output opendrain high)
|
598 |
* PC8 - PATH_DC (input floating)
|
599 |
* PC9 - SYS_SPI_DIR (output opendrain high)
|
600 |
* PC10 - BT_RX (alternate 7 pushpull floating)
|
601 |
* PC11 - BT_TX (alternate 7 pushpull floating)
|
602 |
* PC12 - SYS_INT_N (output opendrain low)
|
603 |
* PC13 - SYS_PD_N (output opendrain high)
|
604 |
* PC14 - SYS_WARMRST_N (output opendrain high)
|
605 |
* PC15 - BT_RST (output opendrain high)
|
606 |
*/
|
607 |
#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) | \
|
608 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) | \ |
609 |
PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) | \ |
610 |
PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) | \ |
611 |
PIN_MODE_INPUT(GPIOC_IR_INT2_N) | \ |
612 |
PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) | \ |
613 |
PIN_MODE_INPUT(GPIOC_SYS_DONE) | \ |
614 |
PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) | \ |
615 |
PIN_MODE_INPUT(GPIOC_PATH_DC) | \ |
616 |
PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) | \ |
617 |
PIN_MODE_ALTERNATE(GPIOC_BT_RX) | \ |
618 |
PIN_MODE_ALTERNATE(GPIOC_BT_TX) | \ |
619 |
PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) | \ |
620 |
PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) | \ |
621 |
PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) | \ |
622 |
PIN_MODE_OUTPUT(GPIOC_BT_RST)) |
623 |
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_CHARGE_STAT1A) | \
|
624 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATLOW1) | \ |
625 |
PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATGD1_N) | \ |
626 |
PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) | \ |
627 |
PIN_OTYPE_PUSHPULL(GPIOC_IR_INT2_N) | \ |
628 |
PIN_OTYPE_PUSHPULL(GPIOC_TOUCH_INT_N) | \ |
629 |
PIN_OTYPE_PUSHPULL(GPIOC_SYS_DONE) | \ |
630 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) | \ |
631 |
PIN_OTYPE_PUSHPULL(GPIOC_PATH_DC) | \ |
632 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) | \ |
633 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) | \ |
634 |
PIN_OTYPE_PUSHPULL(GPIOC_BT_TX) | \ |
635 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) | \ |
636 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) | \ |
637 |
PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) | \ |
638 |
PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST)) |
639 |
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_STAT1A) | \
|
640 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATLOW1) | \ |
641 |
PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATGD1_N) | \ |
642 |
PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_EN1_N) | \ |
643 |
PIN_OSPEED_VERYHIGH(GPIOC_IR_INT2_N) | \ |
644 |
PIN_OSPEED_VERYHIGH(GPIOC_TOUCH_INT_N) | \ |
645 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_DONE) | \ |
646 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PROG_N) | \ |
647 |
PIN_OSPEED_VERYHIGH(GPIOC_PATH_DC) | \ |
648 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_SPI_DIR) | \ |
649 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RX) | \ |
650 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_TX) | \ |
651 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_INT_N) | \ |
652 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_PD_N) | \ |
653 |
PIN_OSPEED_VERYHIGH(GPIOC_SYS_WARMRST_N) | \ |
654 |
PIN_OSPEED_VERYHIGH(GPIOC_BT_RST)) |
655 |
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_CHARGE_STAT1A) | \
|
656 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATLOW1) | \ |
657 |
PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATGD1_N) | \ |
658 |
PIN_PUPDR_FLOATING(GPIOC_CHARGE_EN1_N) | \ |
659 |
PIN_PUPDR_FLOATING(GPIOC_IR_INT2_N) | \ |
660 |
PIN_PUPDR_FLOATING(GPIOC_TOUCH_INT_N) | \ |
661 |
PIN_PUPDR_FLOATING(GPIOC_SYS_DONE) | \ |
662 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PROG_N) | \ |
663 |
PIN_PUPDR_FLOATING(GPIOC_PATH_DC) | \ |
664 |
PIN_PUPDR_FLOATING(GPIOC_SYS_SPI_DIR) | \ |
665 |
PIN_PUPDR_FLOATING(GPIOC_BT_RX) | \ |
666 |
PIN_PUPDR_FLOATING(GPIOC_BT_TX) | \ |
667 |
PIN_PUPDR_FLOATING(GPIOC_SYS_INT_N) | \ |
668 |
PIN_PUPDR_FLOATING(GPIOC_SYS_PD_N) | \ |
669 |
PIN_PUPDR_FLOATING(GPIOC_SYS_WARMRST_N) | \ |
670 |
PIN_PUPDR_FLOATING(GPIOC_BT_RST)) |
671 |
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_CHARGE_STAT1A) | \
|
672 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATLOW1) | \ |
673 |
PIN_ODR_HIGH(GPIOC_GAUGE_BATGD1_N) | \ |
674 |
PIN_ODR_HIGH(GPIOC_CHARGE_EN1_N) | \ |
675 |
PIN_ODR_HIGH(GPIOC_IR_INT2_N) | \ |
676 |
PIN_ODR_HIGH(GPIOC_TOUCH_INT_N) | \ |
677 |
PIN_ODR_HIGH(GPIOC_SYS_DONE) | \ |
678 |
PIN_ODR_HIGH(GPIOC_SYS_PROG_N) | \ |
679 |
PIN_ODR_LOW(GPIOC_PATH_DC) | \ |
680 |
PIN_ODR_HIGH(GPIOC_SYS_SPI_DIR) | \ |
681 |
PIN_ODR_HIGH(GPIOC_BT_RX) | \ |
682 |
PIN_ODR_HIGH(GPIOC_BT_TX) | \ |
683 |
PIN_ODR_LOW(GPIOC_SYS_INT_N) | \ |
684 |
PIN_ODR_HIGH(GPIOC_SYS_PD_N) | \ |
685 |
PIN_ODR_HIGH(GPIOC_SYS_WARMRST_N) | \ |
686 |
PIN_ODR_HIGH(GPIOC_BT_RST)) |
687 |
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_CHARGE_STAT1A, STM32F4xx_AF_system) | \
|
688 |
PIN_AFIO_AF(GPIOC_GAUGE_BATLOW1, STM32F4xx_AF_system) | \ |
689 |
PIN_AFIO_AF(GPIOC_GAUGE_BATGD1_N, STM32F4xx_AF_system) | \ |
690 |
PIN_AFIO_AF(GPIOC_CHARGE_EN1_N, STM32F4xx_AF_system) | \ |
691 |
PIN_AFIO_AF(GPIOC_IR_INT2_N, STM32F4xx_AF_system) | \ |
692 |
PIN_AFIO_AF(GPIOC_TOUCH_INT_N, STM32F4xx_AF_system) | \ |
693 |
PIN_AFIO_AF(GPIOC_SYS_DONE, STM32F4xx_AF_system) | \ |
694 |
PIN_AFIO_AF(GPIOC_SYS_PROG_N, STM32F4xx_AF_system)) |
695 |
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PATH_DC, STM32F4xx_AF_system) | \
|
696 |
PIN_AFIO_AF(GPIOC_SYS_SPI_DIR, STM32F4xx_AF_system) | \ |
697 |
PIN_AFIO_AF(GPIOC_BT_RX, STM32F4xx_AF_USART1to3) | \ |
698 |
PIN_AFIO_AF(GPIOC_BT_TX, STM32F4xx_AF_USART1to3) | \ |
699 |
PIN_AFIO_AF(GPIOC_SYS_INT_N, STM32F4xx_AF_system) | \ |
700 |
PIN_AFIO_AF(GPIOC_SYS_PD_N, STM32F4xx_AF_system) | \ |
701 |
PIN_AFIO_AF(GPIOC_SYS_WARMRST_N, STM32F4xx_AF_system) | \ |
702 |
PIN_AFIO_AF(GPIOC_BT_RST, STM32F4xx_AF_system)) |
703 |
|
704 |
/*
|
705 |
* GPIOD setup:
|
706 |
*
|
707 |
* PD0 - PIN0 (input floating)
|
708 |
* PD1 - PIN1 (input floating)
|
709 |
* PD2 - CHARGE_EN2_N (output opendrain high)
|
710 |
* PD3 - PIN3 (input floating)
|
711 |
* PD4 - PIN4 (input floating)
|
712 |
* PD5 - PIN5 (input floating)
|
713 |
* PD6 - PIN6 (input floating)
|
714 |
* PD7 - PIN7 (input floating)
|
715 |
* PD8 - PIN8 (input floating)
|
716 |
* PD9 - PIN9 (input floating)
|
717 |
* PD10 - PIN10 (input floating)
|
718 |
* PD11 - PIN11 (input floating)
|
719 |
* PD12 - PIN12 (input floating)
|
720 |
* PD13 - PIN13 (input floating)
|
721 |
* PD14 - PIN14 (input floating)
|
722 |
* PD15 - PIN15 (input floating)
|
723 |
*/
|
724 |
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
|
725 |
PIN_MODE_INPUT(GPIOD_PIN1) | \ |
726 |
PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) | \ |
727 |
PIN_MODE_INPUT(GPIOD_PIN3) | \ |
728 |
PIN_MODE_INPUT(GPIOD_PIN4) | \ |
729 |
PIN_MODE_INPUT(GPIOD_PIN5) | \ |
730 |
PIN_MODE_INPUT(GPIOD_PIN6) | \ |
731 |
PIN_MODE_INPUT(GPIOD_PIN7) | \ |
732 |
PIN_MODE_INPUT(GPIOD_PIN8) | \ |
733 |
PIN_MODE_INPUT(GPIOD_PIN9) | \ |
734 |
PIN_MODE_INPUT(GPIOD_PIN10) | \ |
735 |
PIN_MODE_INPUT(GPIOD_PIN11) | \ |
736 |
PIN_MODE_INPUT(GPIOD_PIN12) | \ |
737 |
PIN_MODE_INPUT(GPIOD_PIN13) | \ |
738 |
PIN_MODE_INPUT(GPIOD_PIN14) | \ |
739 |
PIN_MODE_INPUT(GPIOD_PIN15)) |
740 |
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
|
741 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ |
742 |
PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N) | \ |
743 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ |
744 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ |
745 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ |
746 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ |
747 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ |
748 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ |
749 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ |
750 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ |
751 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ |
752 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ |
753 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ |
754 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ |
755 |
PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) |
756 |
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOD_PIN0) | \
|
757 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN1) | \ |
758 |
PIN_OSPEED_VERYHIGH(GPIOD_CHARGE_EN2_N) | \ |
759 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN3) | \ |
760 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN4) | \ |
761 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN5) | \ |
762 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN6) | \ |
763 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN7) | \ |
764 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN8) | \ |
765 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN9) | \ |
766 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN10) | \ |
767 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN11) | \ |
768 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN12) | \ |
769 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN13) | \ |
770 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN14) | \ |
771 |
PIN_OSPEED_VERYHIGH(GPIOD_PIN15)) |
772 |
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
773 |
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ |
774 |
PIN_PUPDR_FLOATING(GPIOD_CHARGE_EN2_N) | \ |
775 |
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ |
776 |
PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ |
777 |
PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ |
778 |
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ |
779 |
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ |
780 |
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ |
781 |
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ |
782 |
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ |
783 |
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ |
784 |
PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ |
785 |
PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ |
786 |
PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ |
787 |
PIN_PUPDR_PULLUP(GPIOD_PIN15)) |
788 |
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
|
789 |
PIN_ODR_HIGH(GPIOD_PIN1) | \ |
790 |
PIN_ODR_HIGH(GPIOD_CHARGE_EN2_N) | \ |
791 |
PIN_ODR_HIGH(GPIOD_PIN3) | \ |
792 |
PIN_ODR_HIGH(GPIOD_PIN4) | \ |
793 |
PIN_ODR_HIGH(GPIOD_PIN5) | \ |
794 |
PIN_ODR_HIGH(GPIOD_PIN6) | \ |
795 |
PIN_ODR_HIGH(GPIOD_PIN7) | \ |
796 |
PIN_ODR_HIGH(GPIOD_PIN8) | \ |
797 |
PIN_ODR_HIGH(GPIOD_PIN9) | \ |
798 |
PIN_ODR_HIGH(GPIOD_PIN10) | \ |
799 |
PIN_ODR_HIGH(GPIOD_PIN11) | \ |
800 |
PIN_ODR_HIGH(GPIOD_PIN12) | \ |
801 |
PIN_ODR_HIGH(GPIOD_PIN13) | \ |
802 |
PIN_ODR_HIGH(GPIOD_PIN14) | \ |
803 |
PIN_ODR_HIGH(GPIOD_PIN15)) |
804 |
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, STM32F4xx_AF_system) | \
|
805 |
PIN_AFIO_AF(GPIOD_PIN1, STM32F4xx_AF_system) | \ |
806 |
PIN_AFIO_AF(GPIOD_CHARGE_EN2_N, STM32F4xx_AF_system) | \ |
807 |
PIN_AFIO_AF(GPIOD_PIN3, STM32F4xx_AF_system) | \ |
808 |
PIN_AFIO_AF(GPIOD_PIN4, STM32F4xx_AF_system) | \ |
809 |
PIN_AFIO_AF(GPIOD_PIN5, STM32F4xx_AF_system) | \ |
810 |
PIN_AFIO_AF(GPIOD_PIN6, STM32F4xx_AF_system) | \ |
811 |
PIN_AFIO_AF(GPIOD_PIN7, STM32F4xx_AF_system)) |
812 |
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, STM32F4xx_AF_system) | \
|
813 |
PIN_AFIO_AF(GPIOD_PIN9, STM32F4xx_AF_system) | \ |
814 |
PIN_AFIO_AF(GPIOD_PIN10, STM32F4xx_AF_system) | \ |
815 |
PIN_AFIO_AF(GPIOD_PIN11, STM32F4xx_AF_system) | \ |
816 |
PIN_AFIO_AF(GPIOD_PIN12, STM32F4xx_AF_system) | \ |
817 |
PIN_AFIO_AF(GPIOD_PIN13, STM32F4xx_AF_system) | \ |
818 |
PIN_AFIO_AF(GPIOD_PIN14, STM32F4xx_AF_system) | \ |
819 |
PIN_AFIO_AF(GPIOD_PIN15, STM32F4xx_AF_system)) |
820 |
|
821 |
/*
|
822 |
* GPIOE setup:
|
823 |
*
|
824 |
* PE0 - PIN0 (input floating)
|
825 |
* PE1 - PIN1 (input floating)
|
826 |
* PE2 - PIN2 (input floating)
|
827 |
* PE3 - PIN3 (input floating)
|
828 |
* PE4 - PIN4 (input floating)
|
829 |
* PE5 - PIN5 (input floating)
|
830 |
* PE6 - PIN6 (input floating)
|
831 |
* PE7 - PIN7 (input floating)
|
832 |
* PE8 - PIN8 (input floating)
|
833 |
* PE9 - PIN9 (input floating)
|
834 |
* PE10 - PIN10 (input floating)
|
835 |
* PE11 - PIN11 (input floating)
|
836 |
* PE12 - PIN12 (input floating)
|
837 |
* PE13 - PIN13 (input floating)
|
838 |
* PE14 - PIN14 (input floating)
|
839 |
* PE15 - PIN15 (input floating)
|
840 |
*/
|
841 |
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
842 |
PIN_MODE_INPUT(GPIOE_PIN1) | \ |
843 |
PIN_MODE_INPUT(GPIOE_PIN2) | \ |
844 |
PIN_MODE_INPUT(GPIOE_PIN3) | \ |
845 |
PIN_MODE_INPUT(GPIOE_PIN4) | \ |
846 |
PIN_MODE_INPUT(GPIOE_PIN5) | \ |
847 |
PIN_MODE_INPUT(GPIOE_PIN6) | \ |
848 |
PIN_MODE_INPUT(GPIOE_PIN7) | \ |
849 |
PIN_MODE_INPUT(GPIOE_PIN8) | \ |
850 |
PIN_MODE_INPUT(GPIOE_PIN9) | \ |
851 |
PIN_MODE_INPUT(GPIOE_PIN10) | \ |
852 |
PIN_MODE_INPUT(GPIOE_PIN11) | \ |
853 |
PIN_MODE_INPUT(GPIOE_PIN12) | \ |
854 |
PIN_MODE_INPUT(GPIOE_PIN13) | \ |
855 |
PIN_MODE_INPUT(GPIOE_PIN14) | \ |
856 |
PIN_MODE_INPUT(GPIOE_PIN15)) |
857 |
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
|
858 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ |
859 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ |
860 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ |
861 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ |
862 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ |
863 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ |
864 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ |
865 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ |
866 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ |
867 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ |
868 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ |
869 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ |
870 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ |
871 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ |
872 |
PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) |
873 |
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_LOW(GPIOE_PIN0) | \
|
874 |
PIN_OSPEED_LOW(GPIOE_PIN1) | \ |
875 |
PIN_OSPEED_LOW(GPIOE_PIN2) | \ |
876 |
PIN_OSPEED_LOW(GPIOE_PIN3) | \ |
877 |
PIN_OSPEED_LOW(GPIOE_PIN4) | \ |
878 |
PIN_OSPEED_LOW(GPIOE_PIN5) | \ |
879 |
PIN_OSPEED_LOW(GPIOE_PIN6) | \ |
880 |
PIN_OSPEED_LOW(GPIOE_PIN7) | \ |
881 |
PIN_OSPEED_LOW(GPIOE_PIN8) | \ |
882 |
PIN_OSPEED_LOW(GPIOE_PIN9) | \ |
883 |
PIN_OSPEED_LOW(GPIOE_PIN10) | \ |
884 |
PIN_OSPEED_LOW(GPIOE_PIN11) | \ |
885 |
PIN_OSPEED_LOW(GPIOE_PIN12) | \ |
886 |
PIN_OSPEED_LOW(GPIOE_PIN13) | \ |
887 |
PIN_OSPEED_LOW(GPIOE_PIN14) | \ |
888 |
PIN_OSPEED_LOW(GPIOE_PIN15)) |
889 |
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \
|
890 |
PIN_PUPDR_FLOATING(GPIOE_PIN1) | \ |
891 |
PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ |
892 |
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ |
893 |
PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ |
894 |
PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ |
895 |
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ |
896 |
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ |
897 |
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ |
898 |
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ |
899 |
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ |
900 |
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ |
901 |
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ |
902 |
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ |
903 |
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ |
904 |
PIN_PUPDR_FLOATING(GPIOE_PIN15)) |
905 |
#define VAL_GPIOE_ODR (PIN_ODR_LOW(GPIOE_PIN0) | \
|
906 |
PIN_ODR_LOW(GPIOE_PIN1) | \ |
907 |
PIN_ODR_LOW(GPIOE_PIN2) | \ |
908 |
PIN_ODR_LOW(GPIOE_PIN3) | \ |
909 |
PIN_ODR_LOW(GPIOE_PIN4) | \ |
910 |
PIN_ODR_LOW(GPIOE_PIN5) | \ |
911 |
PIN_ODR_LOW(GPIOE_PIN6) | \ |
912 |
PIN_ODR_LOW(GPIOE_PIN7) | \ |
913 |
PIN_ODR_LOW(GPIOE_PIN8) | \ |
914 |
PIN_ODR_LOW(GPIOE_PIN9) | \ |
915 |
PIN_ODR_LOW(GPIOE_PIN10) | \ |
916 |
PIN_ODR_LOW(GPIOE_PIN11) | \ |
917 |
PIN_ODR_LOW(GPIOE_PIN12) | \ |
918 |
PIN_ODR_LOW(GPIOE_PIN13) | \ |
919 |
PIN_ODR_LOW(GPIOE_PIN14) | \ |
920 |
PIN_ODR_LOW(GPIOE_PIN15)) |
921 |
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, STM32F4xx_AF_system) | \
|
922 |
PIN_AFIO_AF(GPIOE_PIN1, STM32F4xx_AF_system) | \ |
923 |
PIN_AFIO_AF(GPIOE_PIN2, STM32F4xx_AF_system) | \ |
924 |
PIN_AFIO_AF(GPIOE_PIN3, STM32F4xx_AF_system) | \ |
925 |
PIN_AFIO_AF(GPIOE_PIN4, STM32F4xx_AF_system) | \ |
926 |
PIN_AFIO_AF(GPIOE_PIN5, STM32F4xx_AF_system) | \ |
927 |
PIN_AFIO_AF(GPIOE_PIN6, STM32F4xx_AF_system) | \ |
928 |
PIN_AFIO_AF(GPIOE_PIN7, STM32F4xx_AF_system)) |
929 |
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, STM32F4xx_AF_system) | \
|
930 |
PIN_AFIO_AF(GPIOE_PIN9, STM32F4xx_AF_system) | \ |
931 |
PIN_AFIO_AF(GPIOE_PIN10, STM32F4xx_AF_system) | \ |
932 |
PIN_AFIO_AF(GPIOE_PIN11, STM32F4xx_AF_system) | \ |
933 |
PIN_AFIO_AF(GPIOE_PIN12, STM32F4xx_AF_system) | \ |
934 |
PIN_AFIO_AF(GPIOE_PIN13, STM32F4xx_AF_system) | \ |
935 |
PIN_AFIO_AF(GPIOE_PIN14, STM32F4xx_AF_system) | \ |
936 |
PIN_AFIO_AF(GPIOE_PIN15, STM32F4xx_AF_system)) |
937 |
|
938 |
/*
|
939 |
* GPIOF setup:
|
940 |
*
|
941 |
* PF0 - PIN0 (input floating)
|
942 |
* PF1 - PIN1 (input floating)
|
943 |
* PF2 - PIN2 (input floating)
|
944 |
* PF3 - PIN3 (input floating)
|
945 |
* PF4 - PIN4 (input floating)
|
946 |
* PF5 - PIN5 (input floating)
|
947 |
* PF6 - PIN6 (input floating)
|
948 |
* PF7 - PIN7 (input floating)
|
949 |
* PF8 - PIN8 (input floating)
|
950 |
* PF9 - PIN9 (input floating)
|
951 |
* PF10 - PIN10 (input floating)
|
952 |
* PF11 - PIN11 (input floating)
|
953 |
* PF12 - PIN12 (input floating)
|
954 |
* PF13 - PIN13 (input floating)
|
955 |
* PF14 - PIN14 (input floating)
|
956 |
* PF15 - PIN15 (input floating)
|
957 |
*/
|
958 |
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \
|
959 |
PIN_MODE_INPUT(GPIOF_PIN1) | \ |
960 |
PIN_MODE_INPUT(GPIOF_PIN2) | \ |
961 |
PIN_MODE_INPUT(GPIOF_PIN3) | \ |
962 |
PIN_MODE_INPUT(GPIOF_PIN4) | \ |
963 |
PIN_MODE_INPUT(GPIOF_PIN5) | \ |
964 |
PIN_MODE_INPUT(GPIOF_PIN6) | \ |
965 |
PIN_MODE_INPUT(GPIOF_PIN7) | \ |
966 |
PIN_MODE_INPUT(GPIOF_PIN8) | \ |
967 |
PIN_MODE_INPUT(GPIOF_PIN9) | \ |
968 |
PIN_MODE_INPUT(GPIOF_PIN10) | \ |
969 |
PIN_MODE_INPUT(GPIOF_PIN11) | \ |
970 |
PIN_MODE_INPUT(GPIOF_PIN12) | \ |
971 |
PIN_MODE_INPUT(GPIOF_PIN13) | \ |
972 |
PIN_MODE_INPUT(GPIOF_PIN14) | \ |
973 |
PIN_MODE_INPUT(GPIOF_PIN15)) |
974 |
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
|
975 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ |
976 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ |
977 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ |
978 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ |
979 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ |
980 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ |
981 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ |
982 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ |
983 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ |
984 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ |
985 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ |
986 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ |
987 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ |
988 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ |
989 |
PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) |
990 |
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_LOW(GPIOF_PIN0) | \
|
991 |
PIN_OSPEED_LOW(GPIOF_PIN1) | \ |
992 |
PIN_OSPEED_LOW(GPIOF_PIN2) | \ |
993 |
PIN_OSPEED_LOW(GPIOF_PIN3) | \ |
994 |
PIN_OSPEED_LOW(GPIOF_PIN4) | \ |
995 |
PIN_OSPEED_LOW(GPIOF_PIN5) | \ |
996 |
PIN_OSPEED_LOW(GPIOF_PIN6) | \ |
997 |
PIN_OSPEED_LOW(GPIOF_PIN7) | \ |
998 |
PIN_OSPEED_LOW(GPIOF_PIN8) | \ |
999 |
PIN_OSPEED_LOW(GPIOF_PIN9) | \ |
1000 |
PIN_OSPEED_LOW(GPIOF_PIN10) | \ |
1001 |
PIN_OSPEED_LOW(GPIOF_PIN11) | \ |
1002 |
PIN_OSPEED_LOW(GPIOF_PIN12) | \ |
1003 |
PIN_OSPEED_LOW(GPIOF_PIN13) | \ |
1004 |
PIN_OSPEED_LOW(GPIOF_PIN14) | \ |
1005 |
PIN_OSPEED_LOW(GPIOF_PIN15)) |
1006 |
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \
|
1007 |
PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ |
1008 |
PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ |
1009 |
PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ |
1010 |
PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ |
1011 |
PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ |
1012 |
PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ |
1013 |
PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ |
1014 |
PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ |
1015 |
PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ |
1016 |
PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ |
1017 |
PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ |
1018 |
PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ |
1019 |
PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ |
1020 |
PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ |
1021 |
PIN_PUPDR_FLOATING(GPIOF_PIN15)) |
1022 |
#define VAL_GPIOF_ODR (PIN_ODR_LOW(GPIOF_PIN0) | \
|
1023 |
PIN_ODR_LOW(GPIOF_PIN1) | \ |
1024 |
PIN_ODR_LOW(GPIOF_PIN2) | \ |
1025 |
PIN_ODR_LOW(GPIOF_PIN3) | \ |
1026 |
PIN_ODR_LOW(GPIOF_PIN4) | \ |
1027 |
PIN_ODR_LOW(GPIOF_PIN5) | \ |
1028 |
PIN_ODR_LOW(GPIOF_PIN6) | \ |
1029 |
PIN_ODR_LOW(GPIOF_PIN7) | \ |
1030 |
PIN_ODR_LOW(GPIOF_PIN8) | \ |
1031 |
PIN_ODR_LOW(GPIOF_PIN9) | \ |
1032 |
PIN_ODR_LOW(GPIOF_PIN10) | \ |
1033 |
PIN_ODR_LOW(GPIOF_PIN11) | \ |
1034 |
PIN_ODR_LOW(GPIOF_PIN12) | \ |
1035 |
PIN_ODR_LOW(GPIOF_PIN13) | \ |
1036 |
PIN_ODR_LOW(GPIOF_PIN14) | \ |
1037 |
PIN_ODR_LOW(GPIOF_PIN15)) |
1038 |
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, STM32F4xx_AF_system) | \
|
1039 |
PIN_AFIO_AF(GPIOF_PIN1, STM32F4xx_AF_system) | \ |
1040 |
PIN_AFIO_AF(GPIOF_PIN2, STM32F4xx_AF_system) | \ |
1041 |
PIN_AFIO_AF(GPIOF_PIN3, STM32F4xx_AF_system) | \ |
1042 |
PIN_AFIO_AF(GPIOF_PIN4, STM32F4xx_AF_system) | \ |
1043 |
PIN_AFIO_AF(GPIOF_PIN5, STM32F4xx_AF_system) | \ |
1044 |
PIN_AFIO_AF(GPIOF_PIN6, STM32F4xx_AF_system) | \ |
1045 |
PIN_AFIO_AF(GPIOF_PIN7, STM32F4xx_AF_system)) |
1046 |
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, STM32F4xx_AF_system) | \
|
1047 |
PIN_AFIO_AF(GPIOF_PIN9, STM32F4xx_AF_system) | \ |
1048 |
PIN_AFIO_AF(GPIOF_PIN10, STM32F4xx_AF_system) | \ |
1049 |
PIN_AFIO_AF(GPIOF_PIN11, STM32F4xx_AF_system) | \ |
1050 |
PIN_AFIO_AF(GPIOF_PIN12, STM32F4xx_AF_system) | \ |
1051 |
PIN_AFIO_AF(GPIOF_PIN13, STM32F4xx_AF_system) | \ |
1052 |
PIN_AFIO_AF(GPIOF_PIN14, STM32F4xx_AF_system) | \ |
1053 |
PIN_AFIO_AF(GPIOF_PIN15, STM32F4xx_AF_system)) |
1054 |
|
1055 |
/*
|
1056 |
* GPIOG setup:
|
1057 |
*
|
1058 |
* PG0 - PIN0 (input floating)
|
1059 |
* PG1 - PIN1 (input floating)
|
1060 |
* PG2 - PIN2 (input floating)
|
1061 |
* PG3 - PIN3 (input floating)
|
1062 |
* PG4 - PIN4 (input floating)
|
1063 |
* PG5 - PIN5 (input floating)
|
1064 |
* PG6 - PIN6 (input floating)
|
1065 |
* PG7 - PIN7 (input floating)
|
1066 |
* PG8 - PIN8 (input floating)
|
1067 |
* PG9 - PIN9 (input floating)
|
1068 |
* PG10 - PIN10 (input floating)
|
1069 |
* PG11 - PIN11 (input floating)
|
1070 |
* PG12 - PIN12 (input floating)
|
1071 |
* PG13 - PIN13 (input floating)
|
1072 |
* PG14 - PIN14 (input floating)
|
1073 |
* PG15 - PIN15 (input floating)
|
1074 |
*/
|
1075 |
#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
|
1076 |
PIN_MODE_INPUT(GPIOG_PIN1) | \ |
1077 |
PIN_MODE_INPUT(GPIOG_PIN2) | \ |
1078 |
PIN_MODE_INPUT(GPIOG_PIN3) | \ |
1079 |
PIN_MODE_INPUT(GPIOG_PIN4) | \ |
1080 |
PIN_MODE_INPUT(GPIOG_PIN5) | \ |
1081 |
PIN_MODE_INPUT(GPIOG_PIN6) | \ |
1082 |
PIN_MODE_INPUT(GPIOG_PIN7) | \ |
1083 |
PIN_MODE_INPUT(GPIOG_PIN8) | \ |
1084 |
PIN_MODE_INPUT(GPIOG_PIN9) | \ |
1085 |
PIN_MODE_INPUT(GPIOG_PIN10) | \ |
1086 |
PIN_MODE_INPUT(GPIOG_PIN11) | \ |
1087 |
PIN_MODE_INPUT(GPIOG_PIN12) | \ |
1088 |
PIN_MODE_INPUT(GPIOG_PIN13) | \ |
1089 |
PIN_MODE_INPUT(GPIOG_PIN14) | \ |
1090 |
PIN_MODE_INPUT(GPIOG_PIN15)) |
1091 |
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
|
1092 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ |
1093 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ |
1094 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ |
1095 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ |
1096 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ |
1097 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ |
1098 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ |
1099 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ |
1100 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ |
1101 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ |
1102 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ |
1103 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ |
1104 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ |
1105 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ |
1106 |
PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) |
1107 |
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_LOW(GPIOG_PIN0) | \
|
1108 |
PIN_OSPEED_LOW(GPIOG_PIN1) | \ |
1109 |
PIN_OSPEED_LOW(GPIOG_PIN2) | \ |
1110 |
PIN_OSPEED_LOW(GPIOG_PIN3) | \ |
1111 |
PIN_OSPEED_LOW(GPIOG_PIN4) | \ |
1112 |
PIN_OSPEED_LOW(GPIOG_PIN5) | \ |
1113 |
PIN_OSPEED_LOW(GPIOG_PIN6) | \ |
1114 |
PIN_OSPEED_LOW(GPIOG_PIN7) | \ |
1115 |
PIN_OSPEED_LOW(GPIOG_PIN8) | \ |
1116 |
PIN_OSPEED_LOW(GPIOG_PIN9) | \ |
1117 |
PIN_OSPEED_LOW(GPIOG_PIN10) | \ |
1118 |
PIN_OSPEED_LOW(GPIOG_PIN11) | \ |
1119 |
PIN_OSPEED_LOW(GPIOG_PIN12) | \ |
1120 |
PIN_OSPEED_LOW(GPIOG_PIN13) | \ |
1121 |
PIN_OSPEED_LOW(GPIOG_PIN14) | \ |
1122 |
PIN_OSPEED_LOW(GPIOG_PIN15)) |
1123 |
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
|
1124 |
PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ |
1125 |
PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ |
1126 |
PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ |
1127 |
PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ |
1128 |
PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ |
1129 |
PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ |
1130 |
PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ |
1131 |
PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ |
1132 |
PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ |
1133 |
PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ |
1134 |
PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ |
1135 |
PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ |
1136 |
PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ |
1137 |
PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ |
1138 |
PIN_PUPDR_FLOATING(GPIOG_PIN15)) |
1139 |
#define VAL_GPIOG_ODR (PIN_ODR_LOW(GPIOG_PIN0) | \
|
1140 |
PIN_ODR_LOW(GPIOG_PIN1) | \ |
1141 |
PIN_ODR_LOW(GPIOG_PIN2) | \ |
1142 |
PIN_ODR_LOW(GPIOG_PIN3) | \ |
1143 |
PIN_ODR_LOW(GPIOG_PIN4) | \ |
1144 |
PIN_ODR_LOW(GPIOG_PIN5) | \ |
1145 |
PIN_ODR_LOW(GPIOG_PIN6) | \ |
1146 |
PIN_ODR_LOW(GPIOG_PIN7) | \ |
1147 |
PIN_ODR_LOW(GPIOG_PIN8) | \ |
1148 |
PIN_ODR_LOW(GPIOG_PIN9) | \ |
1149 |
PIN_ODR_LOW(GPIOG_PIN10) | \ |
1150 |
PIN_ODR_LOW(GPIOG_PIN11) | \ |
1151 |
PIN_ODR_LOW(GPIOG_PIN12) | \ |
1152 |
PIN_ODR_LOW(GPIOG_PIN13) | \ |
1153 |
PIN_ODR_LOW(GPIOG_PIN14) | \ |
1154 |
PIN_ODR_LOW(GPIOG_PIN15)) |
1155 |
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, STM32F4xx_AF_system) | \
|
1156 |
PIN_AFIO_AF(GPIOG_PIN1, STM32F4xx_AF_system) | \ |
1157 |
PIN_AFIO_AF(GPIOG_PIN2, STM32F4xx_AF_system) | \ |
1158 |
PIN_AFIO_AF(GPIOG_PIN3, STM32F4xx_AF_system) | \ |
1159 |
PIN_AFIO_AF(GPIOG_PIN4, STM32F4xx_AF_system) | \ |
1160 |
PIN_AFIO_AF(GPIOG_PIN5, STM32F4xx_AF_system) | \ |
1161 |
PIN_AFIO_AF(GPIOG_PIN6, STM32F4xx_AF_system) | \ |
1162 |
PIN_AFIO_AF(GPIOG_PIN7, STM32F4xx_AF_system)) |
1163 |
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, STM32F4xx_AF_system) | \
|
1164 |
PIN_AFIO_AF(GPIOG_PIN9, STM32F4xx_AF_system) | \ |
1165 |
PIN_AFIO_AF(GPIOG_PIN10, STM32F4xx_AF_system) | \ |
1166 |
PIN_AFIO_AF(GPIOG_PIN11, STM32F4xx_AF_system) | \ |
1167 |
PIN_AFIO_AF(GPIOG_PIN12, STM32F4xx_AF_system) | \ |
1168 |
PIN_AFIO_AF(GPIOG_PIN13, STM32F4xx_AF_system) | \ |
1169 |
PIN_AFIO_AF(GPIOG_PIN14, STM32F4xx_AF_system) | \ |
1170 |
PIN_AFIO_AF(GPIOG_PIN15, STM32F4xx_AF_system)) |
1171 |
|
1172 |
/*
|
1173 |
* GPIOH setup:
|
1174 |
*
|
1175 |
* PH0 - OSC_IN (input floating)
|
1176 |
* PH1 - OSC_OUT (input floating)
|
1177 |
* PH2 - PIN2 (input floating)
|
1178 |
* PH3 - PIN3 (input floating)
|
1179 |
* PH4 - PIN4 (input floating)
|
1180 |
* PH5 - PIN5 (input floating)
|
1181 |
* PH6 - PIN6 (input floating)
|
1182 |
* PH7 - PIN7 (input floating)
|
1183 |
* PH8 - PIN8 (input floating)
|
1184 |
* PH9 - PIN9 (input floating)
|
1185 |
* PH10 - PIN10 (input floating)
|
1186 |
* PH11 - PIN11 (input floating)
|
1187 |
* PH12 - PIN12 (input floating)
|
1188 |
* PH13 - PIN13 (input floating)
|
1189 |
* PH14 - PIN14 (input floating)
|
1190 |
* PH15 - PIN15 (input floating)
|
1191 |
*/
|
1192 |
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
|
1193 |
PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ |
1194 |
PIN_MODE_INPUT(GPIOH_PIN2) | \ |
1195 |
PIN_MODE_INPUT(GPIOH_PIN3) | \ |
1196 |
PIN_MODE_INPUT(GPIOH_PIN4) | \ |
1197 |
PIN_MODE_INPUT(GPIOH_PIN5) | \ |
1198 |
PIN_MODE_INPUT(GPIOH_PIN6) | \ |
1199 |
PIN_MODE_INPUT(GPIOH_PIN7) | \ |
1200 |
PIN_MODE_INPUT(GPIOH_PIN8) | \ |
1201 |
PIN_MODE_INPUT(GPIOH_PIN9) | \ |
1202 |
PIN_MODE_INPUT(GPIOH_PIN10) | \ |
1203 |
PIN_MODE_INPUT(GPIOH_PIN11) | \ |
1204 |
PIN_MODE_INPUT(GPIOH_PIN12) | \ |
1205 |
PIN_MODE_INPUT(GPIOH_PIN13) | \ |
1206 |
PIN_MODE_INPUT(GPIOH_PIN14) | \ |
1207 |
PIN_MODE_INPUT(GPIOH_PIN15)) |
1208 |
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
|
1209 |
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ |
1210 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ |
1211 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ |
1212 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ |
1213 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ |
1214 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ |
1215 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ |
1216 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ |
1217 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ |
1218 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ |
1219 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ |
1220 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ |
1221 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ |
1222 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ |
1223 |
PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) |
1224 |
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOH_OSC_IN) | \
|
1225 |
PIN_OSPEED_VERYHIGH(GPIOH_OSC_OUT) | \ |
1226 |
PIN_OSPEED_LOW(GPIOH_PIN2) | \ |
1227 |
PIN_OSPEED_LOW(GPIOH_PIN3) | \ |
1228 |
PIN_OSPEED_LOW(GPIOH_PIN4) | \ |
1229 |
PIN_OSPEED_LOW(GPIOH_PIN5) | \ |
1230 |
PIN_OSPEED_LOW(GPIOH_PIN6) | \ |
1231 |
PIN_OSPEED_LOW(GPIOH_PIN7) | \ |
1232 |
PIN_OSPEED_LOW(GPIOH_PIN8) | \ |
1233 |
PIN_OSPEED_LOW(GPIOH_PIN9) | \ |
1234 |
PIN_OSPEED_LOW(GPIOH_PIN10) | \ |
1235 |
PIN_OSPEED_LOW(GPIOH_PIN11) | \ |
1236 |
PIN_OSPEED_LOW(GPIOH_PIN12) | \ |
1237 |
PIN_OSPEED_LOW(GPIOH_PIN13) | \ |
1238 |
PIN_OSPEED_LOW(GPIOH_PIN14) | \ |
1239 |
PIN_OSPEED_LOW(GPIOH_PIN15)) |
1240 |
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
1241 |
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ |
1242 |
PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ |
1243 |
PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ |
1244 |
PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ |
1245 |
PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ |
1246 |
PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ |
1247 |
PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ |
1248 |
PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ |
1249 |
PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ |
1250 |
PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ |
1251 |
PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ |
1252 |
PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ |
1253 |
PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ |
1254 |
PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ |
1255 |
PIN_PUPDR_FLOATING(GPIOH_PIN15)) |
1256 |
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
|
1257 |
PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ |
1258 |
PIN_ODR_HIGH(GPIOH_PIN2) | \ |
1259 |
PIN_ODR_HIGH(GPIOH_PIN3) | \ |
1260 |
PIN_ODR_HIGH(GPIOH_PIN4) | \ |
1261 |
PIN_ODR_HIGH(GPIOH_PIN5) | \ |
1262 |
PIN_ODR_HIGH(GPIOH_PIN6) | \ |
1263 |
PIN_ODR_HIGH(GPIOH_PIN7) | \ |
1264 |
PIN_ODR_HIGH(GPIOH_PIN8) | \ |
1265 |
PIN_ODR_HIGH(GPIOH_PIN9) | \ |
1266 |
PIN_ODR_HIGH(GPIOH_PIN10) | \ |
1267 |
PIN_ODR_HIGH(GPIOH_PIN11) | \ |
1268 |
PIN_ODR_HIGH(GPIOH_PIN12) | \ |
1269 |
PIN_ODR_HIGH(GPIOH_PIN13) | \ |
1270 |
PIN_ODR_HIGH(GPIOH_PIN14) | \ |
1271 |
PIN_ODR_HIGH(GPIOH_PIN15)) |
1272 |
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, STM32F4xx_AF_system) | \
|
1273 |
PIN_AFIO_AF(GPIOH_OSC_OUT, STM32F4xx_AF_system) | \ |
1274 |
PIN_AFIO_AF(GPIOH_PIN2, STM32F4xx_AF_system) | \ |
1275 |
PIN_AFIO_AF(GPIOH_PIN3, STM32F4xx_AF_system) | \ |
1276 |
PIN_AFIO_AF(GPIOH_PIN4, STM32F4xx_AF_system) | \ |
1277 |
PIN_AFIO_AF(GPIOH_PIN5, STM32F4xx_AF_system) | \ |
1278 |
PIN_AFIO_AF(GPIOH_PIN6, STM32F4xx_AF_system) | \ |
1279 |
PIN_AFIO_AF(GPIOH_PIN7, STM32F4xx_AF_system)) |
1280 |
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, STM32F4xx_AF_system) | \
|
1281 |
PIN_AFIO_AF(GPIOH_PIN9, STM32F4xx_AF_system) | \ |
1282 |
PIN_AFIO_AF(GPIOH_PIN10, STM32F4xx_AF_system) | \ |
1283 |
PIN_AFIO_AF(GPIOH_PIN11, STM32F4xx_AF_system) | \ |
1284 |
PIN_AFIO_AF(GPIOH_PIN12, STM32F4xx_AF_system) | \ |
1285 |
PIN_AFIO_AF(GPIOH_PIN13, STM32F4xx_AF_system) | \ |
1286 |
PIN_AFIO_AF(GPIOH_PIN14, STM32F4xx_AF_system) | \ |
1287 |
PIN_AFIO_AF(GPIOH_PIN15, STM32F4xx_AF_system)) |
1288 |
|
1289 |
/*
|
1290 |
* GPIOI setup:
|
1291 |
*
|
1292 |
* PI0 - PIN0 (input floating)
|
1293 |
* PI1 - PIN1 (input floating)
|
1294 |
* PI2 - PIN2 (input floating)
|
1295 |
* PI3 - PIN3 (input floating)
|
1296 |
* PI4 - PIN4 (input floating)
|
1297 |
* PI5 - PIN5 (input floating)
|
1298 |
* PI6 - PIN6 (input floating)
|
1299 |
* PI7 - PIN7 (input floating)
|
1300 |
* PI8 - PIN8 (input floating)
|
1301 |
* PI9 - PIN9 (input floating)
|
1302 |
* PI10 - PIN10 (input floating)
|
1303 |
* PI11 - PIN11 (input floating)
|
1304 |
* PI12 - PIN12 (input floating)
|
1305 |
* PI13 - PIN13 (input floating)
|
1306 |
* PI14 - PIN14 (input floating)
|
1307 |
* PI15 - PIN15 (input floating)
|
1308 |
*/
|
1309 |
#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
|
1310 |
PIN_MODE_INPUT(GPIOI_PIN1) | \ |
1311 |
PIN_MODE_INPUT(GPIOI_PIN2) | \ |
1312 |
PIN_MODE_INPUT(GPIOI_PIN3) | \ |
1313 |
PIN_MODE_INPUT(GPIOI_PIN4) | \ |
1314 |
PIN_MODE_INPUT(GPIOI_PIN5) | \ |
1315 |
PIN_MODE_INPUT(GPIOI_PIN6) | \ |
1316 |
PIN_MODE_INPUT(GPIOI_PIN7) | \ |
1317 |
PIN_MODE_INPUT(GPIOI_PIN8) | \ |
1318 |
PIN_MODE_INPUT(GPIOI_PIN9) | \ |
1319 |
PIN_MODE_INPUT(GPIOI_PIN10) | \ |
1320 |
PIN_MODE_INPUT(GPIOI_PIN11) | \ |
1321 |
PIN_MODE_INPUT(GPIOI_PIN12) | \ |
1322 |
PIN_MODE_INPUT(GPIOI_PIN13) | \ |
1323 |
PIN_MODE_INPUT(GPIOI_PIN14) | \ |
1324 |
PIN_MODE_INPUT(GPIOI_PIN15)) |
1325 |
#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
|
1326 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ |
1327 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ |
1328 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ |
1329 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ |
1330 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ |
1331 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ |
1332 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ |
1333 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ |
1334 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ |
1335 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ |
1336 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ |
1337 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ |
1338 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ |
1339 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ |
1340 |
PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) |
1341 |
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_LOW(GPIOI_PIN0) | \
|
1342 |
PIN_OSPEED_LOW(GPIOI_PIN1) | \ |
1343 |
PIN_OSPEED_LOW(GPIOI_PIN2) | \ |
1344 |
PIN_OSPEED_LOW(GPIOI_PIN3) | \ |
1345 |
PIN_OSPEED_LOW(GPIOI_PIN4) | \ |
1346 |
PIN_OSPEED_LOW(GPIOI_PIN5) | \ |
1347 |
PIN_OSPEED_LOW(GPIOI_PIN6) | \ |
1348 |
PIN_OSPEED_LOW(GPIOI_PIN7) | \ |
1349 |
PIN_OSPEED_LOW(GPIOI_PIN8) | \ |
1350 |
PIN_OSPEED_LOW(GPIOI_PIN9) | \ |
1351 |
PIN_OSPEED_LOW(GPIOI_PIN10) | \ |
1352 |
PIN_OSPEED_LOW(GPIOI_PIN11) | \ |
1353 |
PIN_OSPEED_LOW(GPIOI_PIN12) | \ |
1354 |
PIN_OSPEED_LOW(GPIOI_PIN13) | \ |
1355 |
PIN_OSPEED_LOW(GPIOI_PIN14) | \ |
1356 |
PIN_OSPEED_LOW(GPIOI_PIN15)) |
1357 |
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \
|
1358 |
PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ |
1359 |
PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ |
1360 |
PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ |
1361 |
PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ |
1362 |
PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ |
1363 |
PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ |
1364 |
PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ |
1365 |
PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ |
1366 |
PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ |
1367 |
PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ |
1368 |
PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ |
1369 |
PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ |
1370 |
PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ |
1371 |
PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ |
1372 |
PIN_PUPDR_FLOATING(GPIOI_PIN15)) |
1373 |
#define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \
|
1374 |
PIN_ODR_LOW(GPIOI_PIN1) | \ |
1375 |
PIN_ODR_LOW(GPIOI_PIN2) | \ |
1376 |
PIN_ODR_LOW(GPIOI_PIN3) | \ |
1377 |
PIN_ODR_LOW(GPIOI_PIN4) | \ |
1378 |
PIN_ODR_LOW(GPIOI_PIN5) | \ |
1379 |
PIN_ODR_LOW(GPIOI_PIN6) | \ |
1380 |
PIN_ODR_LOW(GPIOI_PIN7) | \ |
1381 |
PIN_ODR_LOW(GPIOI_PIN8) | \ |
1382 |
PIN_ODR_LOW(GPIOI_PIN9) | \ |
1383 |
PIN_ODR_LOW(GPIOI_PIN10) | \ |
1384 |
PIN_ODR_LOW(GPIOI_PIN11) | \ |
1385 |
PIN_ODR_LOW(GPIOI_PIN12) | \ |
1386 |
PIN_ODR_LOW(GPIOI_PIN13) | \ |
1387 |
PIN_ODR_LOW(GPIOI_PIN14) | \ |
1388 |
PIN_ODR_LOW(GPIOI_PIN15)) |
1389 |
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, STM32F4xx_AF_system) | \
|
1390 |
PIN_AFIO_AF(GPIOI_PIN1, STM32F4xx_AF_system) | \ |
1391 |
PIN_AFIO_AF(GPIOI_PIN2, STM32F4xx_AF_system) | \ |
1392 |
PIN_AFIO_AF(GPIOI_PIN3, STM32F4xx_AF_system) | \ |
1393 |
PIN_AFIO_AF(GPIOI_PIN4, STM32F4xx_AF_system) | \ |
1394 |
PIN_AFIO_AF(GPIOI_PIN5, STM32F4xx_AF_system) | \ |
1395 |
PIN_AFIO_AF(GPIOI_PIN6, STM32F4xx_AF_system) | \ |
1396 |
PIN_AFIO_AF(GPIOI_PIN7, STM32F4xx_AF_system)) |
1397 |
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, STM32F4xx_AF_system) | \
|
1398 |
PIN_AFIO_AF(GPIOI_PIN9, STM32F4xx_AF_system) | \ |
1399 |
PIN_AFIO_AF(GPIOI_PIN10, STM32F4xx_AF_system) | \ |
1400 |
PIN_AFIO_AF(GPIOI_PIN11, STM32F4xx_AF_system) | \ |
1401 |
PIN_AFIO_AF(GPIOI_PIN12, STM32F4xx_AF_system) | \ |
1402 |
PIN_AFIO_AF(GPIOI_PIN13, STM32F4xx_AF_system) | \ |
1403 |
PIN_AFIO_AF(GPIOI_PIN14, STM32F4xx_AF_system) | \ |
1404 |
PIN_AFIO_AF(GPIOI_PIN15, STM32F4xx_AF_system)) |
1405 |
|
1406 |
/*===========================================================================*/
|
1407 |
/* External declarations. */
|
1408 |
/*===========================================================================*/
|
1409 |
|
1410 |
#if !defined(_FROM_ASM_)
|
1411 |
#ifdef __cplusplus
|
1412 |
extern "C" { |
1413 |
#endif
|
1414 |
void boardInit(void); |
1415 |
#ifdef __cplusplus
|
1416 |
} |
1417 |
#endif
|
1418 |
#endif /* _FROM_ASM_ */ |
1419 |
|
1420 |
#endif /* BOARD_H */ |
1421 |
|
1422 |
/** @} */
|