amiro-os / modules / PowerManagement_1-1 / board.c @ 57a5d1df
History | View | Annotate | Download (4.501 KB)
1 |
/*
|
---|---|
2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
|
3 |
Copyright (C) 2016..2019 Thomas Schöpping et al.
|
4 |
|
5 |
This program is free software: you can redistribute it and/or modify
|
6 |
it under the terms of the GNU General Public License as published by
|
7 |
the Free Software Foundation, either version 3 of the License, or
|
8 |
(at your option) any later version.
|
9 |
|
10 |
This program is distributed in the hope that it will be useful,
|
11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
13 |
GNU General Public License for more details.
|
14 |
|
15 |
You should have received a copy of the GNU General Public License
|
16 |
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
17 |
*/
|
18 |
|
19 |
/**
|
20 |
* @file
|
21 |
* @brief PowerManagement v1.1 Board specific initializations.
|
22 |
*
|
23 |
* @addtogroup powermanagement_board
|
24 |
* @{
|
25 |
*/
|
26 |
|
27 |
#include <hal.h> |
28 |
#include <stm32_gpio.h> |
29 |
|
30 |
/**
|
31 |
* @brief GPIO initialization.
|
32 |
*
|
33 |
* @param[in] gpiop GPIO register block.
|
34 |
* @param[in] config GPIO configuration.
|
35 |
*/
|
36 |
|
37 |
|
38 |
|
39 |
/**
|
40 |
* @brief GPIO initialization.
|
41 |
*
|
42 |
* @param[in] gpiop GPIO register block.
|
43 |
* @param[in] moder Mode register configuration.
|
44 |
* @param[in] otyper Otype register configuration.
|
45 |
* @param[in] ospeedr Ospeed register configuration.
|
46 |
* @param[in] pupdr Pupd register configuration.
|
47 |
* @param[in] odr OD register configuration.
|
48 |
* @param[in] afrl AF register (low) configuration.
|
49 |
* @param[in] afrh AF register (high ) configuration.
|
50 |
*/
|
51 |
static void _gpio_init(stm32_gpio_t *gpiop, |
52 |
const uint32_t moder,
|
53 |
const uint32_t otyper,
|
54 |
const uint32_t ospeedr,
|
55 |
const uint32_t pupdr,
|
56 |
const uint32_t odr,
|
57 |
const uint32_t afrl,
|
58 |
const uint32_t afrh) {
|
59 |
|
60 |
gpiop->OTYPER = otyper; |
61 |
gpiop->OSPEEDR = ospeedr; |
62 |
gpiop->PUPDR = pupdr; |
63 |
gpiop->ODR = odr; |
64 |
gpiop->AFRL = afrl; |
65 |
gpiop->AFRH = afrh; |
66 |
gpiop->MODER = moder; |
67 |
|
68 |
return;
|
69 |
} |
70 |
|
71 |
/**
|
72 |
* @brief GPIO initilization for all ports.
|
73 |
*/
|
74 |
static void _stm32_gpio_init(void) { |
75 |
|
76 |
/* Enabling GPIO-related clocks, the mask comes from the
|
77 |
registry header file.*/
|
78 |
rccResetAHB1(STM32_GPIO_EN_MASK); |
79 |
rccEnableAHB1(STM32_GPIO_EN_MASK, true);
|
80 |
|
81 |
/* Initializing all the defined GPIO ports.*/
|
82 |
#if STM32_HAS_GPIOA
|
83 |
_gpio_init(GPIOA, VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH); |
84 |
#endif
|
85 |
#if STM32_HAS_GPIOB
|
86 |
_gpio_init(GPIOB, VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH); |
87 |
#endif
|
88 |
#if STM32_HAS_GPIOC
|
89 |
_gpio_init(GPIOC, VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH); |
90 |
#endif
|
91 |
#if STM32_HAS_GPIOD
|
92 |
_gpio_init(GPIOD, VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH); |
93 |
#endif
|
94 |
#if STM32_HAS_GPIOE
|
95 |
_gpio_init(GPIOE, VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH); |
96 |
#endif
|
97 |
#if STM32_HAS_GPIOF
|
98 |
_gpio_init(GPIOF, VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH); |
99 |
#endif
|
100 |
#if STM32_HAS_GPIOG
|
101 |
_gpio_init(GPIOG, VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH); |
102 |
#endif
|
103 |
#if STM32_HAS_GPIOH
|
104 |
_gpio_init(GPIOH, VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH); |
105 |
#endif
|
106 |
#if STM32_HAS_GPIOI
|
107 |
_gpio_init(GPIOI, VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRL); |
108 |
#endif
|
109 |
#if STM32_HAS_GPIOJ
|
110 |
_gpio_init(GPIOJ, VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH); |
111 |
#endif
|
112 |
#if STM32_HAS_GPIOK
|
113 |
_gpio_init(GPIOK, VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH); |
114 |
#endif
|
115 |
} |
116 |
|
117 |
/**
|
118 |
* @brief Early initialization code.
|
119 |
* @details This initialization must be performed just after stack setup
|
120 |
* and before any other initialization.
|
121 |
*/
|
122 |
void __early_init(void) { |
123 |
|
124 |
_stm32_gpio_init(); |
125 |
stm32_clock_init(); |
126 |
} |
127 |
|
128 |
/**
|
129 |
* @brief Board-specific initialization code.
|
130 |
* @todo Add your board-specific code, if any.
|
131 |
*/
|
132 |
void boardInit(void) { |
133 |
} |
134 |
|
135 |
/** @} */
|