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amiro-os / modules / DiWheelDrive_1-1 / board.h @ 933df08e

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/*
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AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2018  Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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 * Setup for AMiRo DiWheelDrive v1.1 board.
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 */
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/*
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 * Board identifier.
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 */
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#define BOARD_DIWHEELDRIVE
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#define BOARD_NAME              "AMiRo DiWheelDrive"
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#define BOARD_VERSION           "1.1"
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/*
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 * Board oscillators-related settings.
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 * NOTE: LSE not fitted.
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 */
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK                0U
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#endif
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41
#if !defined(STM32_HSECLK)
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#define STM32_HSECLK                8000000U
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#endif
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/*
46
 * Board voltages.
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 * Required for performance limits calculation.
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 */
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#define STM32_VDD                   330U
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/*
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 * MCU type as defined in the ST header.
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 */
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#define STM32F103xE
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/*
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 * IO pins assignments.
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 */
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#define GPIOA_WKUP                  0U
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#define GPIOA_LED                   1U
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#define GPIOA_DRIVE_PWM1A           2U
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#define GPIOA_DRIVE_PWM1B           3U
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#define GPIOA_PIN4                  4U
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#define GPIOA_MOTION_SCLK           5U
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#define GPIOA_MOTION_MISO           6U
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#define GPIOA_MOTION_MOSI           7U
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#define GPIOA_PIN8                  8U
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#define GPIOA_PROG_RX               9U
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#define GPIOA_PROG_TX               10U
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#define GPIOA_CAN_RX                11U
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#define GPIOA_CAN_TX                12U
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#define GPIOA_SWDIO                 13U
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#define GPIOA_SWCLK                 14U
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#define GPIOA_DRIVE_PWM2B           15U
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#define GPIOB_PIN0                  0U
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#define GPIOB_DRIVE_SENSE2          1U
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#define GPIOB_POWER_EN              2U
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#define GPIOB_DRIVE_PWM2A           3U
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#define GPIOB_PIN4                  4U
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#define GPIOB_COMPASS_DRDY          5U
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#define GPIOB_DRIVE_ENC1A           6U
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#define GPIOB_DRIVE_ENC1B           7U
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#define GPIOB_COMPASS_SCL           8U
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#define GPIOB_COMPASS_SDA           9U
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#define GPIOB_IR_SCL                10U
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#define GPIOB_IR_SDA                11U
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#define GPIOB_IR_INT                12U
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#define GPIOB_GYRO_DRDY             13U
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#define GPIOB_SYS_UART_UP           14U
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#define GPIOB_ACCEL_INT_N           15U
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#define GPIOC_DRIVE_SENSE1          0U
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#define GPIOC_SYS_INT_N             1U
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#define GPIOC_PIN2                  2U
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#define GPIOC_PATH_DCSTAT           3U
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#define GPIOC_PIN4                  4U
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#define GPIOC_PATH_DCEN             5U
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#define GPIOC_DRIVE_ENC2B           6U
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#define GPIOC_DRIVE_ENC2A           7U
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#define GPIOC_SYS_PD_N              8U
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#define GPIOC_SYS_REG_EN            9U
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#define GPIOC_SYS_UART_RX           10U
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#define GPIOC_SYS_UART_TX           11U
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#define GPIOC_PIN12                 12U
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#define GPIOC_ACCEL_SS_N            13U
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#define GPIOC_GYRO_SS_N             14U
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#define GPIOC_PIN15                 15U
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#define GPIOD_OSC_IN                0U
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#define GPIOD_OSC_OUT               1U
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#define GPIOD_SYS_WARMRST_N         2U
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#define GPIOD_PIN3                  3U
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#define GPIOD_PIN4                  4U
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#define GPIOD_PIN5                  5U
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#define GPIOD_PIN6                  6U
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#define GPIOD_PIN7                  7U
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#define GPIOD_PIN8                  8U
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#define GPIOD_PIN9                  9U
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#define GPIOD_PIN10                 10U
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#define GPIOD_PIN11                 11U
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#define GPIOD_PIN12                 12U
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#define GPIOD_PIN13                 13U
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#define GPIOD_PIN14                 14U
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#define GPIOD_PIN15                 15U
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#define GPIOE_PIN0                  0U
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#define GPIOE_PIN1                  1U
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#define GPIOE_PIN2                  2U
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#define GPIOE_PIN3                  3U
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#define GPIOE_PIN4                  4U
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#define GPIOE_PIN5                  5U
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#define GPIOE_PIN6                  6U
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#define GPIOE_PIN7                  7U
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#define GPIOE_PIN8                  8U
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#define GPIOE_PIN9                  9U
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#define GPIOE_PIN10                 10U
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#define GPIOE_PIN11                 11U
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#define GPIOE_PIN12                 12U
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#define GPIOE_PIN13                 13U
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#define GPIOE_PIN14                 14U
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#define GPIOE_PIN15                 15U
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144
#define GPIOF_PIN0                  0U
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#define GPIOF_PIN1                  1U
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#define GPIOF_PIN2                  2U
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#define GPIOF_PIN3                  3U
148
#define GPIOF_PIN4                  4U
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#define GPIOF_PIN5                  5U
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#define GPIOF_PIN6                  6U
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#define GPIOF_PIN7                  7U
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#define GPIOF_PIN8                  8U
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#define GPIOF_PIN9                  9U
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#define GPIOF_PIN10                 10U
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#define GPIOF_PIN11                 11U
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#define GPIOF_PIN12                 12U
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#define GPIOF_PIN13                 13U
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#define GPIOF_PIN14                 14U
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#define GPIOF_PIN15                 15U
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#define GPIOG_PIN0                  0U
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#define GPIOG_PIN1                  1U
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#define GPIOG_PIN2                  2U
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#define GPIOG_PIN3                  3U
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#define GPIOG_PIN4                  4U
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#define GPIOG_PIN5                  5U
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#define GPIOG_PIN6                  6U
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#define GPIOG_PIN7                  7U
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#define GPIOG_PIN8                  8U
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#define GPIOG_PIN9                  9U
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#define GPIOG_PIN10                 10U
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#define GPIOG_PIN11                 11U
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#define GPIOG_PIN12                 12U
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#define GPIOG_PIN13                 13U
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#define GPIOG_PIN14                 14U
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#define GPIOG_PIN15                 15U
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178
/*
179
 * IO lines assignments.
180
 */
181
#define LINE_WKUP                   PAL_LINE(GPIOA, GPIOA_WKUP)
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#define LINE_LED                    PAL_LINE(GPIOA, GPIOA_LED)
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#define LINE_DRIVE_PWM1A            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1A)
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#define LINE_DRIVE_PWM1B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1B)
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#define LINE_MOTION_SCLK            PAL_LINE(GPIOA, GPIOA_MOTION_SCLK)
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#define LINE_MOTION_MISO            PAL_LINE(GPIOA, GPIOA_MOTION_MISO)
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#define LINE_MOTION_MOSI            PAL_LINE(GPIOA, GPIOA_MOTION_MOSI)
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#define LINE_PROG_RX                PAL_LINE(GPIOA, GPIOA_PROG_RX)
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#define LINE_PROG_TX                PAL_LINE(GPIOA, GPIOA_PROG_TX)
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#define LINE_CAN_RX                 PAL_LINE(GPIOA, GPIOA_CAN_RX)
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#define LINE_CAN_TX                 PAL_LINE(GPIOA, GPIOA_CAN_TX)
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#define LINE_SWDIO                  PAL_LINE(GPIOA, GPIOA_SWDIO)
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#define LINE_SWCLK                  PAL_LINE(GPIOA, GPIOA_SWCLK)
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#define LINE_DRIVE_PWM2B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM2B)
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#define LINE_DRIVE_SENSE2           PAL_LINE(GPIOB, GPIOB_DRIVE_SENSE2)
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#define LINE_POWER_EN               PAL_LINE(GPIOB, GPIOB_POWER_EN)
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#define LINE_DRIVE_PWM2A            PAL_LINE(GPIOB, GPIOB_DRIVE_PWM2A)
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#define LINE_COMPASS_DRDY           PAL_LINE(GPIOB, GPIOB_COMPASS_DRDY)
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#define LINE_DRIVE_ENC1A            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1A)
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#define LINE_DRIVE_ENC1B            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1B)
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#define LINE_COMPASS_SCL            PAL_LINE(GPIOB, GPIOB_COMPASS_SCL)
203
#define LINE_COMPASS_SDA            PAL_LINE(GPIOB, GPIOB_COMPASS_SDA)
204
#define LINE_IR_SCL                 PAL_LINE(GPIOB, GPIOB_IR_SCL)
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#define LINE_IR_SDA                 PAL_LINE(GPIOB, GPIOB_IR_SDA)
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#define LINE_IR_INT                 PAL_LINE(GPIOB, GPIOB_IR_INT)
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#define LINE_GYRO_DRDY              PAL_LINE(GPIOB, GPIOB_GYRO_DRDY)
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#define LINE_SYS_UART_UP            PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
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#define LINE_ACCEL_INT_N            PAL_LINE(GPIOB, GPIOB_ACCEL_INT_N)
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#define LINE_DRIVE_SENSE1           PAL_LINE(GPIOC, GPIOC_DRIVE_SENSE1)
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#define LINE_SYS_INT_N              PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
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#define LINE_PATH_DCSTAT            PAL_LINE(GPIOC, GPIOC_PATH_DCSTAT)
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#define LINE_PATH_DCEN              PAL_LINE(GPIOC, GPIOC_PATH_DCEN)
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#define LINE_DRIVE_ENC2B            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2B)
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#define LINE_DRIVE_ENC2A            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2A)
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#define LINE_SYS_PD_N               PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
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#define LINE_SYS_REG_EN             PAL_LINE(GPIOC, GPIOC_SYS_REG_EN)
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#define LINE_SYS_UART_RX            PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
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#define LINE_SYS_UART_TX            PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
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#define LINE_ACCEL_SS_N             PAL_LINE(GPIOC, GPIOC_ACCEL_SS_N)
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#define LINE_GYRO_SS_N              PAL_LINE(GPIOC, GPIOC_GYRO_SS_N)
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#define LINE_OSC_IN                 PAL_LINE(GPIOD, GPIOD_OSC_IN)
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#define LINE_OSC_OUT                PAL_LINE(GPIOD, GPIOD_OSC_OUT)
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#define LINE_SYS_WARMRST_N          PAL_LINE(GPIOD, GPIOD_SYS_WARMRST_N)
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228
/*
229
 * I/O ports initial setup, this configuration is established soon after reset
230
 * in the initialization code.
231
 * Please refer to the STM32 Reference Manual for details.
232
 */
233
#define PIN_MODE_INPUT              0U
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#define PIN_MODE_OUTPUT_2M          2U
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#define PIN_MODE_OUTPUT_10M         1U
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#define PIN_MODE_OUTPUT_50M         3U
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#define PIN_CNF_INPUT_ANALOG        0U
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#define PIN_CNF_INPUT_FLOATING      1U
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#define PIN_CNF_INPUT_PULLX         2U
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#define PIN_CNF_OUTPUT_PUSHPULL     0U
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#define PIN_CNF_OUTPUT_OPENDRAIN    1U
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#define PIN_CNF_ALTERNATE_PUSHPULL  2U
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#define PIN_CNF_ALTERNATE_OPENDRAIN 3U
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#define PIN_CR(pin, mode, cnf)      (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U))
245
#define PIN_ODR_LOW(n)              (0U << (n))
246
#define PIN_ODR_HIGH(n)             (1U << (n))
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248
/*
249
 * GPIOA setup:
250
 *
251
 * PA0  - WKUP                      (input floating)
252
 * PA1  - LED                       (output opendrain high 50MHz)
253
 * PA2  - DRIVE_PWM1A               (alternate pushpull 50MHz)
254
 * PA3  - DRIVE_PWM1B               (alternate pushpull 50MHz)
255
 * PA4  - PIN4                      (input floating)
256
 * PA5  - MOTION_SCLK               (alternate pushpull 50MHz)
257
 * PA6  - MOTION_MISO               (input pullup)
258
 * PA7  - MOTION_MOSI               (alternate pushpull 50MHz)
259
 * PA8  - PIN8                      (input floating)
260
 * PA9  - PROG_RX                   (alternate pushpull 50MHz)
261
 * PA10 - PROG_TX                   (input pullup)
262
 * PA11 - CAN_RX                    (input pullup)
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 * PA12 - CAN_TX                    (alternate pushpull 50MHz)
264
 * PA13 - SWDIO                     (input pullup)
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 * PA14 - SWCLK                     (input pullup)
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 * PA15 - DRIVE_PWM2B               (alternate pushpull 50MHz)
267
 */
268
#define VAL_GPIOACRL                (PIN_CR(GPIOA_WKUP, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
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                                     PIN_CR(GPIOA_LED, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |            \
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                                     PIN_CR(GPIOA_DRIVE_PWM1A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
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                                     PIN_CR(GPIOA_DRIVE_PWM1B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
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                                     PIN_CR(GPIOA_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
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                                     PIN_CR(GPIOA_MOTION_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
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                                     PIN_CR(GPIOA_MOTION_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |              \
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                                     PIN_CR(GPIOA_MOTION_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
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#define VAL_GPIOACRH                (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
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                                     PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |      \
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                                     PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
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                                     PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                   \
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                                     PIN_CR(GPIOA_CAN_TX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |       \
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                                     PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
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                                     PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
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                                     PIN_CR(GPIOA_DRIVE_PWM2B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
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#define VAL_GPIOAODR                (PIN_ODR_HIGH(GPIOA_WKUP) |                                                    \
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                                     PIN_ODR_HIGH(GPIOA_LED) |                                                     \
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                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1A) |                                             \
287
                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1B) |                                             \
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                                     PIN_ODR_LOW(GPIOA_PIN4) |                                                     \
289
                                     PIN_ODR_HIGH(GPIOA_MOTION_SCLK) |                                             \
290
                                     PIN_ODR_HIGH(GPIOA_MOTION_MISO) |                                             \
291
                                     PIN_ODR_HIGH(GPIOA_MOTION_MOSI) |                                             \
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                                     PIN_ODR_LOW(GPIOA_PIN8) |                                                     \
293
                                     PIN_ODR_HIGH(GPIOA_PROG_RX) |                                                 \
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                                     PIN_ODR_HIGH(GPIOA_PROG_TX) |                                                 \
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                                     PIN_ODR_HIGH(GPIOA_CAN_RX) |                                                  \
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                                     PIN_ODR_HIGH(GPIOA_CAN_TX) |                                                  \
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                                     PIN_ODR_HIGH(GPIOA_SWDIO) |                                                   \
298
                                     PIN_ODR_HIGH(GPIOA_SWCLK) |                                                   \
299
                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM2B))
300

    
301
/*
302
 * GPIOB setup:
303
 *
304
 * PB0  - PIN0                      (input floating)
305
 * PB1  - DRIVE_SENSE2              (input analog)
306
 * PB2  - POWER_EN                  (output pushpull low 50MHz)
307
 * PB3  - DRIVE_PWM2A               (alternate pushpull 50MHz)
308
 * PB4  - PIN4                      (input floating)
309
 * PB5  - COMPASS_DRDY              (input pullup)
310
 * PB6  - DRIVE_ENC1A               (input floating)
311
 * PB7  - DRIVE_ENC1B               (input floating)
312
 * PB8  - COMPASS_SCL               (alternate opendrain 50MHz)
313
 * PB9  - COMPASS_SDA               (alternate opendrain 50MHz)
314
 * PB10 - IR_SCL                    (alternate opendrain 50MHz)
315
 * PB11 - IR_SDA                    (alternate opendrain 50MHz)
316
 * PB12 - IR_INT                    (input pullup)
317
 * PB13 - GYRO_DRDY                 (input pullup)
318
 * PB14 - SYS_UART_UP               (output opendrain high 50MHz)
319
 * PB15 - ACCEL_INT_N               (input pullup)
320
 */
321
#define VAL_GPIOBCRL                (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
322
                                     PIN_CR(GPIOB_DRIVE_SENSE2, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
323
                                     PIN_CR(GPIOB_POWER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |        \
324
                                     PIN_CR(GPIOB_DRIVE_PWM2A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
325
                                     PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
326
                                     PIN_CR(GPIOB_COMPASS_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |             \
327
                                     PIN_CR(GPIOB_DRIVE_ENC1A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
328
                                     PIN_CR(GPIOB_DRIVE_ENC1B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
329
#define VAL_GPIOBCRH                (PIN_CR(GPIOB_COMPASS_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
330
                                     PIN_CR(GPIOB_COMPASS_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
331
                                     PIN_CR(GPIOB_IR_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
332
                                     PIN_CR(GPIOB_IR_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
333
                                     PIN_CR(GPIOB_IR_INT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
334
                                     PIN_CR(GPIOB_GYRO_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
335
                                     PIN_CR(GPIOB_SYS_UART_UP, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |    \
336
                                     PIN_CR(GPIOB_ACCEL_INT_N, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX))
337
#define VAL_GPIOBODR                (PIN_ODR_LOW(GPIOB_PIN0) |                                                     \
338
                                     PIN_ODR_HIGH(GPIOB_DRIVE_SENSE2) |                                            \
339
                                     PIN_ODR_LOW(GPIOB_POWER_EN) |                                                 \
340
                                     PIN_ODR_HIGH(GPIOB_DRIVE_PWM2A) |                                             \
341
                                     PIN_ODR_LOW(GPIOB_PIN4) |                                                     \
342
                                     PIN_ODR_HIGH(GPIOB_COMPASS_DRDY) |                                            \
343
                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1A) |                                             \
344
                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1B) |                                             \
345
                                     PIN_ODR_HIGH(GPIOB_COMPASS_SCL) |                                             \
346
                                     PIN_ODR_HIGH(GPIOB_COMPASS_SDA) |                                             \
347
                                     PIN_ODR_HIGH(GPIOB_IR_SCL) |                                                  \
348
                                     PIN_ODR_HIGH(GPIOB_IR_SDA) |                                                  \
349
                                     PIN_ODR_HIGH(GPIOB_IR_INT) |                                                  \
350
                                     PIN_ODR_HIGH(GPIOB_GYRO_DRDY) |                                               \
351
                                     PIN_ODR_HIGH(GPIOB_SYS_UART_UP) |                                             \
352
                                     PIN_ODR_HIGH(GPIOB_ACCEL_INT_N))
353

    
354
/*
355
 * GPIOC setup:
356
 *
357
 * PC0  - DRIVE_SENSE1              (input analog)
358
 * PC1  - SYS_INT_N                 (output opendrain low 50MHz)
359
 * PC2  - PIN2                      (input floating)
360
 * PC3  - PATH_DCSTAT               (input floating)
361
 * PC4  - PIN4                      (input floating)
362
 * PC5  - PATH_DCEN                 (output pushpull low 50MHz)
363
 * PC6  - DRIVE_ENC2B               (input floating)
364
 * PC7  - DRIVE_ENC2A               (input floating)
365
 * PC8  - SYS_PD_N                  (output opendrain high 50MHz)
366
 * PC9  - SYS_REG_EN                (input floating)
367
 * PC10 - SYS_UART_RX               (input floating)
368
 * PC11 - SYS_UART_TX               (input floating)
369
 * PC12 - PIN12                     (input pullup)
370
 * PC13 - ACCEL_SS_N                (output pushpull high 50MHz)
371
 * PC14 - GYRO_SS_N                 (output pushpull high 50MHz)
372
 * PC15 - PIN15                     (input floating)
373
 */
374
#define VAL_GPIOCCRL                (PIN_CR(GPIOC_DRIVE_SENSE1, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
375
                                     PIN_CR(GPIOC_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |           \
376
                                     PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
377
                                     PIN_CR(GPIOC_PATH_DCSTAT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
378
                                     PIN_CR(GPIOC_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
379
                                     PIN_CR(GPIOC_PATH_DCEN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
380
                                     PIN_CR(GPIOC_DRIVE_ENC2B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
381
                                     PIN_CR(GPIOC_DRIVE_ENC2A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
382
#define VAL_GPIOCCRH                (PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |       \
383
                                     PIN_CR(GPIOC_SYS_REG_EN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |            \
384
                                     PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
385
                                     PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
386
                                     PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
387
                                     PIN_CR(GPIOC_ACCEL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |      \
388
                                     PIN_CR(GPIOC_GYRO_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
389
                                     PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
390
#define VAL_GPIOCODR                (PIN_ODR_HIGH(GPIOC_DRIVE_SENSE1) |                                            \
391
                                     PIN_ODR_LOW(GPIOC_SYS_INT_N) |                                                \
392
                                     PIN_ODR_LOW(GPIOC_PIN2) |                                                     \
393
                                     PIN_ODR_HIGH(GPIOC_PATH_DCSTAT) |                                             \
394
                                     PIN_ODR_LOW(GPIOC_PIN4) |                                                     \
395
                                     PIN_ODR_LOW(GPIOC_PATH_DCEN) |                                                \
396
                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2B) |                                             \
397
                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2A) |                                             \
398
                                     PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                                                \
399
                                     PIN_ODR_HIGH(GPIOC_SYS_REG_EN) |                                              \
400
                                     PIN_ODR_HIGH(GPIOC_SYS_UART_RX) |                                             \
401
                                     PIN_ODR_HIGH(GPIOC_SYS_UART_TX) |                                             \
402
                                     PIN_ODR_LOW(GPIOC_PIN12) |                                                    \
403
                                     PIN_ODR_HIGH(GPIOC_ACCEL_SS_N) |                                              \
404
                                     PIN_ODR_HIGH(GPIOC_GYRO_SS_N) |                                               \
405
                                     PIN_ODR_LOW(GPIOC_PIN15))
406

    
407
/*
408
 * GPIOD setup:
409
 *
410
 * PD0  - OSC_IN                    (input floating)
411
 * PD1  - OSC_OUT                   (input floating)
412
 * PD2  - SYS_WARMRST_N             (output opendrain high 50MHz)
413
 * PD3  - PIN3                      (input floating)
414
 * PD4  - PIN4                      (input floating)
415
 * PD5  - PIN5                      (input floating)
416
 * PD6  - PIN6                      (input floating)
417
 * PD7  - PIN7                      (input floating)
418
 * PD8  - PIN8                      (input floating)
419
 * PD9  - PIN9                      (input floating)
420
 * PD10 - PIN10                     (input floating)
421
 * PD11 - PIN11                     (input floating)
422
 * PD12 - PIN12                     (input floating)
423
 * PD13 - PIN13                     (input floating)
424
 * PD14 - PIN14                     (input floating)
425
 * PD15 - PIN15                     (input floating)
426
 */
427
#define VAL_GPIODCRL                (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
428
                                     PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
429
                                     PIN_CR(GPIOD_SYS_WARMRST_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |  \
430
                                     PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
431
                                     PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
432
                                     PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
433
                                     PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
434
                                     PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
435
#define VAL_GPIODCRH                (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
436
                                     PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
437
                                     PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
438
                                     PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
439
                                     PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
440
                                     PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
441
                                     PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
442
                                     PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
443
#define VAL_GPIODODR                (PIN_ODR_HIGH(GPIOD_OSC_IN) |                                                  \
444
                                     PIN_ODR_HIGH(GPIOD_OSC_OUT) |                                                 \
445
                                     PIN_ODR_HIGH(GPIOD_SYS_WARMRST_N) |                                           \
446
                                     PIN_ODR_LOW(GPIOD_PIN3) |                                                     \
447
                                     PIN_ODR_LOW(GPIOD_PIN4) |                                                     \
448
                                     PIN_ODR_LOW(GPIOD_PIN5) |                                                     \
449
                                     PIN_ODR_LOW(GPIOD_PIN6) |                                                     \
450
                                     PIN_ODR_LOW(GPIOD_PIN7) |                                                     \
451
                                     PIN_ODR_LOW(GPIOD_PIN8) |                                                     \
452
                                     PIN_ODR_LOW(GPIOD_PIN9) |                                                     \
453
                                     PIN_ODR_LOW(GPIOD_PIN10) |                                                    \
454
                                     PIN_ODR_LOW(GPIOD_PIN11) |                                                    \
455
                                     PIN_ODR_LOW(GPIOD_PIN12) |                                                    \
456
                                     PIN_ODR_LOW(GPIOD_PIN13) |                                                    \
457
                                     PIN_ODR_LOW(GPIOD_PIN14) |                                                    \
458
                                     PIN_ODR_LOW(GPIOD_PIN15))
459

    
460
/*
461
 * GPIOE setup:
462
 *
463
 * PE0  - PIN0                      (input floating)
464
 * PE1  - PIN1                      (input floating)
465
 * PE2  - PIN2                      (input floating)
466
 * PE3  - PIN3                      (input floating)
467
 * PE4  - PIN4                      (input floating)
468
 * PE5  - PIN5                      (input floating)
469
 * PE6  - PIN6                      (input floating)
470
 * PE7  - PIN7                      (input floating)
471
 * PE8  - PIN8                      (input floating)
472
 * PE9  - PIN9                      (input floating)
473
 * PE10 - PIN10                     (input floating)
474
 * PE11 - PIN11                     (input floating)
475
 * PE12 - PIN12                     (input floating)
476
 * PE13 - PIN13                     (input floating)
477
 * PE14 - PIN14                     (input floating)
478
 * PE15 - PIN15                     (input floating)
479
 */
480
#define VAL_GPIOECRL                (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
481
                                     PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
482
                                     PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
483
                                     PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
484
                                     PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
485
                                     PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
486
                                     PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
487
                                     PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
488
#define VAL_GPIOECRH                (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
489
                                     PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
490
                                     PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
491
                                     PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
492
                                     PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
493
                                     PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
494
                                     PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
495
                                     PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
496
#define VAL_GPIOEODR                (PIN_ODR_LOW(GPIOE_PIN0) |                                                     \
497
                                     PIN_ODR_LOW(GPIOE_PIN1) |                                                     \
498
                                     PIN_ODR_LOW(GPIOE_PIN2) |                                                     \
499
                                     PIN_ODR_LOW(GPIOE_PIN3) |                                                     \
500
                                     PIN_ODR_LOW(GPIOE_PIN4) |                                                     \
501
                                     PIN_ODR_LOW(GPIOE_PIN5) |                                                     \
502
                                     PIN_ODR_LOW(GPIOE_PIN6) |                                                     \
503
                                     PIN_ODR_LOW(GPIOE_PIN7) |                                                     \
504
                                     PIN_ODR_LOW(GPIOE_PIN8) |                                                     \
505
                                     PIN_ODR_LOW(GPIOE_PIN9) |                                                     \
506
                                     PIN_ODR_LOW(GPIOE_PIN10) |                                                    \
507
                                     PIN_ODR_LOW(GPIOE_PIN11) |                                                    \
508
                                     PIN_ODR_LOW(GPIOE_PIN12) |                                                    \
509
                                     PIN_ODR_LOW(GPIOE_PIN13) |                                                    \
510
                                     PIN_ODR_LOW(GPIOE_PIN14) |                                                    \
511
                                     PIN_ODR_LOW(GPIOE_PIN15))
512

    
513
/*
514
 * GPIOF setup:
515
 *
516
 * PF0  - PIN0                      (input floating)
517
 * PF1  - PIN1                      (input floating)
518
 * PF2  - PIN2                      (input floating)
519
 * PF3  - PIN3                      (input floating)
520
 * PF4  - PIN4                      (input floating)
521
 * PF5  - PIN5                      (input floating)
522
 * PF6  - PIN6                      (input floating)
523
 * PF7  - PIN7                      (input floating)
524
 * PF8  - PIN8                      (input floating)
525
 * PF9  - PIN9                      (input floating)
526
 * PF10 - PIN10                     (input floating)
527
 * PF11 - PIN11                     (input floating)
528
 * PF12 - PIN12                     (input floating)
529
 * PF13 - PIN13                     (input floating)
530
 * PF14 - PIN14                     (input floating)
531
 * PF15 - PIN15                     (input floating)
532
 */
533
#define VAL_GPIOFCRL                (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
534
                                     PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
535
                                     PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
536
                                     PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
537
                                     PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
538
                                     PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
539
                                     PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
540
                                     PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
541
#define VAL_GPIOFCRH                (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
542
                                     PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
543
                                     PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
544
                                     PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
545
                                     PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
546
                                     PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
547
                                     PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
548
                                     PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
549
#define VAL_GPIOFODR                (PIN_ODR_LOW(GPIOF_PIN0) |                                                     \
550
                                     PIN_ODR_LOW(GPIOF_PIN1) |                                                     \
551
                                     PIN_ODR_LOW(GPIOF_PIN2) |                                                     \
552
                                     PIN_ODR_LOW(GPIOF_PIN3) |                                                     \
553
                                     PIN_ODR_LOW(GPIOF_PIN4) |                                                     \
554
                                     PIN_ODR_LOW(GPIOF_PIN5) |                                                     \
555
                                     PIN_ODR_LOW(GPIOF_PIN6) |                                                     \
556
                                     PIN_ODR_LOW(GPIOF_PIN7) |                                                     \
557
                                     PIN_ODR_LOW(GPIOF_PIN8) |                                                     \
558
                                     PIN_ODR_LOW(GPIOF_PIN9) |                                                     \
559
                                     PIN_ODR_LOW(GPIOF_PIN10) |                                                    \
560
                                     PIN_ODR_LOW(GPIOF_PIN11) |                                                    \
561
                                     PIN_ODR_LOW(GPIOF_PIN12) |                                                    \
562
                                     PIN_ODR_LOW(GPIOF_PIN13) |                                                    \
563
                                     PIN_ODR_LOW(GPIOF_PIN14) |                                                    \
564
                                     PIN_ODR_LOW(GPIOF_PIN15))
565

    
566
/*
567
 * GPIOG setup:
568
 *
569
 * PG0  - PIN0                      (input floating)
570
 * PG1  - PIN1                      (input floating)
571
 * PG2  - PIN2                      (input floating)
572
 * PG3  - PIN3                      (input floating)
573
 * PG4  - PIN4                      (input floating)
574
 * PG5  - PIN5                      (input floating)
575
 * PG6  - PIN6                      (input floating)
576
 * PG7  - PIN7                      (input floating)
577
 * PG8  - PIN8                      (input floating)
578
 * PG9  - PIN9                      (input floating)
579
 * PG10 - PIN10                     (input floating)
580
 * PG11 - PIN11                     (input floating)
581
 * PG12 - PIN12                     (input floating)
582
 * PG13 - PIN13                     (input floating)
583
 * PG14 - PIN14                     (input floating)
584
 * PG15 - PIN15                     (input floating)
585
 */
586
#define VAL_GPIOGCRL                (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
587
                                     PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
588
                                     PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
589
                                     PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
590
                                     PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
591
                                     PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
592
                                     PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
593
                                     PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
594
#define VAL_GPIOGCRH                (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
595
                                     PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
596
                                     PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
597
                                     PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
598
                                     PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
599
                                     PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
600
                                     PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
601
                                     PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
602
#define VAL_GPIOGODR                (PIN_ODR_LOW(GPIOG_PIN0) |                                                     \
603
                                     PIN_ODR_LOW(GPIOG_PIN1) |                                                     \
604
                                     PIN_ODR_LOW(GPIOG_PIN2) |                                                     \
605
                                     PIN_ODR_LOW(GPIOG_PIN3) |                                                     \
606
                                     PIN_ODR_LOW(GPIOG_PIN4) |                                                     \
607
                                     PIN_ODR_LOW(GPIOG_PIN5) |                                                     \
608
                                     PIN_ODR_LOW(GPIOG_PIN6) |                                                     \
609
                                     PIN_ODR_LOW(GPIOG_PIN7) |                                                     \
610
                                     PIN_ODR_LOW(GPIOG_PIN8) |                                                     \
611
                                     PIN_ODR_LOW(GPIOG_PIN9) |                                                     \
612
                                     PIN_ODR_LOW(GPIOG_PIN10) |                                                    \
613
                                     PIN_ODR_LOW(GPIOG_PIN11) |                                                    \
614
                                     PIN_ODR_LOW(GPIOG_PIN12) |                                                    \
615
                                     PIN_ODR_LOW(GPIOG_PIN13) |                                                    \
616
                                     PIN_ODR_LOW(GPIOG_PIN14) |                                                    \
617
                                     PIN_ODR_LOW(GPIOG_PIN15))
618

    
619
#if !defined(_FROM_ASM_)
620
#ifdef __cplusplus
621
extern "C" {
622
#endif
623
  void boardInit(void);
624
#ifdef __cplusplus
625
}
626
#endif
627
#endif /* _FROM_ASM_ */
628

    
629
#endif /* _BOARD_H_ */