amiro-os / modules / PowerManagement_1-1 / module.c @ a7e67622
History | View | Annotate | Download (37.299 KB)
| 1 |
/*
|
|---|---|
| 2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
|
| 3 |
Copyright (C) 2016..2018 Thomas Schöpping et al.
|
| 4 |
|
| 5 |
This program is free software: you can redistribute it and/or modify
|
| 6 |
it under the terms of the GNU General Public License as published by
|
| 7 |
the Free Software Foundation, either version 3 of the License, or
|
| 8 |
(at your option) any later version.
|
| 9 |
|
| 10 |
This program is distributed in the hope that it will be useful,
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
| 13 |
GNU General Public License for more details.
|
| 14 |
|
| 15 |
You should have received a copy of the GNU General Public License
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
| 17 |
*/
|
| 18 |
|
| 19 |
#include "module.h" |
| 20 |
|
| 21 |
/*===========================================================================*/
|
| 22 |
/**
|
| 23 |
* @name Module specific functions
|
| 24 |
* @{
|
| 25 |
*/
|
| 26 |
/*===========================================================================*/
|
| 27 |
#include <amiroos.h> |
| 28 |
|
| 29 |
/**
|
| 30 |
* @brief Interrupt service routine callback for I/O interrupt signals.
|
| 31 |
*
|
| 32 |
* @param extp EXT driver to handle the ISR.
|
| 33 |
* @param channel Channel on which the interrupt was encountered.
|
| 34 |
*/
|
| 35 |
static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) { |
| 36 |
(void)extp;
|
| 37 |
|
| 38 |
chSysLockFromISR(); |
| 39 |
chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
|
| 40 |
chSysUnlockFromISR(); |
| 41 |
|
| 42 |
return;
|
| 43 |
} |
| 44 |
|
| 45 |
/** @} */
|
| 46 |
|
| 47 |
/*===========================================================================*/
|
| 48 |
/**
|
| 49 |
* @name ChibiOS/HAL configuration
|
| 50 |
* @{
|
| 51 |
*/
|
| 52 |
/*===========================================================================*/
|
| 53 |
|
| 54 |
ADCConversionGroup moduleHalAdcVsysConversionGroup = {
|
| 55 |
/* buffer type */ true, |
| 56 |
/* number of channels */ 1, |
| 57 |
/* callback function */ NULL, |
| 58 |
/* error callback */ NULL, |
| 59 |
/* CR1 */ ADC_CR1_AWDEN | ADC_CR1_AWDIE,
|
| 60 |
/* CR2 */ ADC_CR2_SWSTART | ADC_CR2_CONT,
|
| 61 |
/* SMPR1 */ 0, |
| 62 |
/* SMPR2 */ ADC_SMPR2_SMP_AN9(ADC_SAMPLE_480),
|
| 63 |
/* HTR */ ADC_HTR_HT,
|
| 64 |
/* LTR */ 0, |
| 65 |
/* SQR1 */ ADC_SQR1_NUM_CH(1), |
| 66 |
/* SQR2 */ 0, |
| 67 |
/* SQR3 */ ADC_SQR3_SQ1_N(ADC_CHANNEL_IN9),
|
| 68 |
}; |
| 69 |
|
| 70 |
CANConfig moduleHalCanConfig = {
|
| 71 |
/* mcr */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
|
| 72 |
/* btr */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1), |
| 73 |
}; |
| 74 |
|
| 75 |
EXTConfig moduleHalExtConfig = {
|
| 76 |
/* channel configrations */ {
|
| 77 |
/* channel 0 */ { // IR_INT1_N: must be enabled explicitely |
| 78 |
/* mode */ EXT_MODE_GPIOB | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
|
| 79 |
/* callback */ _moduleIsrCallback,
|
| 80 |
}, |
| 81 |
/* channel 1 */ { // GAUGE_BATLOW1: must be enabled explicitely |
| 82 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
|
| 83 |
/* callback */ _moduleIsrCallback,
|
| 84 |
}, |
| 85 |
/* channel 2 */ { // GAUGE_BATDG1_N: must be enabled expliciety |
| 86 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
|
| 87 |
/* callback */ _moduleIsrCallback,
|
| 88 |
}, |
| 89 |
/* channel 3 */ { // SYS_UART_DN: automatic interrupt on event |
| 90 |
/* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
|
| 91 |
/* callback */ _moduleIsrCallback,
|
| 92 |
}, |
| 93 |
/* channel 4 */ { // IR_INT2_N: must be enabled explicitely |
| 94 |
/* mode */ EXT_MODE_GPIOC | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
|
| 95 |
/* callback */ _moduleIsrCallback,
|
| 96 |
}, |
| 97 |
/* channel 5 */ { // TOUCH_INT: must be enabled explicitely |
| 98 |
/* mode */ EXT_MODE_GPIOC | APAL2CH_EDGE(MPR121_LLD_INT_EDGE),
|
| 99 |
/* callback */ _moduleIsrCallback,
|
| 100 |
}, |
| 101 |
/* channel 6 */ { // GAUGE_BATLOW2: must be enabled explicitely |
| 102 |
/* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
|
| 103 |
/* callback */ _moduleIsrCallback,
|
| 104 |
}, |
| 105 |
/* channel 7 */ { // GAUGE_BATDG2_N: must be enabled expliciety |
| 106 |
/* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
|
| 107 |
/* callback */ _moduleIsrCallback,
|
| 108 |
}, |
| 109 |
/* channel 8 */ { // PATH_DC: must be enabled explicitely |
| 110 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
|
| 111 |
/* callback */ _moduleIsrCallback,
|
| 112 |
}, |
| 113 |
/* channel 9 */ { // SYS_SPI_DIR: must be enabled explicitely |
| 114 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
|
| 115 |
/* callback */ _moduleIsrCallback,
|
| 116 |
}, |
| 117 |
/* channel 10 */ {
|
| 118 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 119 |
/* callback */ NULL, |
| 120 |
}, |
| 121 |
/* channel 11 */ {
|
| 122 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 123 |
/* callback */ NULL, |
| 124 |
}, |
| 125 |
/* channel 12 */ { // SYS_SYNC_N: automatic interrupt on event |
| 126 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
|
| 127 |
/* callback */ _moduleIsrCallback,
|
| 128 |
}, |
| 129 |
/* channel 13 */ { // SYS_PD_N: automatic interrupt when activated |
| 130 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
|
| 131 |
/* callback */ _moduleIsrCallback,
|
| 132 |
}, |
| 133 |
/* channel 14 */ { // SYS_WARMRST_N: automatic interrupt when activated |
| 134 |
/* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
|
| 135 |
/* callback */ _moduleIsrCallback,
|
| 136 |
}, |
| 137 |
/* channel 15 */ { // SYS_UART_UP: automatic interrupt on event |
| 138 |
/* mode */ EXT_MODE_GPIOB| EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
|
| 139 |
/* callback */ _moduleIsrCallback,
|
| 140 |
}, |
| 141 |
/* channel 16 */ {
|
| 142 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 143 |
/* callback */ NULL, |
| 144 |
}, |
| 145 |
/* channel 17 */ {
|
| 146 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 147 |
/* callback */ NULL, |
| 148 |
}, |
| 149 |
/* channel 18 */ {
|
| 150 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 151 |
/* callback */ NULL, |
| 152 |
}, |
| 153 |
/* channel 19 */ {
|
| 154 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 155 |
/* callback */ NULL, |
| 156 |
}, |
| 157 |
/* channel 20 */ {
|
| 158 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 159 |
/* callback */ NULL, |
| 160 |
}, |
| 161 |
/* channel 21 */ {
|
| 162 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 163 |
/* callback */ NULL, |
| 164 |
}, |
| 165 |
/* channel 22 */ {
|
| 166 |
/* mode */ EXT_CH_MODE_DISABLED,
|
| 167 |
/* callback */ NULL, |
| 168 |
}, |
| 169 |
}, |
| 170 |
}; |
| 171 |
|
| 172 |
I2CConfig moduleHalI2cProxPm18Pm33GaugeRearConfig = {
|
| 173 |
/* I²C mode */ OPMODE_I2C,
|
| 174 |
/* frequency */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL) |
| 175 |
/* duty cycle */ FAST_DUTY_CYCLE_2,
|
| 176 |
}; |
| 177 |
|
| 178 |
I2CConfig moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig = {
|
| 179 |
/* I²C mode */ OPMODE_I2C,
|
| 180 |
/* frequency */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL) |
| 181 |
/* duty cycle */ FAST_DUTY_CYCLE_2,
|
| 182 |
}; |
| 183 |
|
| 184 |
PWMConfig moduleHalPwmBuzzerConfig = {
|
| 185 |
/* frequency */ 1000000, |
| 186 |
/* period */ 0, |
| 187 |
/* callback */ NULL, |
| 188 |
/* channel configurations */ {
|
| 189 |
/* channel 0 */ {
|
| 190 |
/* mode */ PWM_OUTPUT_DISABLED,
|
| 191 |
/* callback */ NULL |
| 192 |
}, |
| 193 |
/* channel 1 */ {
|
| 194 |
/* mode */ PWM_OUTPUT_ACTIVE_HIGH,
|
| 195 |
/* callback */ NULL |
| 196 |
}, |
| 197 |
/* channel 2 */ {
|
| 198 |
/* mode */ PWM_OUTPUT_DISABLED,
|
| 199 |
/* callback */ NULL |
| 200 |
}, |
| 201 |
/* channel 3 */ {
|
| 202 |
/* mode */ PWM_OUTPUT_DISABLED,
|
| 203 |
/* callback */ NULL |
| 204 |
}, |
| 205 |
}, |
| 206 |
/* TIM CR2 register */ 0, |
| 207 |
#if STM32_PWM_USE_ADVANCED
|
| 208 |
/* TIM BDTR register */ 0, |
| 209 |
#endif
|
| 210 |
/* TIM DIER register */ 0, |
| 211 |
}; |
| 212 |
|
| 213 |
SerialConfig moduleHalProgIfConfig = {
|
| 214 |
/* bit rate */ 115200, |
| 215 |
/* CR1 */ 0, |
| 216 |
/* CR1 */ 0, |
| 217 |
/* CR1 */ 0, |
| 218 |
}; |
| 219 |
|
| 220 |
/** @} */
|
| 221 |
|
| 222 |
/*===========================================================================*/
|
| 223 |
/**
|
| 224 |
* @name GPIO definitions
|
| 225 |
* @{
|
| 226 |
*/
|
| 227 |
/*===========================================================================*/
|
| 228 |
|
| 229 |
apalGpio_t moduleGpioSysRegEn = {
|
| 230 |
/* port */ GPIOA,
|
| 231 |
/* pad */ GPIOA_SYS_REG_EN,
|
| 232 |
}; |
| 233 |
|
| 234 |
apalGpio_t moduleGpioIrInt1 = {
|
| 235 |
/* port */ GPIOB,
|
| 236 |
/* pad */ GPIOB_IR_INT1_N,
|
| 237 |
}; |
| 238 |
|
| 239 |
apalGpio_t moduleGpioPowerEn = {
|
| 240 |
/* port */ GPIOB,
|
| 241 |
/* pad */ GPIOB_POWER_EN,
|
| 242 |
}; |
| 243 |
|
| 244 |
apalGpio_t moduleGpioSysUartDn = {
|
| 245 |
/* port */ GPIOB,
|
| 246 |
/* pad */ GPIOB_SYS_UART_DN,
|
| 247 |
}; |
| 248 |
|
| 249 |
apalGpio_t moduleGpioChargeStat2A = {
|
| 250 |
/* port */ GPIOB,
|
| 251 |
/* pad */ GPIOB_CHARGE_STAT2A,
|
| 252 |
}; |
| 253 |
|
| 254 |
apalGpio_t moduleGpioGaugeBatLow2 = {
|
| 255 |
/* port */ GPIOB,
|
| 256 |
/* pad */ GPIOB_GAUGE_BATLOW2,
|
| 257 |
}; |
| 258 |
|
| 259 |
apalGpio_t moduleGpioGaugeBatGd2 = {
|
| 260 |
/* port */ GPIOB,
|
| 261 |
/* pad */ GPIOB_GAUGE_BATGD2_N,
|
| 262 |
}; |
| 263 |
|
| 264 |
apalGpio_t moduleGpioLed = {
|
| 265 |
/* port */ GPIOB,
|
| 266 |
/* pad */ GPIOB_LED,
|
| 267 |
}; |
| 268 |
|
| 269 |
apalGpio_t moduleGpioSysUartUp = {
|
| 270 |
/* port */ GPIOB,
|
| 271 |
/* pad */ GPIOB_SYS_UART_UP,
|
| 272 |
}; |
| 273 |
|
| 274 |
apalGpio_t moduleGpioChargeStat1A = {
|
| 275 |
/* port */ GPIOC,
|
| 276 |
/* pad */ GPIOC_CHARGE_STAT1A,
|
| 277 |
}; |
| 278 |
|
| 279 |
apalGpio_t moduleGpioGaugeBatLow1 = {
|
| 280 |
/* port */ GPIOC,
|
| 281 |
/* pad */ GPIOC_GAUGE_BATLOW1,
|
| 282 |
}; |
| 283 |
|
| 284 |
apalGpio_t moduleGpioGaugeBatGd1 = {
|
| 285 |
/* port */ GPIOC,
|
| 286 |
/* pad */ GPIOC_GAUGE_BATGD1_N,
|
| 287 |
}; |
| 288 |
|
| 289 |
apalGpio_t moduleGpioChargeEn1 = {
|
| 290 |
/* port */ GPIOC,
|
| 291 |
/* pad */ GPIOC_CHARGE_EN1_N,
|
| 292 |
}; |
| 293 |
|
| 294 |
apalGpio_t moduleGpioIrInt2 = {
|
| 295 |
/* port */ GPIOC,
|
| 296 |
/* pad */ GPIOC_IR_INT2_N,
|
| 297 |
}; |
| 298 |
|
| 299 |
apalGpio_t moduleGpioTouchInt = {
|
| 300 |
/* port */ GPIOC,
|
| 301 |
/* pad */ GPIOC_TOUCH_INT_N,
|
| 302 |
}; |
| 303 |
|
| 304 |
apalGpio_t moduleGpioSysDone = {
|
| 305 |
/* port */ GPIOC,
|
| 306 |
/* pad */ GPIOC_SYS_DONE,
|
| 307 |
}; |
| 308 |
|
| 309 |
apalGpio_t moduleGpioSysProg = {
|
| 310 |
/* port */ GPIOC,
|
| 311 |
/* pad */ GPIOC_SYS_PROG_N,
|
| 312 |
}; |
| 313 |
|
| 314 |
apalGpio_t moduleGpioPathDc = {
|
| 315 |
/* port */ GPIOC,
|
| 316 |
/* pad */ GPIOC_PATH_DC,
|
| 317 |
}; |
| 318 |
|
| 319 |
apalGpio_t moduleGpioSysSpiDir = {
|
| 320 |
/* port */ GPIOC,
|
| 321 |
/* pad */ GPIOC_SYS_SPI_DIR,
|
| 322 |
}; |
| 323 |
|
| 324 |
apalGpio_t moduleGpioSysSync = {
|
| 325 |
/* port */ GPIOC,
|
| 326 |
/* pad */ GPIOC_SYS_INT_N,
|
| 327 |
}; |
| 328 |
|
| 329 |
apalGpio_t moduleGpioSysPd = {
|
| 330 |
/* port */ GPIOC,
|
| 331 |
/* pad */ GPIOC_SYS_PD_N,
|
| 332 |
}; |
| 333 |
|
| 334 |
apalGpio_t moduleGpioSysWarmrst = {
|
| 335 |
/* port */ GPIOC,
|
| 336 |
/* pad */ GPIOC_SYS_WARMRST_N,
|
| 337 |
}; |
| 338 |
|
| 339 |
apalGpio_t moduleGpioBtRst = {
|
| 340 |
/* port */ GPIOC,
|
| 341 |
/* pad */ GPIOC_BT_RST,
|
| 342 |
}; |
| 343 |
|
| 344 |
apalGpio_t moduleGpioChargeEn2 = {
|
| 345 |
/* port */ GPIOD,
|
| 346 |
/* pad */ GPIOD_CHARGE_EN2_N,
|
| 347 |
}; |
| 348 |
|
| 349 |
/** @} */
|
| 350 |
|
| 351 |
/*===========================================================================*/
|
| 352 |
/**
|
| 353 |
* @name AMiRo-OS core configurations
|
| 354 |
* @{
|
| 355 |
*/
|
| 356 |
/*===========================================================================*/
|
| 357 |
|
| 358 |
apalControlGpio_t moduleSsspPd = {
|
| 359 |
/* GPIO */ &moduleGpioSysPd,
|
| 360 |
/* meta */ {
|
| 361 |
/* active state */ APAL_GPIO_ACTIVE_LOW,
|
| 362 |
/* edge */ APAL_GPIO_EDGE_FALLING,
|
| 363 |
/* direction */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
|
| 364 |
}, |
| 365 |
}; |
| 366 |
|
| 367 |
apalControlGpio_t moduleSsspSync = {
|
| 368 |
/* GPIO */ &moduleGpioSysSync,
|
| 369 |
/* meta */ {
|
| 370 |
/* active state */ APAL_GPIO_ACTIVE_LOW,
|
| 371 |
/* edge */ APAL_GPIO_EDGE_FALLING,
|
| 372 |
/* direction */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
|
| 373 |
}, |
| 374 |
}; |
| 375 |
|
| 376 |
const char* moduleShellPrompt = "PowerManagement"; |
| 377 |
|
| 378 |
/** @} */
|
| 379 |
|
| 380 |
/*===========================================================================*/
|
| 381 |
/**
|
| 382 |
* @name Low- |