amiro-os / modules / PowerManagement_1-1 / module.c @ a7e67622
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| 1 | e545e620 | Thomas Schöpping | /*
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| 2 | AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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| 3 | Copyright (C) 2016..2018 Thomas Schöpping et al.
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| 4 | |||
| 5 | This program is free software: you can redistribute it and/or modify
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| 6 | it under the terms of the GNU General Public License as published by
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| 7 | the Free Software Foundation, either version 3 of the License, or
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| 8 | (at your option) any later version.
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| 9 | |||
| 10 | This program is distributed in the hope that it will be useful,
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| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 13 | GNU General Public License for more details.
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| 14 | |||
| 15 | You should have received a copy of the GNU General Public License
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| 16 | along with this program. If not, see <http://www.gnu.org/licenses/>.
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| 17 | */
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| 18 | |||
| 19 | #include "module.h" |
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| 20 | |||
| 21 | /*===========================================================================*/
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| 22 | /**
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| 23 | * @name Module specific functions
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| 24 | * @{
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| 25 | */
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| 26 | /*===========================================================================*/
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| 27 | #include <amiroos.h> |
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| 28 | |||
| 29 | /**
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| 30 | * @brief Interrupt service routine callback for I/O interrupt signals.
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| 31 | *
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| 32 | * @param extp EXT driver to handle the ISR.
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| 33 | * @param channel Channel on which the interrupt was encountered.
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| 34 | */
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| 35 | static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) { |
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| 36 | (void)extp;
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| 37 | |||
| 38 | chSysLockFromISR(); |
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| 39 | chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
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| 40 | chSysUnlockFromISR(); |
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| 41 | |||
| 42 | return;
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| 43 | } |
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| 44 | |||
| 45 | /** @} */
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| 46 | |||
| 47 | /*===========================================================================*/
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| 48 | /**
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| 49 | * @name ChibiOS/HAL configuration
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| 50 | * @{
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| 51 | */
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| 52 | /*===========================================================================*/
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| 53 | |||
| 54 | ADCConversionGroup moduleHalAdcVsysConversionGroup = {
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| 55 | /* buffer type */ true, |
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| 56 | /* number of channels */ 1, |
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| 57 | /* callback function */ NULL, |
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| 58 | /* error callback */ NULL, |
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| 59 | /* CR1 */ ADC_CR1_AWDEN | ADC_CR1_AWDIE,
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| 60 | /* CR2 */ ADC_CR2_SWSTART | ADC_CR2_CONT,
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| 61 | /* SMPR1 */ 0, |
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| 62 | /* SMPR2 */ ADC_SMPR2_SMP_AN9(ADC_SAMPLE_480),
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| 63 | /* HTR */ ADC_HTR_HT,
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| 64 | /* LTR */ 0, |
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| 65 | /* SQR1 */ ADC_SQR1_NUM_CH(1), |
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| 66 | /* SQR2 */ 0, |
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| 67 | /* SQR3 */ ADC_SQR3_SQ1_N(ADC_CHANNEL_IN9),
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| 68 | }; |
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| 69 | |||
| 70 | CANConfig moduleHalCanConfig = {
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| 71 | /* mcr */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
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| 72 | /* btr */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1), |
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| 73 | }; |
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| 74 | |||
| 75 | EXTConfig moduleHalExtConfig = {
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| 76 | /* channel configrations */ {
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| 77 | /* channel 0 */ { // IR_INT1_N: must be enabled explicitely |
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| 78 | /* mode */ EXT_MODE_GPIOB | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
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| 79 | /* callback */ _moduleIsrCallback,
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| 80 | }, |
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| 81 | /* channel 1 */ { // GAUGE_BATLOW1: must be enabled explicitely |
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| 82 | /* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
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| 83 | /* callback */ _moduleIsrCallback,
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| 84 | }, |
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| 85 | /* channel 2 */ { // GAUGE_BATDG1_N: must be enabled expliciety |
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| 86 | /* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
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| 87 | /* callback */ _moduleIsrCallback,
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| 88 | }, |
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| 89 | /* channel 3 */ { // SYS_UART_DN: automatic interrupt on event |
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| 90 | /* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
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| 91 | /* callback */ _moduleIsrCallback,
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| 92 | }, |
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| 93 | /* channel 4 */ { // IR_INT2_N: must be enabled explicitely |
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| 94 | /* mode */ EXT_MODE_GPIOC | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
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| 95 | /* callback */ _moduleIsrCallback,
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| 96 | }, |
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| 97 | /* channel 5 */ { // TOUCH_INT: must be enabled explicitely |
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| 98 | /* mode */ EXT_MODE_GPIOC | APAL2CH_EDGE(MPR121_LLD_INT_EDGE),
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| 99 | /* callback */ _moduleIsrCallback,
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| 100 | }, |
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| 101 | /* channel 6 */ { // GAUGE_BATLOW2: must be enabled explicitely |
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| 102 | /* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
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| 103 | /* callback */ _moduleIsrCallback,
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| 104 | }, |
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| 105 | /* channel 7 */ { // GAUGE_BATDG2_N: must be enabled expliciety |
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| 106 | /* mode */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
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| 107 | /* callback */ _moduleIsrCallback,
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| 108 | }, |
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| 109 | /* channel 8 */ { // PATH_DC: must be enabled explicitely |
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| 110 | /* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
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| 111 | /* callback */ _moduleIsrCallback,
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| 112 | }, |
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| 113 | /* channel 9 */ { // SYS_SPI_DIR: must be enabled explicitely |
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| 114 | /* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
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| 115 | /* callback */ _moduleIsrCallback,
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| 116 | }, |
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| 117 | /* channel 10 */ {
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| 118 | /* mode */ EXT_CH_MODE_DISABLED,
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| 119 | /* callback */ NULL, |
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| 120 | }, |
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| 121 | /* channel 11 */ {
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| 122 | /* mode */ EXT_CH_MODE_DISABLED,
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| 123 | /* callback */ NULL, |
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| 124 | }, |
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| 125 | /* channel 12 */ { // SYS_SYNC_N: automatic interrupt on event |
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| 126 | /* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
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| 127 | /* callback */ _moduleIsrCallback,
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| 128 | }, |
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| 129 | /* channel 13 */ { // SYS_PD_N: automatic interrupt when activated |
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| 130 | /* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
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| 131 | /* callback */ _moduleIsrCallback,
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| 132 | }, |
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| 133 | /* channel 14 */ { // SYS_WARMRST_N: automatic interrupt when activated |
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| 134 | /* mode */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
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| 135 | /* callback */ _moduleIsrCallback,
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| 136 | }, |
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| 137 | /* channel 15 */ { // SYS_UART_UP: automatic interrupt on event |
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| 138 | /* mode */ EXT_MODE_GPIOB| EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
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| 139 | /* callback */ _moduleIsrCallback,
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| 140 | }, |
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| 141 | /* channel 16 */ {
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| 142 | /* mode */ EXT_CH_MODE_DISABLED,
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| 143 | /* callback */ NULL, |
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| 144 | }, |
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| 145 | /* channel 17 */ {
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| 146 | /* mode */ EXT_CH_MODE_DISABLED,
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| 147 | /* callback */ NULL, |
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| 148 | }, |
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| 149 | /* channel 18 */ {
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| 150 | /* mode */ EXT_CH_MODE_DISABLED,
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| 151 | /* callback */ NULL, |
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| 152 | }, |
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| 153 | /* channel 19 */ {
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| 154 | /* mode */ EXT_CH_MODE_DISABLED,
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| 155 | /* callback */ NULL, |
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| 156 | }, |
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| 157 | /* channel 20 */ {
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| 158 | /* mode */ EXT_CH_MODE_DISABLED,
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| 159 | /* callback */ NULL, |
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| 160 | }, |
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| 161 | /* channel 21 */ {
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| 162 | /* mode */ EXT_CH_MODE_DISABLED,
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| 163 | /* callback */ NULL, |
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| 164 | }, |
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| 165 | /* channel 22 */ {
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| 166 | /* mode */ EXT_CH_MODE_DISABLED,
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| 167 | /* callback */ NULL, |
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| 168 | }, |
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| 169 | }, |
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| 170 | }; |
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| 171 | |||
| 172 | I2CConfig moduleHalI2cProxPm18Pm33GaugeRearConfig = {
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| 173 | /* I²C mode */ OPMODE_I2C,
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| 174 | /* frequency */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL) |
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| 175 | /* duty cycle */ FAST_DUTY_CYCLE_2,
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| 176 | }; |
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| 177 | |||
| 178 | I2CConfig moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig = {
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| 179 | /* I²C mode */ OPMODE_I2C,
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| 180 | /* frequency */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL) |
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| 181 | /* duty cycle */ FAST_DUTY_CYCLE_2,
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| 182 | }; |
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| 183 | |||
| 184 | PWMConfig moduleHalPwmBuzzerConfig = {
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| 185 | /* frequency */ 1000000, |
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| 186 | /* period */ 0, |
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| 187 | /* callback */ NULL, |
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| 188 | /* channel configurations */ {
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| 189 | /* channel 0 */ {
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| 190 | /* mode */ PWM_OUTPUT_DISABLED,
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| 191 | /* callback */ NULL |
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| 192 | }, |
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| 193 | /* channel 1 */ {
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| 194 | /* mode */ PWM_OUTPUT_ACTIVE_HIGH,
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| 195 | /* callback */ NULL |
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| 196 | }, |
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| 197 | /* channel 2 */ {
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| 198 | /* mode */ PWM_OUTPUT_DISABLED,
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| 199 | /* callback */ NULL |
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| 200 | }, |
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| 201 | /* channel 3 */ {
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| 202 | /* mode */ PWM_OUTPUT_DISABLED,
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| 203 | /* callback */ NULL |
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| 204 | }, |
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| 205 | }, |
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| 206 | /* TIM CR2 register */ 0, |
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| 207 | #if STM32_PWM_USE_ADVANCED
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| 208 | /* TIM BDTR register */ 0, |
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| 209 | #endif
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| 210 | /* TIM DIER register */ 0, |
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| 211 | }; |
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| 212 | |||
| 213 | SerialConfig moduleHalProgIfConfig = {
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| 214 | /* bit rate */ 115200, |
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| 215 | /* CR1 */ 0, |
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| 216 | /* CR1 */ 0, |
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| 217 | /* CR1 */ 0, |
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| 218 | }; |
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| 219 | |||
| 220 | /** @} */
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| 221 | |||
| 222 | /*===========================================================================*/
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| 223 | /**
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| 224 | * @name GPIO definitions
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| 225 | * @{
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| 226 | */
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| 227 | /*===========================================================================*/
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| 228 | |||
| 229 | apalGpio_t moduleGpioSysRegEn = {
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| 230 | /* port */ GPIOA,
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| 231 | /* pad */ GPIOA_SYS_REG_EN,
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| 232 | }; |
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| 233 | |||
| 234 | apalGpio_t moduleGpioIrInt1 = {
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| 235 | /* port */ GPIOB,
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| 236 | /* pad */ GPIOB_IR_INT1_N,
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| 237 | }; |
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| 238 | |||
| 239 | apalGpio_t moduleGpioPowerEn = {
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| 240 | /* port */ GPIOB,
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| 241 | /* pad */ GPIOB_POWER_EN,
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| 242 | }; |
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| 243 | |||
| 244 | apalGpio_t moduleGpioSysUartDn = {
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| 245 | /* port */ GPIOB,
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| 246 | /* pad */ GPIOB_SYS_UART_DN,
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| 247 | }; |
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| 248 | |||
| 249 | apalGpio_t moduleGpioChargeStat2A = {
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| 250 | /* port */ GPIOB,
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| 251 | /* pad */ GPIOB_CHARGE_STAT2A,
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