amiro-os / modules / STM32L476RG-NUCLEO64 / board.c @ ae448fac
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#include "hal.h" |
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#include "stm32_gpio.h" |
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/**
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* @brief Type of STM32 GPIO port setup.
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*/
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typedef struct { |
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uint32_t moder; |
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uint32_t otyper; |
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uint32_t ospeedr; |
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uint32_t pupdr; |
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uint32_t odr; |
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uint32_t afrl; |
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uint32_t afrh; |
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uint32_t ascr; |
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uint32_t lockr; |
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} gpio_setup_t; |
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/**
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* @brief Type of STM32 GPIO initialization data.
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*/
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typedef struct { |
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#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
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gpio_setup_t PAData; |
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#endif
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#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
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gpio_setup_t PBData; |
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#endif
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#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
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gpio_setup_t PCData; |
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#endif
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#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
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gpio_setup_t PDData; |
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#endif
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#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
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gpio_setup_t PEData; |
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#endif
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#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
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gpio_setup_t PFData; |
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#endif
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#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
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gpio_setup_t PGData; |
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#endif
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#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
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gpio_setup_t PHData; |
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#endif
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#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
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gpio_setup_t PIData; |
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#endif
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#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
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gpio_setup_t PJData; |
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#endif
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#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
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gpio_setup_t PKData; |
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#endif
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} gpio_config_t; |
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/**
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* @brief STM32 GPIO static initialization data.
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*/
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static const gpio_config_t gpio_default_config = { |
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#if STM32_HAS_GPIOA
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, |
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_ASCR, |
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VAL_GPIOA_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOB
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, |
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_ASCR, |
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VAL_GPIOB_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOC
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, |
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_ASCR, |
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VAL_GPIOC_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOD
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, |
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_ASCR, |
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VAL_GPIOD_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOE
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, |
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_ASCR, |
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VAL_GPIOE_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOF
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, |
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_ASCR, |
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VAL_GPIOF_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOG
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, |
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_ASCR, |
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VAL_GPIOG_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOH
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, |
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_ASCR, |
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VAL_GPIOH_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOI
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, |
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VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_ASCR, |
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VAL_GPIOI_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOJ
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{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, |
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VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_ASCR, |
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VAL_GPIOJ_LOCKR}, |
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#endif
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#if STM32_HAS_GPIOK
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{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, |
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VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_ASCR, |
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VAL_GPIOK_LOCKR} |
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#endif
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}; |
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { |
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gpiop->OTYPER = config->otyper; |
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gpiop->ASCR = config->ascr; |
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gpiop->OSPEEDR = config->ospeedr; |
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gpiop->PUPDR = config->pupdr; |
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gpiop->ODR = config->odr; |
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gpiop->AFRL = config->afrl; |
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gpiop->AFRH = config->afrh; |
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gpiop->MODER = config->moder; |
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gpiop->LOCKR = config->lockr; |
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} |
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static void stm32_gpio_init(void) { |
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/* Enabling GPIO-related clocks, the mask comes from the
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registry header file.*/
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rccResetAHB2(STM32_GPIO_EN_MASK); |
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rccEnableAHB2(STM32_GPIO_EN_MASK, true);
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/* Initializing all the defined GPIO ports.*/
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#if STM32_HAS_GPIOA
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gpio_init(GPIOA, &gpio_default_config.PAData); |
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#endif
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#if STM32_HAS_GPIOB
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gpio_init(GPIOB, &gpio_default_config.PBData); |
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#endif
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#if STM32_HAS_GPIOC
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gpio_init(GPIOC, &gpio_default_config.PCData); |
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#endif
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#if STM32_HAS_GPIOD
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gpio_init(GPIOD, &gpio_default_config.PDData); |
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#endif
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#if STM32_HAS_GPIOE
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gpio_init(GPIOE, &gpio_default_config.PEData); |
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#endif
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#if STM32_HAS_GPIOF
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gpio_init(GPIOF, &gpio_default_config.PFData); |
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#endif
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#if STM32_HAS_GPIOG
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gpio_init(GPIOG, &gpio_default_config.PGData); |
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#endif
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#if STM32_HAS_GPIOH
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gpio_init(GPIOH, &gpio_default_config.PHData); |
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#endif
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#if STM32_HAS_GPIOI
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gpio_init(GPIOI, &gpio_default_config.PIData); |
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#endif
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#if STM32_HAS_GPIOJ
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gpio_init(GPIOJ, &gpio_default_config.PJData); |
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#endif
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#if STM32_HAS_GPIOK
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gpio_init(GPIOK, &gpio_default_config.PKData); |
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#endif
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} |
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Early initialization code.
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* @details GPIO ports and system clocks are initialized before everything
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* else.
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*/
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void __early_init(void) { |
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stm32_gpio_init(); |
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stm32_clock_init(); |
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} |
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#if HAL_USE_SDC || defined(__DOXYGEN__)
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/**
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* @brief SDC card detection.
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*/
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bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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(void)sdcp;
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/* TODO: Fill the implementation.*/
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return true; |
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} |
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/**
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* @brief SDC card write protection detection.
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*/
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bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
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(void)sdcp;
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/* TODO: Fill the implementation.*/
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return false; |
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} |
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#endif /* HAL_USE_SDC */ |
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#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
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/**
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* @brief MMC_SPI card detection.
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*/
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bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return true; |
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} |
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/**
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* @brief MMC_SPI card write protection detection.
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*/
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bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return false; |
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} |
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#endif
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/**
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* @brief Board-specific initialization code.
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* @todo Add your board-specific code, if any.
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*/
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void boardInit(void) { |
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} |