Revision b010278f
| modules/PowerManagement_1-1/alldconf.h | ||
|---|---|---|
| 60 | 60 |
* @brief Enable flag for the BQ27500 fuel gauge. |
| 61 | 61 |
*/ |
| 62 | 62 |
#define AMIROLLD_CFG_BQ27500 1 |
| 63 |
#define BQ27500_LLD_HWVERSION 120 |
|
| 63 | 64 |
|
| 64 | 65 |
/** |
| 65 | 66 |
* @brief Enable flag for the INA219 power monitor. |
| modules/PowerManagement_1-2/Makefile | ||
|---|---|---|
| 1 |
################################################################################ |
|
| 2 |
# AMiRo-OS is an operating system designed for the Autonomous Mini Robot # |
|
| 3 |
# (AMiRo) platform. # |
|
| 4 |
# Copyright (C) 2016..2019 Thomas Schöpping et al. # |
|
| 5 |
# # |
|
| 6 |
# This program is free software: you can redistribute it and/or modify # |
|
| 7 |
# it under the terms of the GNU General Public License as published by # |
|
| 8 |
# the Free Software Foundation, either version 3 of the License, or # |
|
| 9 |
# (at your option) any later version. # |
|
| 10 |
# # |
|
| 11 |
# This program is distributed in the hope that it will be useful, # |
|
| 12 |
# but WITHOUT ANY WARRANTY; without even the implied warranty of # |
|
| 13 |
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # |
|
| 14 |
# GNU General Public License for more details. # |
|
| 15 |
# # |
|
| 16 |
# You should have received a copy of the GNU General Public License # |
|
| 17 |
# along with this program. If not, see <http://www.gnu.org/licenses/>. # |
|
| 18 |
# # |
|
| 19 |
# This research/work was supported by the Cluster of Excellence Cognitive # |
|
| 20 |
# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is # |
|
| 21 |
# funded by the German Research Foundation (DFG). # |
|
| 22 |
################################################################################ |
|
| 23 |
|
|
| 24 |
|
|
| 25 |
|
|
| 26 |
################################################################################ |
|
| 27 |
# Build global options # |
|
| 28 |
# NOTE: Can be overridden externally. # |
|
| 29 |
# # |
|
| 30 |
|
|
| 31 |
# Compiler options here. |
|
| 32 |
ifeq ($(USE_OPT),) |
|
| 33 |
USE_OPT = -O2 -fstack-usage |
|
| 34 |
endif |
|
| 35 |
|
|
| 36 |
# C specific options here (added to USE_OPT). |
|
| 37 |
ifeq ($(USE_COPT),) |
|
| 38 |
USE_COPT = -std=c17 |
|
| 39 |
endif |
|
| 40 |
|
|
| 41 |
# C++ specific options here (added to USE_OPT). |
|
| 42 |
ifeq ($(USE_CPPOPT),) |
|
| 43 |
USE_CPPOPT = -fno-rtti -std=c++17 |
|
| 44 |
endif |
|
| 45 |
|
|
| 46 |
# Enable this if you want the linker to remove unused code and data. |
|
| 47 |
ifeq ($(USE_LINK_GC),) |
|
| 48 |
USE_LINK_GC = yes |
|
| 49 |
endif |
|
| 50 |
|
|
| 51 |
# Linker extra options here. |
|
| 52 |
ifeq ($(USE_LDOPT),) |
|
| 53 |
USE_LDOPT = |
|
| 54 |
endif |
|
| 55 |
|
|
| 56 |
# Enable this if you want link time optimizations (LTO). |
|
| 57 |
ifeq ($(USE_LTO),) |
|
| 58 |
USE_LTO = yes |
|
| 59 |
endif |
|
| 60 |
|
|
| 61 |
# Enable this if you want to see the full log while compiling. |
|
| 62 |
ifeq ($(USE_VERBOSE_COMPILE),) |
|
| 63 |
USE_VERBOSE_COMPILE = no |
|
| 64 |
endif |
|
| 65 |
|
|
| 66 |
# If enabled, this option makes the build process faster by not compiling |
|
| 67 |
# modules not used in the current configuration. |
|
| 68 |
ifeq ($(USE_SMART_BUILD),) |
|
| 69 |
USE_SMART_BUILD = no |
|
| 70 |
endif |
|
| 71 |
|
|
| 72 |
# # |
|
| 73 |
# Build global options # |
|
| 74 |
################################################################################ |
|
| 75 |
|
|
| 76 |
################################################################################ |
|
| 77 |
# Architecture or project specific options # |
|
| 78 |
# # |
|
| 79 |
|
|
| 80 |
# Stack size to be allocated to the Cortex-M process stack. This stack is |
|
| 81 |
# the stack used by the main() thread. |
|
| 82 |
ifeq ($(USE_PROCESS_STACKSIZE),) |
|
| 83 |
USE_PROCESS_STACKSIZE = 0x400 |
|
| 84 |
endif |
|
| 85 |
|
|
| 86 |
# Stack size to the allocated to the Cortex-M main/exceptions stack. This |
|
| 87 |
# stack is used for processing interrupts and exceptions. |
|
| 88 |
ifeq ($(USE_EXCEPTIONS_STACKSIZE),) |
|
| 89 |
USE_EXCEPTIONS_STACKSIZE = 0x400 |
|
| 90 |
endif |
|
| 91 |
|
|
| 92 |
# Enables the use of FPU. |
|
| 93 |
# Possible selections are: |
|
| 94 |
# no - no FPU is used (probably equals 'soft') |
|
| 95 |
# soft - does not use the FPU, thus all floating point operations are emulated |
|
| 96 |
# softfp - uses the FPU, but uses the integer registers only |
|
| 97 |
# hard - uses the FPU and passes data via the FPU registers |
|
| 98 |
ifeq ($(USE_FPU),) |
|
| 99 |
USE_FPU = softfp |
|
| 100 |
endif |
|
| 101 |
|
|
| 102 |
# FPU-related options. |
|
| 103 |
ifeq ($(USE_FPU_OPT),) |
|
| 104 |
USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 |
|
| 105 |
endif |
|
| 106 |
|
|
| 107 |
# # |
|
| 108 |
# Architecture or project specific options # |
|
| 109 |
################################################################################ |
|
| 110 |
|
|
| 111 |
################################################################################ |
|
| 112 |
# Project, target, sources and paths # |
|
| 113 |
# # |
|
| 114 |
|
|
| 115 |
# Absolute path to the project |
|
| 116 |
PROJECT_PATH := $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))) |
|
| 117 |
|
|
| 118 |
# Define project name here |
|
| 119 |
PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(PROJECT_PATH)) |
|
| 120 |
|
|
| 121 |
# Target settings. |
|
| 122 |
MCU = cortex-m4 |
|
| 123 |
|
|
| 124 |
# Imported source files and paths. |
|
| 125 |
include ../../kernel/kernel.mk |
|
| 126 |
CHIBIOS := $(AMIROOS_KERNEL) |
|
| 127 |
CONFDIR := . |
|
| 128 |
ifeq ($(BUILDDIR),) |
|
| 129 |
BUILDDIR := $(PROJECT_PATH)/build |
|
| 130 |
endif |
|
| 131 |
DEPDIR := $(dir $(BUILDDIR)).dep |
|
| 132 |
AMIROOS := ../.. |
|
| 133 |
# Licensing files. |
|
| 134 |
include $(CHIBIOS)/os/license/license.mk |
|
| 135 |
# Startup files. |
|
| 136 |
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk |
|
| 137 |
# HAL-OSAL files (optional). |
|
| 138 |
include $(CHIBIOS)/os/hal/hal.mk |
|
| 139 |
include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk |
|
| 140 |
include $(CHIBIOS)/os/hal/osal/rt/osal.mk |
|
| 141 |
include $(CHIBIOS)/os/hal/lib/streams/streams.mk |
|
| 142 |
# RTOS files (optional). |
|
| 143 |
include $(CHIBIOS)/os/rt/rt.mk |
|
| 144 |
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk |
|
| 145 |
# Auto-build files in ./source recursively. |
|
| 146 |
include $(CHIBIOS)/tools/mk/autobuild.mk |
|
| 147 |
# Other files (optional). |
|
| 148 |
include $(CHIBIOS)/test/lib/test.mk |
|
| 149 |
include $(CHIBIOS)/test/rt/rt_test.mk |
|
| 150 |
include $(CHIBIOS)/test/oslib/oslib_test.mk |
|
| 151 |
# AMiRo-BLT files |
|
| 152 |
include ../../bootloader/bootloader.mk |
|
| 153 |
# AMiRo-LLD files |
|
| 154 |
include ../../periphery-lld/periphery-lld.mk |
|
| 155 |
# AMiRo-OS files |
|
| 156 |
include ../modules.mk |
|
| 157 |
include $(AMIROOS)/core/core.mk |
|
| 158 |
include $(AMIROOS)/unittests/unittests.mk |
|
| 159 |
|
|
| 160 |
# Define linker script file here |
|
| 161 |
LDSCRIPT= STM32F405xG.ld |
|
| 162 |
|
|
| 163 |
# C sources that can be compiled in ARM or THUMB mode depending on the global |
|
| 164 |
# setting. |
|
| 165 |
CSRC = $(ALLCSRC) \ |
|
| 166 |
$(CHIBIOS)/os/various/syscalls.c \ |
|
| 167 |
$(CHIBIOS)/os/various/evtimer.c \ |
|
| 168 |
$(TESTSRC) \ |
|
| 169 |
board.c \ |
|
| 170 |
$(PERIPHERYLLDCSRC) \ |
|
| 171 |
$(UNITTESTSCSRC) \ |
|
| 172 |
$(AMIROOSCORECSRC) \ |
|
| 173 |
$(MODULESCSRC) \ |
|
| 174 |
module.c \ |
|
| 175 |
$(APPSCSRC) |
|
| 176 |
|
|
| 177 |
# C++ sources that can be compiled in ARM or THUMB mode depending on the global |
|
| 178 |
# setting. |
|
| 179 |
CPPSRC = $(ALLCPPSRC) \ |
|
| 180 |
$(CHIBIOS)/os/various/cpp_wrappers/syscalls_cpp.cpp \ |
|
| 181 |
$(AMIROOSCORECPPSRC) \ |
|
| 182 |
$(APPSCPPSRC) |
|
| 183 |
|
|
| 184 |
# List ASM source files here. |
|
| 185 |
ASMSRC = $(ALLASMSRC) \ |
|
| 186 |
$(APPSASMSRC) |
|
| 187 |
|
|
| 188 |
# List ASM with preprocessor source files here. |
|
| 189 |
ASMXSRC = $(ALLXASMSRC) \ |
|
| 190 |
$(APPSASMXSRC) |
|
| 191 |
|
|
| 192 |
# Inclusion directories. |
|
| 193 |
INCDIR = $(CONFDIR) \ |
|
| 194 |
$(ALLINC) \ |
|
| 195 |
$(TESTINC) \ |
|
| 196 |
$(CHIBIOS)/os/hal/lib/streams \ |
|
| 197 |
$(BOOTLOADERINC) \ |
|
| 198 |
$(PERIPHERYLLDINC) \ |
|
| 199 |
$(AMIROOS) \ |
|
| 200 |
$(UNITTESTSINC) \ |
|
| 201 |
$(AMIROOSCOREINC) \ |
|
| 202 |
$(MODULESINC) \ |
|
| 203 |
$(APPSINC) |
|
| 204 |
|
|
| 205 |
# Define C warning options here. |
|
| 206 |
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes |
|
| 207 |
|
|
| 208 |
# Define C++ warning options here. |
|
| 209 |
CPPWARN = -Wall -Wextra -Wundef |
|
| 210 |
|
|
| 211 |
# Create an additional .srec image file. |
|
| 212 |
SREC = $(CP) -O srec --srec-len=248 |
|
| 213 |
|
|
| 214 |
# # |
|
| 215 |
# Project, target, sources and paths # |
|
| 216 |
################################################################################ |
|
| 217 |
|
|
| 218 |
################################################################################ |
|
| 219 |
# Start of user section # |
|
| 220 |
# # |
|
| 221 |
|
|
| 222 |
# List all user C define here, like -D_DEBUG=1 |
|
| 223 |
UDEFS += |
|
| 224 |
|
|
| 225 |
# Define ASM defines here |
|
| 226 |
UADEFS += |
|
| 227 |
|
|
| 228 |
# List all user directories here |
|
| 229 |
UINCDIR += |
|
| 230 |
|
|
| 231 |
# List the user directory to look for the libraries here |
|
| 232 |
ULIBDIR += |
|
| 233 |
|
|
| 234 |
# List all user libraries here |
|
| 235 |
ULIBS += |
|
| 236 |
|
|
| 237 |
# # |
|
| 238 |
# End of user section # |
|
| 239 |
################################################################################ |
|
| 240 |
|
|
| 241 |
################################################################################ |
|
| 242 |
# Common rules # |
|
| 243 |
# # |
|
| 244 |
|
|
| 245 |
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk |
|
| 246 |
include $(RULESPATH)/arm-none-eabi.mk |
|
| 247 |
include $(RULESPATH)/rules.mk |
|
| 248 |
|
|
| 249 |
# # |
|
| 250 |
# Common rules # |
|
| 251 |
################################################################################ |
|
| 252 |
|
|
| 253 |
################################################################################ |
|
| 254 |
# Custom rules # |
|
| 255 |
# # |
|
| 256 |
|
|
| 257 |
FLASH_MODULES = $(PROJECT) |
|
| 258 |
FLASH_FILES = $(BUILDDIR)/$(PROJECT).$(FLASHTOOL_EXT) |
|
| 259 |
|
|
| 260 |
flash: $(FLASH_FILES) |
|
| 261 |
$(info ) |
|
| 262 |
ifeq ($(FLASHTOOL),SerialBoot) |
|
| 263 |
$(info Flashing ($(FLASHTOOL)):) |
|
| 264 |
$(FLASHTOOL_CMD) $(FLASHTOOL_ARGS) |
|
| 265 |
else |
|
| 266 |
$(info ERROR: unable to flash the module (SerialBoot unavailable)) |
|
| 267 |
endif |
|
| 268 |
|
|
| 269 |
# # |
|
| 270 |
# Custom rules # |
|
| 271 |
################################################################################ |
|
| 272 |
|
|
| modules/PowerManagement_1-2/STM32F405xG.ld | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/* |
|
| 20 |
* STM32F405xG memory setup. |
|
| 21 |
* Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. |
|
| 22 |
*/ |
|
| 23 |
MEMORY |
|
| 24 |
{
|
|
| 25 |
flash0 : org = 0x08008000, len = 1M-32k |
|
| 26 |
flash1 : org = 0x00000000, len = 0 |
|
| 27 |
flash2 : org = 0x00000000, len = 0 |
|
| 28 |
flash3 : org = 0x00000000, len = 0 |
|
| 29 |
flash4 : org = 0x00000000, len = 0 |
|
| 30 |
flash5 : org = 0x00000000, len = 0 |
|
| 31 |
flash6 : org = 0x00000000, len = 0 |
|
| 32 |
flash7 : org = 0x00000000, len = 0 |
|
| 33 |
ram0 : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ |
|
| 34 |
ram1 : org = 0x20000000, len = 112k /* SRAM1 */ |
|
| 35 |
ram2 : org = 0x2001C000, len = 16k /* SRAM2 */ |
|
| 36 |
ram3 : org = 0x00000000, len = 0 |
|
| 37 |
ram4 : org = 0x10000000, len = 64k /* CCM SRAM */ |
|
| 38 |
ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */ |
|
| 39 |
ram6 : org = 0x00000000, len = 0 |
|
| 40 |
ram7 : org = 0x00000000, len = 0 |
|
| 41 |
} |
|
| 42 |
|
|
| 43 |
/* For each data/text section two region are defined, a virtual region |
|
| 44 |
and a load region (_LMA suffix).*/ |
|
| 45 |
|
|
| 46 |
/* Flash region to be used for exception vectors.*/ |
|
| 47 |
REGION_ALIAS("VECTORS_FLASH", flash0);
|
|
| 48 |
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
|
|
| 49 |
|
|
| 50 |
/* Flash region to be used for constructors and destructors.*/ |
|
| 51 |
REGION_ALIAS("XTORS_FLASH", flash0);
|
|
| 52 |
REGION_ALIAS("XTORS_FLASH_LMA", flash0);
|
|
| 53 |
|
|
| 54 |
/* Flash region to be used for code text.*/ |
|
| 55 |
REGION_ALIAS("TEXT_FLASH", flash0);
|
|
| 56 |
REGION_ALIAS("TEXT_FLASH_LMA", flash0);
|
|
| 57 |
|
|
| 58 |
/* Flash region to be used for read only data.*/ |
|
| 59 |
REGION_ALIAS("RODATA_FLASH", flash0);
|
|
| 60 |
REGION_ALIAS("RODATA_FLASH_LMA", flash0);
|
|
| 61 |
|
|
| 62 |
/* Flash region to be used for various.*/ |
|
| 63 |
REGION_ALIAS("VARIOUS_FLASH", flash0);
|
|
| 64 |
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
|
|
| 65 |
|
|
| 66 |
/* Flash region to be used for RAM(n) initialization data.*/ |
|
| 67 |
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
|
|
| 68 |
|
|
| 69 |
/* RAM region to be used for Main stack. This stack accommodates the processing |
|
| 70 |
of all exceptions and interrupts.*/ |
|
| 71 |
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
|
| 72 |
|
|
| 73 |
/* RAM region to be used for the process stack. This is the stack used by |
|
| 74 |
the main() function.*/ |
|
| 75 |
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
|
|
| 76 |
|
|
| 77 |
/* RAM region to be used for data segment.*/ |
|
| 78 |
REGION_ALIAS("DATA_RAM", ram0);
|
|
| 79 |
REGION_ALIAS("DATA_RAM_LMA", flash0);
|
|
| 80 |
|
|
| 81 |
/* RAM region to be used for BSS segment.*/ |
|
| 82 |
REGION_ALIAS("BSS_RAM", ram0);
|
|
| 83 |
|
|
| 84 |
/* RAM region to be used for the default heap.*/ |
|
| 85 |
REGION_ALIAS("HEAP_RAM", ram0);
|
|
| 86 |
|
|
| 87 |
/* Generic rules inclusion.*/ |
|
| 88 |
INCLUDE rules.ld |
|
| modules/PowerManagement_1-2/alldconf.h | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/** |
|
| 20 |
* @file |
|
| 21 |
* @brief AMiRo-LLD configuration file for the PowerManagement v1.2 module. |
|
| 22 |
* @details Contains the application specific AMiRo-LLD settings. |
|
| 23 |
* |
|
| 24 |
* @addtogroup powermanagement_lld_config |
|
| 25 |
* @{
|
|
| 26 |
*/ |
|
| 27 |
|
|
| 28 |
#ifndef ALLDCONF_H |
|
| 29 |
#define ALLDCONF_H |
|
| 30 |
|
|
| 31 |
/* |
|
| 32 |
* compatibility guards |
|
| 33 |
*/ |
|
| 34 |
#define _AMIRO_LLD_CFG_ |
|
| 35 |
#define AMIRO_LLD_CFG_VERSION_MAJOR 1 |
|
| 36 |
#define AMIRO_LLD_CFG_VERSION_MINOR 0 |
|
| 37 |
|
|
| 38 |
/** |
|
| 39 |
* @brief Width of the apalTime_t data type. |
|
| 40 |
* |
|
| 41 |
* @details Possible values are 8, 16, 32, and 64 bits. |
|
| 42 |
* By definition time is represented at microsecond precision. |
|
| 43 |
*/ |
|
| 44 |
#define AMIROLLD_CFG_TIME_SIZE 32 |
|
| 45 |
|
|
| 46 |
// required to differentiate between various sensor rings |
|
| 47 |
#include <board.h> |
|
| 48 |
|
|
| 49 |
/** |
|
| 50 |
* @brief Enable flag for the AT24C01BN-SH-B EEPROM. |
|
| 51 |
*/ |
|
| 52 |
#define AMIROLLD_CFG_AT24C01B 1 |
|
| 53 |
|
|
| 54 |
/** |
|
| 55 |
* @brief Enable flag for the BQ24103A charger. |
|
| 56 |
*/ |
|
| 57 |
#define AMIROLLD_CFG_BQ241xx 1 |
|
| 58 |
|
|
| 59 |
/** |
|
| 60 |
* @brief Enable flag for the BQ27500 fuel gauge. |
|
| 61 |
*/ |
|
| 62 |
#define AMIROLLD_CFG_BQ27500 1 |
|
| 63 |
#define BQ27500_LLD_HWVERSION 130 |
|
| 64 |
|
|
| 65 |
/** |
|
| 66 |
* @brief Enable flag for the INA219 power monitor. |
|
| 67 |
*/ |
|
| 68 |
#define AMIROLLD_CFG_INA219 1 |
|
| 69 |
|
|
| 70 |
/** |
|
| 71 |
* @brief Enable flag for the status LED. |
|
| 72 |
*/ |
|
| 73 |
#define AMIROLLD_CFG_LED 1 |
|
| 74 |
|
|
| 75 |
/** |
|
| 76 |
* @brief Enable flag for the PKLCS1212E4001 buzzer. |
|
| 77 |
*/ |
|
| 78 |
#define AMIROLLD_CFG_PKxxxExxx 1 |
|
| 79 |
#define PKxxxExxx_LLD_FREQUENCY_MIN 2000 |
|
| 80 |
#define PKxxxExxx_LLD_FREQUENCY_SPEC 4000 |
|
| 81 |
#define PKxxxExxx_LLD_FREQUENCY_MAX 6000 |
|
| 82 |
|
|
| 83 |
/** |
|
| 84 |
* @brief Enable flag for the TPS2051BDBV power switch. |
|
| 85 |
*/ |
|
| 86 |
#define AMIROLLD_CFG_TPS20xxB 1 |
|
| 87 |
|
|
| 88 |
/** |
|
| 89 |
* @brief Enable flag for the TPS62113 step-down converter. |
|
| 90 |
*/ |
|
| 91 |
#define AMIROLLD_CFG_TPS6211x 1 |
|
| 92 |
|
|
| 93 |
#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__) |
|
| 94 |
|
|
| 95 |
/** |
|
| 96 |
* @brief Enable flag for the MPR121 touch sensor. |
|
| 97 |
*/ |
|
| 98 |
#define AMIROLLD_CFG_MPR121 1 |
|
| 99 |
|
|
| 100 |
/** |
|
| 101 |
* @brief Enable flag for the PCA9544A I2C multiplexer. |
|
| 102 |
*/ |
|
| 103 |
#define AMIROLLD_CFG_PCA9544A 1 |
|
| 104 |
|
|
| 105 |
/** |
|
| 106 |
* @brief Enable flag for the VCNL4020 proximity sensor. |
|
| 107 |
*/ |
|
| 108 |
#define AMIROLLD_CFG_VCNL4020 1 |
|
| 109 |
|
|
| 110 |
#endif /* (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) */ |
|
| 111 |
|
|
| 112 |
#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__) |
|
| 113 |
|
|
| 114 |
/** |
|
| 115 |
* @brief Enable flag for the PCAL6524 GPIO extender |
|
| 116 |
*/ |
|
| 117 |
#define AMIROLLD_CFG_PCAL6524 1 |
|
| 118 |
|
|
| 119 |
/** |
|
| 120 |
* @brief Enable flag for the AT42Q1050 touch sensor. |
|
| 121 |
*/ |
|
| 122 |
#define AMIROLLD_CFG_AT42QT1050 1 |
|
| 123 |
|
|
| 124 |
#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */ |
|
| 125 |
|
|
| 126 |
#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__) |
|
| 127 |
|
|
| 128 |
/** |
|
| 129 |
* @brief Enable flag for the PCAL6524 GPIO extender |
|
| 130 |
*/ |
|
| 131 |
#define AMIROLLD_CFG_PCAL6524 1 |
|
| 132 |
|
|
| 133 |
/** |
|
| 134 |
* @brief Enable flag for the AT42Q1050 touch sensor. |
|
| 135 |
*/ |
|
| 136 |
#define AMIROLLD_CFG_AT42QT1050 1 |
|
| 137 |
|
|
| 138 |
#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) */ |
|
| 139 |
|
|
| 140 |
#endif /* ALLDCONF_H */ |
|
| 141 |
|
|
| 142 |
/** @} */ |
|
| modules/PowerManagement_1-2/aosconf.h | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/** |
|
| 20 |
* @file |
|
| 21 |
* @brief AMiRo-OS Configuration file for the PowerManagement v1.2 module. |
|
| 22 |
* @details Contains the application specific AMiRo-OS settings. |
|
| 23 |
* |
|
| 24 |
* @addtogroup powermanagement_aos_config |
|
| 25 |
* @{
|
|
| 26 |
*/ |
|
| 27 |
|
|
| 28 |
#ifndef AOSCONF_H |
|
| 29 |
#define AOSCONF_H |
|
| 30 |
|
|
| 31 |
/* |
|
| 32 |
* compatibility guards |
|
| 33 |
*/ |
|
| 34 |
#define _AMIRO_OS_CFG_ |
|
| 35 |
#define AMIRO_OS_CFG_VERSION_MAJOR 2 |
|
| 36 |
#define AMIRO_OS_CFG_VERSION_MINOR 0 |
|
| 37 |
|
|
| 38 |
#include <stdbool.h> |
|
| 39 |
|
|
| 40 |
/* |
|
| 41 |
* Include an external configuration file to override the following default settings only if required. |
|
| 42 |
*/ |
|
| 43 |
#if defined(AMIRO_APPS) && (AMIRO_APPS == true) |
|
| 44 |
#include <osconf.h> |
|
| 45 |
#endif /* defined(AMIRO_APPS) && (AMIRO_APPS == true) */ |
|
| 46 |
|
|
| 47 |
/*===========================================================================*/ |
|
| 48 |
/** |
|
| 49 |
* @name Kernel parameters and options |
|
| 50 |
* @{
|
|
| 51 |
*/ |
|
| 52 |
/*===========================================================================*/ |
|
| 53 |
|
|
| 54 |
/** |
|
| 55 |
* @brief Flag to enable/disable debug API and logic. |
|
| 56 |
*/ |
|
| 57 |
#if !defined(OS_CFG_DBG) |
|
| 58 |
#define AMIROOS_CFG_DBG true |
|
| 59 |
#else /* !defined(OS_CFG_DBG) */ |
|
| 60 |
#define AMIROOS_CFG_DBG OS_CFG_DBG |
|
| 61 |
#endif /* !defined(OS_CFG_DBG) */ |
|
| 62 |
|
|
| 63 |
/** |
|
| 64 |
* @brief Flag to enable/disable unit tests. |
|
| 65 |
* @note Setting this flag will implicitely enable the shell. |
|
| 66 |
*/ |
|
| 67 |
#if !defined(OS_CFG_TESTS_ENABLE) |
|
| 68 |
#define AMIROOS_CFG_TESTS_ENABLE true |
|
| 69 |
#else /* !defined(OS_CFG_TESTS_ENABLE) */ |
|
| 70 |
#define AMIROOS_CFG_TESTS_ENABLE OS_CFG_TESTS_ENABLE |
|
| 71 |
#endif /* !defined(OS_CFG_TESTS_ENABLE) */ |
|
| 72 |
|
|
| 73 |
/** |
|
| 74 |
* @brief Flag to enable/disable profiling API and logic. |
|
| 75 |
*/ |
|
| 76 |
#if !defined(OS_CFG_PROFILE) |
|
| 77 |
#define AMIROOS_CFG_PROFILE true |
|
| 78 |
#else /* !defined(OS_CFG_PROFILE) */ |
|
| 79 |
#define AMIROOS_CFG_PROFILE OS_CFG_PROFILE |
|
| 80 |
#endif /* !defined(OS_CFG_PROFILE) */ |
|
| 81 |
|
|
| 82 |
/** |
|
| 83 |
* @brief Mask for the control thread to listen to certain IO events. |
|
| 84 |
* @note Any mandatory events (e.g. for SSSP) are enabled implicitely despite this configuration. |
|
| 85 |
*/ |
|
| 86 |
#if !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK) |
|
| 87 |
#define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK 0 |
|
| 88 |
#else /* !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK) */ |
|
| 89 |
#define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK OS_CFG_MAIN_LOOP_IOEVENT_MASK |
|
| 90 |
#endif /* !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK) */ |
|
| 91 |
|
|
| 92 |
/** |
|
| 93 |
* @brief Timeout value when waiting for events in the main loop in microseconds. |
|
| 94 |
* @details A value of 0 deactivates the timeout. |
|
| 95 |
*/ |
|
| 96 |
#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT) |
|
| 97 |
#define AMIROOS_CFG_MAIN_LOOP_TIMEOUT 0 |
|
| 98 |
#else /* !defined(OS_CFG_MAIN_LOOP_TIMEOUT) */ |
|
| 99 |
#define AMIROOS_CFG_MAIN_LOOP_TIMEOUT OS_CFG_MAIN_LOOP_TIMEOUT |
|
| 100 |
#endif /* !defined(OS_CFG_MAIN_LOOP_TIMEOUT) */ |
|
| 101 |
|
|
| 102 |
/** @} */ |
|
| 103 |
|
|
| 104 |
/*===========================================================================*/ |
|
| 105 |
/** |
|
| 106 |
* @name SSSP (Startup Shutdown Synchronization Protocol) configuration. |
|
| 107 |
* @{
|
|
| 108 |
*/ |
|
| 109 |
/*===========================================================================*/ |
|
| 110 |
|
|
| 111 |
/** |
|
| 112 |
* @brief Flag to enable SSSP. |
|
| 113 |
*/ |
|
| 114 |
#if !defined(OS_CFG_SSSP_ENABLE) |
|
| 115 |
#define AMIROOS_CFG_SSSP_ENABLE true |
|
| 116 |
#else /* !defined(OS_CFG_SSSP_ENABLE) */ |
|
| 117 |
#define AMIROOS_CFG_SSSP_ENABLE OS_CFG_SSSP_ENABLE |
|
| 118 |
#endif /* !defined(OS_CFG_SSSP_ENABLE) */ |
|
| 119 |
|
|
| 120 |
/** |
|
| 121 |
* @brief Flag to set the module as SSSP master. |
|
| 122 |
* @details There must be only one module with this flag set to true in a system. |
|
| 123 |
*/ |
|
| 124 |
#if !defined(OS_CFG_SSSP_MASTER) |
|
| 125 |
#define AMIROOS_CFG_SSSP_MASTER true |
|
| 126 |
#else /* !defined(OS_CFG_SSSP_MASTER) */ |
|
| 127 |
#define AMIROOS_CFG_SSSP_MASTER OS_CFG_SSSP_MASTER |
|
| 128 |
#endif /* !defined(OS_CFG_SSSP_MASTER) */ |
|
| 129 |
|
|
| 130 |
/** |
|
| 131 |
* @brief Flag to set the module to be the first in the stack. |
|
| 132 |
* @details There must be only one module with this flag set to true in a system. |
|
| 133 |
*/ |
|
| 134 |
#if !defined(OS_CFG_SSSP_STACK_START) |
|
| 135 |
#define AMIROOS_CFG_SSSP_STACK_START false |
|
| 136 |
#else /* !defined(OS_CFG_SSSP_STACK_START) */ |
|
| 137 |
#define AMIROOS_CFG_SSSP_STACK_START OS_CFG_SSSP_STACK_START |
|
| 138 |
#endif /* !defined(OS_CFG_SSSP_STACK_START) */ |
|
| 139 |
|
|
| 140 |
/** |
|
| 141 |
* @brief Flag to set the module to be the last in the stack. |
|
| 142 |
* @details There must be only one module with this flag set to true in a system. |
|
| 143 |
*/ |
|
| 144 |
#if !defined(OS_CFG_SSSP_STACK_END) |
|
| 145 |
#define AMIROOS_CFG_SSSP_STACK_END false |
|
| 146 |
#else /* !defined(OS_CFG_SSSP_STACK_END) */ |
|
| 147 |
#define AMIROOS_CFG_SSSP_STACK_END OS_CFG_SSSP_STACK_END |
|
| 148 |
#endif /* !defined(OS_CFG_SSSP_STACK_END) */ |
|
| 149 |
|
|
| 150 |
/** |
|
| 151 |
* @brief Delay time (in microseconds) how long a SSSP signal must be active. |
|
| 152 |
*/ |
|
| 153 |
#if !defined(OS_CFG_SSSP_SIGNALDELAY) |
|
| 154 |
#define AMIROOS_CFG_SSSP_SIGNALDELAY 1000 |
|
| 155 |
#else /* !defined(OS_CFG_SSSP_SIGNALDELAY) */ |
|
| 156 |
#define AMIROOS_CFG_SSSP_SIGNALDELAY OS_CFG_SSSP_SIGNALDELAY |
|
| 157 |
#endif /* !defined(OS_CFG_SSSP_SIGNALDELAY) */ |
|
| 158 |
|
|
| 159 |
/** |
|
| 160 |
* @brief Time boundary for robot wide clock synchronization in microseconds. |
|
| 161 |
* @details Whenever the SSSP S (snychronization) signal gets logically deactivated, |
|
| 162 |
* All modules need to align their local uptime to the nearest multiple of this value. |
|
| 163 |
*/ |
|
| 164 |
#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD) |
|
| 165 |
#define AMIROOS_CFG_SSSP_SYSSYNCPERIOD 1000000 |
|
| 166 |
#else /* !defined(OS_CFG_SSSP_SYSSYNCPERIOD) */ |
|
| 167 |
#define AMIROOS_CFG_SSSP_SYSSYNCPERIOD OS_CFG_SSSP_SYSSYNCPERIOD |
|
| 168 |
#endif /* !defined(OS_CFG_SSSP_SYSSYNCPERIOD) */ |
|
| 169 |
|
|
| 170 |
/** @} */ |
|
| 171 |
|
|
| 172 |
/*===========================================================================*/ |
|
| 173 |
/** |
|
| 174 |
* @name System shell options |
|
| 175 |
* @{
|
|
| 176 |
*/ |
|
| 177 |
/*===========================================================================*/ |
|
| 178 |
|
|
| 179 |
/** |
|
| 180 |
* @brief Shell enable flag. |
|
| 181 |
*/ |
|
| 182 |
#if !defined(OS_CFG_SHELL_ENABLE) |
|
| 183 |
#define AMIROOS_CFG_SHELL_ENABLE true |
|
| 184 |
#else /* !defined(OS_CFG_SHELL_ENABLE) */ |
|
| 185 |
#define AMIROOS_CFG_SHELL_ENABLE OS_CFG_SHELL_ENABLE |
|
| 186 |
#endif /* !defined(OS_CFG_SHELL_ENABLE) */ |
|
| 187 |
|
|
| 188 |
/** |
|
| 189 |
* @brief Shell thread stack size. |
|
| 190 |
*/ |
|
| 191 |
#if !defined(OS_CFG_SHELL_STACKSIZE) |
|
| 192 |
#define AMIROOS_CFG_SHELL_STACKSIZE 1024 |
|
| 193 |
#else /* !defined(OS_CFG_SHELL_STACKSIZE) */ |
|
| 194 |
#define AMIROOS_CFG_SHELL_STACKSIZE OS_CFG_SHELL_STACKSIZE |
|
| 195 |
#endif /* !defined(OS_CFG_SHELL_STACKSIZE) */ |
|
| 196 |
|
|
| 197 |
/** |
|
| 198 |
* @brief Shell thread priority. |
|
| 199 |
* @details Thread priorities are specified as an integer value. |
|
| 200 |
* Predefined ranges are: |
|
| 201 |
* lowest ┌ THD_LOWPRIO_MIN |
|
| 202 |
* │ ... |
|
| 203 |
* └ THD_LOWPRIO_MAX |
|
| 204 |
* ┌ THD_NORMALPRIO_MIN |
|
| 205 |
* │ ... |
|
| 206 |
* └ THD_NORMALPRIO_MAX |
|
| 207 |
* ┌ THD_HIGHPRIO_MIN |
|
| 208 |
* │ ... |
|
| 209 |
* └ THD_HIGHPRIO_MAX |
|
| 210 |
* ┌ THD_RTPRIO_MIN |
|
| 211 |
* │ ... |
|
| 212 |
* highest └ THD_RTPRIO_MAX |
|
| 213 |
*/ |
|
| 214 |
#if !defined(OS_CFG_SHELL_THREADPRIO) |
|
| 215 |
#define AMIROOS_CFG_SHELL_THREADPRIO AOS_THD_NORMALPRIO_MIN |
|
| 216 |
#else /* !defined(OS_CFG_SHELL_THREADPRIO) */ |
|
| 217 |
#define AMIROOS_CFG_SHELL_THREADPRIO OS_CFG_SHELL_THREADPRIO |
|
| 218 |
#endif /* !defined(OS_CFG_SHELL_THREADPRIO) */ |
|
| 219 |
|
|
| 220 |
/** |
|
| 221 |
* @brief Shell maximum input line length. |
|
| 222 |
*/ |
|
| 223 |
#if !defined(OS_CFG_SHELL_LINEWIDTH) |
|
| 224 |
#define AMIROOS_CFG_SHELL_LINEWIDTH 128 |
|
| 225 |
#else /* !defined(OS_CFG_SHELL_LINEWIDTH) */ |
|
| 226 |
#define AMIROOS_CFG_SHELL_LINEWIDTH OS_CFG_SHELL_LINEWIDTH |
|
| 227 |
#endif /* !defined(OS_CFG_SHELL_LINEWIDTH) */ |
|
| 228 |
|
|
| 229 |
/** |
|
| 230 |
* @brief Shell maximum number of arguments. |
|
| 231 |
*/ |
|
| 232 |
#if !defined(OS_CFG_SHELL_MAXARGS) |
|
| 233 |
#define AMIROOS_CFG_SHELL_MAXARGS 16 |
|
| 234 |
#else /* !defined(OS_CFG_SHELL_MAXARGS) */ |
|
| 235 |
#define AMIROOS_CFG_SHELL_MAXARGS OS_CFG_SHELL_MAXARGS |
|
| 236 |
#endif /* !defined(OS_CFG_SHELL_MAXARGS) */ |
|
| 237 |
|
|
| 238 |
/** @} */ |
|
| 239 |
|
|
| 240 |
#endif /* AOSCONF_H */ |
|
| 241 |
|
|
| 242 |
/** @} */ |
|
| modules/PowerManagement_1-2/board.c | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/** |
|
| 20 |
* @file |
|
| 21 |
* @brief PowerManagement v1.2 Board specific initializations. |
|
| 22 |
* |
|
| 23 |
* @addtogroup powermanagement_board |
|
| 24 |
* @{
|
|
| 25 |
*/ |
|
| 26 |
|
|
| 27 |
#include <hal.h> |
|
| 28 |
#include <stm32_gpio.h> |
|
| 29 |
|
|
| 30 |
/** |
|
| 31 |
* @brief GPIO initialization. |
|
| 32 |
* |
|
| 33 |
* @param[in] gpiop GPIO register block. |
|
| 34 |
* @param[in] config GPIO configuration. |
|
| 35 |
*/ |
|
| 36 |
|
|
| 37 |
|
|
| 38 |
|
|
| 39 |
/** |
|
| 40 |
* @brief GPIO initialization. |
|
| 41 |
* |
|
| 42 |
* @param[in] gpiop GPIO register block. |
|
| 43 |
* @param[in] moder Mode register configuration. |
|
| 44 |
* @param[in] otyper Otype register configuration. |
|
| 45 |
* @param[in] ospeedr Ospeed register configuration. |
|
| 46 |
* @param[in] pupdr Pupd register configuration. |
|
| 47 |
* @param[in] odr OD register configuration. |
|
| 48 |
* @param[in] afrl AF register (low) configuration. |
|
| 49 |
* @param[in] afrh AF register (high ) configuration. |
|
| 50 |
* @param[in] ignmask Mask to ignore individual pads. |
|
| 51 |
*/ |
|
| 52 |
static void _gpio_init(stm32_gpio_t *gpiop, |
|
| 53 |
const uint32_t moder, |
|
| 54 |
const uint32_t otyper, |
|
| 55 |
const uint32_t ospeedr, |
|
| 56 |
const uint32_t pupdr, |
|
| 57 |
const uint32_t odr, |
|
| 58 |
const uint32_t afrl, |
|
| 59 |
const uint32_t afrh, |
|
| 60 |
const uint16_t ignmask) {
|
|
| 61 |
|
|
| 62 |
const uint8_t lut[] = {0x00, 0x03, 0x0C, 0x0F,
|
|
| 63 |
0x30, 0x33, 0x3C, 0x3F, |
|
| 64 |
0xC0, 0xC3, 0xCC, 0xCF, |
|
| 65 |
0xF0, 0xF3, 0xFC, 0xFF}; |
|
| 66 |
|
|
| 67 |
/* some bit-magic to fan out the mask */ |
|
| 68 |
const uint32_t ignmask2 = (lut[(ignmask >> 12) ] << 24) | |
|
| 69 |
(lut[(ignmask >> 8) & 0x0F] << 16) | |
|
| 70 |
(lut[(ignmask >> 4) & 0x0F] << 8) | |
|
| 71 |
(lut[(ignmask ) & 0x0F]); |
|
| 72 |
const uint32_t ignmask4_low = (lut[lut[(ignmask >> 6) & 0x03]] << 24) | |
|
| 73 |
(lut[lut[(ignmask >> 4) & 0x03]] << 16) | |
|
| 74 |
(lut[lut[(ignmask >> 2) & 0x03]] << 8) | |
|
| 75 |
(lut[lut[(ignmask ) & 0x03]]); |
|
| 76 |
const uint32_t ignmask4_high = (lut[lut[(ignmask >> 14) ]] << 24) | |
|
| 77 |
(lut[lut[(ignmask >> 12) & 0x03]] << 16) | |
|
| 78 |
(lut[lut[(ignmask >> 10) & 0x03]] << 8) | |
|
| 79 |
(lut[lut[(ignmask >> 8) & 0x03]]); |
|
| 80 |
|
|
| 81 |
gpiop->OTYPER = (gpiop->OTYPER & ignmask ) | (otyper & ~ignmask ); |
|
| 82 |
gpiop->OSPEEDR = (gpiop->OSPEEDR & ignmask2 ) | (ospeedr & ~ignmask2 ); |
|
| 83 |
gpiop->PUPDR = (gpiop->PUPDR & ignmask2 ) | (pupdr & ~ignmask2 ); |
|
| 84 |
gpiop->ODR = (gpiop->ODR & ignmask ) | (odr & ~ignmask ); |
|
| 85 |
gpiop->AFRL = (gpiop->AFRL & ignmask4_low ) | (afrl & ~ignmask4_low ); |
|
| 86 |
gpiop->AFRH = (gpiop->AFRH & ignmask4_high) | (afrh & ~ignmask4_high); |
|
| 87 |
gpiop->MODER = (gpiop->MODER & ignmask2 ) | (moder & ~ignmask2 ); |
|
| 88 |
} |
|
| 89 |
|
|
| 90 |
/** |
|
| 91 |
* @brief GPIO initilization for all ports. |
|
| 92 |
*/ |
|
| 93 |
static void _stm32_gpio_init(void) {
|
|
| 94 |
|
|
| 95 |
/* Enabling GPIO-related clocks, the mask comes from the |
|
| 96 |
registry header file.*/ |
|
| 97 |
rccResetAHB1(STM32_GPIO_EN_MASK); |
|
| 98 |
rccEnableAHB1(STM32_GPIO_EN_MASK, true); |
|
| 99 |
|
|
| 100 |
/* Initializing all the defined GPIO ports.*/ |
|
| 101 |
#if STM32_HAS_GPIOA |
|
| 102 |
_gpio_init(GPIOA, VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_IGNORE); |
|
| 103 |
#endif |
|
| 104 |
#if STM32_HAS_GPIOB |
|
| 105 |
_gpio_init(GPIOB, VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_IGNORE); |
|
| 106 |
#endif |
|
| 107 |
#if STM32_HAS_GPIOC |
|
| 108 |
_gpio_init(GPIOC, VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_IGNORE); |
|
| 109 |
#endif |
|
| 110 |
#if STM32_HAS_GPIOD |
|
| 111 |
_gpio_init(GPIOD, VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_IGNORE); |
|
| 112 |
#endif |
|
| 113 |
#if STM32_HAS_GPIOE |
|
| 114 |
_gpio_init(GPIOE, VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_IGNORE); |
|
| 115 |
#endif |
|
| 116 |
#if STM32_HAS_GPIOF |
|
| 117 |
_gpio_init(GPIOF, VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_IGNORE); |
|
| 118 |
#endif |
|
| 119 |
#if STM32_HAS_GPIOG |
|
| 120 |
_gpio_init(GPIOG, VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_IGNORE); |
|
| 121 |
#endif |
|
| 122 |
#if STM32_HAS_GPIOH |
|
| 123 |
_gpio_init(GPIOH, VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_IGNORE); |
|
| 124 |
#endif |
|
| 125 |
#if STM32_HAS_GPIOI |
|
| 126 |
_gpio_init(GPIOI, VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_IGNORE); |
|
| 127 |
#endif |
|
| 128 |
#if STM32_HAS_GPIOJ |
|
| 129 |
_gpio_init(GPIOJ, VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_IGNORE); |
|
| 130 |
#endif |
|
| 131 |
#if STM32_HAS_GPIOK |
|
| 132 |
_gpio_init(GPIOK, VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_IGNORE); |
|
| 133 |
#endif |
|
| 134 |
} |
|
| 135 |
|
|
| 136 |
/** |
|
| 137 |
* @brief Early initialization code. |
|
| 138 |
* @details This initialization must be performed just after stack setup |
|
| 139 |
* and before any other initialization. |
|
| 140 |
*/ |
|
| 141 |
void __early_init(void) {
|
|
| 142 |
|
|
| 143 |
_stm32_gpio_init(); |
|
| 144 |
stm32_clock_init(); |
|
| 145 |
} |
|
| 146 |
|
|
| 147 |
/** |
|
| 148 |
* @brief Board-specific initialization code. |
|
| 149 |
* @todo Add your board-specific code, if any. |
|
| 150 |
*/ |
|
| 151 |
void boardInit(void) {
|
|
| 152 |
} |
|
| 153 |
|
|
| 154 |
/** @} */ |
|
| modules/PowerManagement_1-2/board.h | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/** |
|
| 20 |
* @file |
|
| 21 |
* @brief PowerManagement v1.2 Board specific macros. |
|
| 22 |
* |
|
| 23 |
* @addtogroup powermanagement_board |
|
| 24 |
* @{
|
|
| 25 |
*/ |
|
| 26 |
|
|
| 27 |
#ifndef BOARD_H |
|
| 28 |
#define BOARD_H |
|
| 29 |
|
|
| 30 |
/* |
|
| 31 |
* Setup for AMiRo PowerManagement v1.2 board. |
|
| 32 |
*/ |
|
| 33 |
|
|
| 34 |
/* |
|
| 35 |
* Board identifier. |
|
| 36 |
*/ |
|
| 37 |
#define BOARD_POWERMANAGEMENT_1_2 |
|
| 38 |
#define BOARD_NAME "AMiRo PowerManagement v1.2" |
|
| 39 |
|
|
| 40 |
/* |
|
| 41 |
* Board oscillators-related settings. |
|
| 42 |
* NOTE: LSE not fitted. |
|
| 43 |
*/ |
|
| 44 |
#if !defined(STM32_LSECLK) |
|
| 45 |
#define STM32_LSECLK 0U |
|
| 46 |
#endif |
|
| 47 |
|
|
| 48 |
#if !defined(STM32_HSECLK) |
|
| 49 |
#define STM32_HSECLK 8000000U |
|
| 50 |
#endif |
|
| 51 |
|
|
| 52 |
/* |
|
| 53 |
* Board voltages. |
|
| 54 |
* Required for performance limits calculation. |
|
| 55 |
*/ |
|
| 56 |
#define STM32_VDD 330U |
|
| 57 |
|
|
| 58 |
/* |
|
| 59 |
* MCU type as defined in the ST header. |
|
| 60 |
*/ |
|
| 61 |
#define STM32F405xx |
|
| 62 |
|
|
| 63 |
/* |
|
| 64 |
* STM32F4 alternate function definitions |
|
| 65 |
*/ |
|
| 66 |
#define STM32F4xx_AF_system 0U |
|
| 67 |
#define STM32F4xx_AF_TIM1to2 1U |
|
| 68 |
#define STM32F4xx_AF_TIM3to5 2U |
|
| 69 |
#define STM32F4xx_AF_TIM8to11 3U |
|
| 70 |
#define STM32F4xx_AF_I2C1to3 4U |
|
| 71 |
#define STM32F4xx_AF_SPI1to2 5U |
|
| 72 |
#define STM32F4xx_AF_SPI3 6U |
|
| 73 |
#define STM32F4xx_AF_USART1to3 7U |
|
| 74 |
#define STM32F4xx_AF_USART4to6 8U |
|
| 75 |
#define STM32F4xx_AF_CAN1to2_TIM12to14 9U |
|
| 76 |
#define STM32F4xx_AF_OTG_HSFS 10U |
|
| 77 |
#define STM32F4xx_AF_ETH 11U |
|
| 78 |
#define STM32F4xx_AF_FSMC_SDIO_OTGHS 12U |
|
| 79 |
#define STM32F4xx_AF_DCMI 13U |
|
| 80 |
#define STM32F4xx_AF_EVENTOUT 15U |
|
| 81 |
|
|
| 82 |
/* |
|
| 83 |
* Identifiers for the several sensor rings, which can be attached to the PowerManagement v1.1 module. |
|
| 84 |
*/ |
|
| 85 |
#define BOARD_NOSENSORRING 0 |
|
| 86 |
#define BOARD_PROXIMITYSENSOR 1 |
|
| 87 |
#define BOARD_DISTANCESENSOR_VL53L0X 2 |
|
| 88 |
#define BOARD_DISTANCESENSOR_VL53L1X 3 |
|
| 89 |
|
|
| 90 |
/* |
|
| 91 |
* Configuration macro to define which type of sensor ring is attached. |
|
| 92 |
*/ |
|
| 93 |
#define BOARD_SENSORRING BOARD_PROXIMITYSENSOR |
|
| 94 |
|
|
| 95 |
/* |
|
| 96 |
* IO pins assignments. |
|
| 97 |
*/ |
|
| 98 |
#define GPIOA_WKUP 0U |
|
| 99 |
#define GPIOA_SWITCH_STATUS_N 1U |
|
| 100 |
#define GPIOA_SYS_UART_TX 2U |
|
| 101 |
#define GPIOA_SYS_UART_RX 3U |
|
| 102 |
#define GPIOA_SYS_SPI_SS0_N 4U |
|
| 103 |
#define GPIOA_SYS_SPI_SCLK 5U |
|
| 104 |
#define GPIOA_SYS_SPI_MISO 6U |
|
| 105 |
#define GPIOA_SYS_SPI_MOSI 7U |
|
| 106 |
#define GPIOA_SYS_REG_EN 8U |
|
| 107 |
#define GPIOA_PROG_RX 9U |
|
| 108 |
#define GPIOA_PROG_TX 10U |
|
| 109 |
#define GPIOA_CAN_RX 11U |
|
| 110 |
#define GPIOA_CAN_TX 12U |
|
| 111 |
#define GPIOA_SWDIO 13U |
|
| 112 |
#define GPIOA_SWCLK 14U |
|
| 113 |
#define GPIOA_SYS_SPI_SS1_N 15U |
|
| 114 |
|
|
| 115 |
#define GPIOB_IR_INT1_N 0U |
|
| 116 |
#define GPIOB_VSYS_SENSE 1U |
|
| 117 |
#define GPIOB_POWER_EN 2U |
|
| 118 |
#define GPIOB_SYS_UART_DN 3U |
|
| 119 |
#define GPIOB_CHARGE_STAT2A 4U |
|
| 120 |
#define GPIOB_BUZZER 5U |
|
| 121 |
#define GPIOB_GAUGE_BATLOW2 6U |
|
| 122 |
#define GPIOB_GAUGE_BATGD2_N 7U |
|
| 123 |
#define GPIOB_GAUGE_SCL2 8U |
|
| 124 |
#define GPIOB_GAUGE_SDA2 9U |
|
| 125 |
#define GPIOB_GAUGE_SCL1 10U |
|
| 126 |
#define GPIOB_GAUGE_SDA1 11U |
|
| 127 |
#define GPIOB_LED 12U |
|
| 128 |
#define GPIOB_BT_RTS 13U |
|
| 129 |
#define GPIOB_BT_CTS 14U |
|
| 130 |
#define GPIOB_SYS_UART_UP 15U |
|
| 131 |
|
|
| 132 |
#define GPIOC_CHARGE_STAT1A 0U |
|
| 133 |
#define GPIOC_GAUGE_BATLOW1 1U |
|
| 134 |
#define GPIOC_GAUGE_BATGD1_N 2U |
|
| 135 |
#define GPIOC_CHARGE_EN1_N 3U |
|
| 136 |
#define GPIOC_IR_INT2_N 4U |
|
| 137 |
#define GPIOC_TOUCH_INT_N 5U |
|
| 138 |
#define GPIOC_SYS_DONE 6U |
|
| 139 |
#define GPIOC_SYS_PROG_N 7U |
|
| 140 |
#define GPIOC_PATH_DC 8U |
|
| 141 |
#define GPIOC_SYS_SPI_DIR 9U |
|
| 142 |
#define GPIOC_BT_RX 10U |
|
| 143 |
#define GPIOC_BT_TX 11U |
|
| 144 |
#define GPIOC_SYS_INT_N 12U |
|
| 145 |
#define GPIOC_SYS_PD_N 13U |
|
| 146 |
#define GPIOC_SYS_WARMRST_N 14U |
|
| 147 |
#define GPIOC_BT_RST 15U |
|
| 148 |
|
|
| 149 |
#define GPIOD_PIN0 0U |
|
| 150 |
#define GPIOD_PIN1 1U |
|
| 151 |
#define GPIOD_CHARGE_EN2_N 2U |
|
| 152 |
#define GPIOD_PIN3 3U |
|
| 153 |
#define GPIOD_PIN4 4U |
|
| 154 |
#define GPIOD_PIN5 5U |
|
| 155 |
#define GPIOD_PIN6 6U |
|
| 156 |
#define GPIOD_PIN7 7U |
|
| 157 |
#define GPIOD_PIN8 8U |
|
| 158 |
#define GPIOD_PIN9 9U |
|
| 159 |
#define GPIOD_PIN10 10U |
|
| 160 |
#define GPIOD_PIN11 11U |
|
| 161 |
#define GPIOD_PIN12 12U |
|
| 162 |
#define GPIOD_PIN13 13U |
|
| 163 |
#define GPIOD_PIN14 14U |
|
| 164 |
#define GPIOD_PIN15 15U |
|
| 165 |
|
|
| 166 |
#define GPIOE_PIN0 0U |
|
| 167 |
#define GPIOE_PIN1 1U |
|
| 168 |
#define GPIOE_PIN2 2U |
|
| 169 |
#define GPIOE_PIN3 3U |
|
| 170 |
#define GPIOE_PIN4 4U |
|
| 171 |
#define GPIOE_PIN5 5U |
|
| 172 |
#define GPIOE_PIN6 6U |
|
| 173 |
#define GPIOE_PIN7 7U |
|
| 174 |
#define GPIOE_PIN8 8U |
|
| 175 |
#define GPIOE_PIN9 9U |
|
| 176 |
#define GPIOE_PIN10 10U |
|
| 177 |
#define GPIOE_PIN11 11U |
|
| 178 |
#define GPIOE_PIN12 12U |
|
| 179 |
#define GPIOE_PIN13 13U |
|
| 180 |
#define GPIOE_PIN14 14U |
|
| 181 |
#define GPIOE_PIN15 15U |
|
| 182 |
|
|
| 183 |
#define GPIOF_PIN0 0U |
|
| 184 |
#define GPIOF_PIN1 1U |
|
| 185 |
#define GPIOF_PIN2 2U |
|
| 186 |
#define GPIOF_PIN3 3U |
|
| 187 |
#define GPIOF_PIN4 4U |
|
| 188 |
#define GPIOF_PIN5 5U |
|
| 189 |
#define GPIOF_PIN6 6U |
|
| 190 |
#define GPIOF_PIN7 7U |
|
| 191 |
#define GPIOF_PIN8 8U |
|
| 192 |
#define GPIOF_PIN9 9U |
|
| 193 |
#define GPIOF_PIN10 10U |
|
| 194 |
#define GPIOF_PIN11 11U |
|
| 195 |
#define GPIOF_PIN12 12U |
|
| 196 |
#define GPIOF_PIN13 13U |
|
| 197 |
#define GPIOF_PIN14 14U |
|
| 198 |
#define GPIOF_PIN15 15U |
|
| 199 |
|
|
| 200 |
#define GPIOG_PIN0 0U |
|
| 201 |
#define GPIOG_PIN1 1U |
|
| 202 |
#define GPIOG_PIN2 2U |
|
| 203 |
#define GPIOG_PIN3 3U |
|
| 204 |
#define GPIOG_PIN4 4U |
|
| 205 |
#define GPIOG_PIN5 5U |
|
| 206 |
#define GPIOG_PIN6 6U |
|
| 207 |
#define GPIOG_PIN7 7U |
|
| 208 |
#define GPIOG_PIN8 8U |
|
| 209 |
#define GPIOG_PIN9 9U |
|
| 210 |
#define GPIOG_PIN10 10U |
|
| 211 |
#define GPIOG_PIN11 11U |
|
| 212 |
#define GPIOG_PIN12 12U |
|
| 213 |
#define GPIOG_PIN13 13U |
|
| 214 |
#define GPIOG_PIN14 14U |
|
| 215 |
#define GPIOG_PIN15 15U |
|
| 216 |
|
|
| 217 |
#define GPIOH_OSC_IN 0U |
|
| 218 |
#define GPIOH_OSC_OUT 1U |
|
| 219 |
#define GPIOH_PIN2 2U |
|
| 220 |
#define GPIOH_PIN3 3U |
|
| 221 |
#define GPIOH_PIN4 4U |
|
| 222 |
#define GPIOH_PIN5 5U |
|
| 223 |
#define GPIOH_PIN6 6U |
|
| 224 |
#define GPIOH_PIN7 7U |
|
| 225 |
#define GPIOH_PIN8 8U |
|
| 226 |
#define GPIOH_PIN9 9U |
|
| 227 |
#define GPIOH_PIN10 10U |
|
| 228 |
#define GPIOH_PIN11 11U |
|
| 229 |
#define GPIOH_PIN12 12U |
|
| 230 |
#define GPIOH_PIN13 13U |
|
| 231 |
#define GPIOH_PIN14 14U |
|
| 232 |
#define GPIOH_PIN15 15U |
|
| 233 |
|
|
| 234 |
#define GPIOI_PIN0 0U |
|
| 235 |
#define GPIOI_PIN1 1U |
|
| 236 |
#define GPIOI_PIN2 2U |
|
| 237 |
#define GPIOI_PIN3 3U |
|
| 238 |
#define GPIOI_PIN4 4U |
|
| 239 |
#define GPIOI_PIN5 5U |
|
| 240 |
#define GPIOI_PIN6 6U |
|
| 241 |
#define GPIOI_PIN7 7U |
|
| 242 |
#define GPIOI_PIN8 8U |
|
| 243 |
#define GPIOI_PIN9 9U |
|
| 244 |
#define GPIOI_PIN10 10U |
|
| 245 |
#define GPIOI_PIN11 11U |
|
| 246 |
#define GPIOI_PIN12 12U |
|
| 247 |
#define GPIOI_PIN13 13U |
|
| 248 |
#define GPIOI_PIN14 14U |
|
| 249 |
#define GPIOI_PIN15 15U |
|
| 250 |
|
|
| 251 |
/* |
|
| 252 |
* IO lines assignments. |
|
| 253 |
*/ |
|
| 254 |
#define LINE_WKUP PAL_LINE(GPIOA, GPIOA_WKUP) |
|
| 255 |
#define LINE_SWITCH_STATUS_N PAL_LINE(GPIOA, GPIOA_SWITCH_STATUS_N) |
|
| 256 |
#define LINE_SYS_UART_TX PAL_LINE(GPIOA, GPIOA_SYS_UART_TX) |
|
| 257 |
#define LINE_SYS_UART_RX PAL_LINE(GPIOA, GPIOA_SYS_UART_RX) |
|
| 258 |
#define LINE_SYS_SPI_SS0_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N) |
|
| 259 |
#define LINE_SYS_SPI_SCLK PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK) |
|
| 260 |
#define LINE_SYS_SPI_MISO PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO) |
|
| 261 |
#define LINE_SYS_SPI_MOSI PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI) |
|
| 262 |
#define LINE_SYS_REG_EN PAL_LINE(GPIOA, GPIOA_SYS_REG_EN) |
|
| 263 |
#define LINE_PROG_RX PAL_LINE(GPIOA, GPIOA_PROG_RX) |
|
| 264 |
#define LINE_PROG_TX PAL_LINE(GPIOA, GPIOA_PROG_TX) |
|
| 265 |
#define LINE_CAN_RX PAL_LINE(GPIOA, GPIOA_CAN_RX) |
|
| 266 |
#define LINE_CAN_TX PAL_LINE(GPIOA, GPIOA_CAN_TX) |
|
| 267 |
#define LINE_SWDIO PAL_LINE(GPIOA, GPIOA_SWDIO) |
|
| 268 |
#define LINE_SWCLK PAL_LINE(GPIOA, GPIOA_SWCLK) |
|
| 269 |
#define LINE_SYS_SPI_SS1_N PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N) |
|
| 270 |
|
|
| 271 |
#define LINE_IR_INT1_N PAL_LINE(GPIOB, GPIOB_IR_INT1_N) |
|
| 272 |
#define LINE_VSYS_SENSE PAL_LINE(GPIOB, GPIOB_VSYS_SENSE) |
|
| 273 |
#define LINE_POWER_EN PAL_LINE(GPIOB, GPIOB_POWER_EN) |
|
| 274 |
#define LINE_SYS_UART_DN PAL_LINE(GPIOB, GPIOB_SYS_UART_DN) |
|
| 275 |
#define LINE_CHARGE_STAT2A PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A) |
|
| 276 |
#define LINE_BUZZER PAL_LINE(GPIOB, GPIOB_BUZZER) |
|
| 277 |
#define LINE_GAUGE_BATLOW2 PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2) |
|
| 278 |
#define LINE_GAUGE_BATGD2_N PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N) |
|
| 279 |
#define LINE_GAUGE_SCL2 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2) |
|
| 280 |
#define LINE_GAUGE_SDA2 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2) |
|
| 281 |
#define LINE_GAUGE_SCL1 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1) |
|
| 282 |
#define LINE_GAUGE_SDA1 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1) |
|
| 283 |
#define LINE_LED PAL_LINE(GPIOB, GPIOB_LED) |
|
| 284 |
#define LINE_BT_RTS PAL_LINE(GPIOB, GPIOB_BT_RTS) |
|
| 285 |
#define LINE_BT_CTS PAL_LINE(GPIOB, GPIOB_BT_CTS) |
|
| 286 |
#define LINE_SYS_UART_UP PAL_LINE(GPIOB, GPIOB_SYS_UART_UP) |
|
| 287 |
|
|
| 288 |
#define LINE_CHARGE_STAT1A PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A) |
|
| 289 |
#define LINE_GAUGE_BATLOW1 PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1) |
|
| 290 |
#define LINE_GAUGE_BATGD1_N PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N) |
|
| 291 |
#define LINE_CHARGE_EN1_N PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N) |
|
| 292 |
#define LINE_IR_INT2_N PAL_LINE(GPIOC, GPIOC_IR_INT2_N) |
|
| 293 |
#define LINE_TOUCH_INT_N PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N) |
|
| 294 |
#define LINE_SYS_DONE PAL_LINE(GPIOC, GPIOC_SYS_DONE) |
|
| 295 |
#define LINE_SYS_PROG_N PAL_LINE(GPIOC, GPIOC_SYS_PROG_N) |
|
| 296 |
#define LINE_PATH_DC PAL_LINE(GPIOC, GPIOC_PATH_DC) |
|
| 297 |
#define LINE_SYS_SPI_DIR PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR) |
|
| 298 |
#define LINE_BT_RX PAL_LINE(GPIOC, GPIOC_BT_RX) |
|
| 299 |
#define LINE_BT_TX PAL_LINE(GPIOC, GPIOC_BT_TX) |
|
| 300 |
#define LINE_SYS_INT_N PAL_LINE(GPIOC, GPIOC_SYS_INT_N) |
|
| 301 |
#define LINE_SYS_PD_N PAL_LINE(GPIOC, GPIOC_SYS_PD_N) |
|
| 302 |
#define LINE_SYS_WARMRST_N PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N) |
|
| 303 |
#define LINE_BT_RST PAL_LINE(GPIOC, GPIOC_BT_RST) |
|
| 304 |
|
|
| 305 |
#define LINE_CHARGE_EN2_N PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N) |
|
| 306 |
|
|
| 307 |
#define LINE_OSC_IN PAL_LINE(GPIOH, 0U) |
|
| 308 |
#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) |
|
| 309 |
|
|
| 310 |
/* |
|
| 311 |
* I/O ports initial setup, this configuration is established soon after reset |
|
| 312 |
* in the initialization code. |
|
| 313 |
* Please refer to the STM32 Reference Manual for details. |
|
| 314 |
*/ |
|
| 315 |
#define PIN_IGNORE(n) (1U << (n)) |
|
| 316 |
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) |
|
| 317 |
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) |
|
| 318 |
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) |
|
| 319 |
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) |
|
| 320 |
#define PIN_ODR_LOW(n) (0U << (n)) |
|
| 321 |
#define PIN_ODR_HIGH(n) (1U << (n)) |
|
| 322 |
#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) |
|
| 323 |
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) |
|
| 324 |
#define PIN_OSPEED_LOW(n) (0U << ((n) * 2U)) |
|
| 325 |
#define PIN_OSPEED_MEDIUM(n) (1U << ((n) * 2U)) |
|
| 326 |
#define PIN_OSPEED_HIGH(n) (2U << ((n) * 2U)) |
|
| 327 |
#define PIN_OSPEED_VERYHIGH(n) (3U << ((n) * 2U)) |
|
| 328 |
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) |
|
| 329 |
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) |
|
| 330 |
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) |
|
| 331 |
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) |
|
| 332 |
|
|
| 333 |
/* |
|
| 334 |
* GPIOA setup: |
|
| 335 |
* |
|
| 336 |
* PA0 - WKUP (input floating) |
|
| 337 |
* PA1 - SWITCH_STATUS_N (input floating) |
|
| 338 |
* PA2 - SYS_UART_TX (input floating) |
|
| 339 |
* PA3 - SYS_UART_RX (alternate 7 pushpull floating) |
|
| 340 |
* PA4 - SYS_SPI_SS0_N (input floating) |
|
| 341 |
* PA5 - SYS_SPI_SCLK (alternate 5 pushpull floating) |
|
| 342 |
* PA6 - SYS_SPI_MISO (alternate 5 pushpull floating) |
|
| 343 |
* PA7 - SYS_SPI_MOSI (alternate 5 pushpull floating) |
|
| 344 |
* PA8 - SYS_REG_EN (output pushpull high) |
|
| 345 |
* PA9 - PROG_RX (alternate 7 pushpull floating) |
|
| 346 |
* PA10 - PROG_TX (alternate 7 pushpull pullup) |
|
| 347 |
* PA11 - CAN_RX (alternate 9 pushpull floating) |
|
| 348 |
* PA12 - CAN_TX (alternate 9 pushpull floating) |
|
| 349 |
* PA13 - SWDIO (alternate 0 pushpull floating) |
|
| 350 |
* PA14 - SWCLK (alternate 0 pushpull floating) |
|
| 351 |
* PA15 - SYS_SPI_SS1_N (input floating) |
|
| 352 |
*/ |
|
| 353 |
#define VAL_GPIOA_IGNORE 0 |
|
| 354 |
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_WKUP) | \ |
|
| 355 |
PIN_MODE_INPUT(GPIOA_SWITCH_STATUS_N) | \ |
|
| 356 |
PIN_MODE_INPUT(GPIOA_SYS_UART_TX) | \ |
|
| 357 |
PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) | \ |
|
| 358 |
PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) | \ |
|
| 359 |
PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) | \ |
|
| 360 |
PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) | \ |
|
| 361 |
PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) | \ |
|
| 362 |
PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) | \ |
|
| 363 |
PIN_MODE_ALTERNATE(GPIOA_PROG_RX) | \ |
|
| 364 |
PIN_MODE_ALTERNATE(GPIOA_PROG_TX) | \ |
|
| 365 |
PIN_MODE_ALTERNATE(GPIOA_CAN_RX) | \ |
|
| 366 |
PIN_MODE_ALTERNATE(GPIOA_CAN_TX) | \ |
|
| 367 |
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ |
|
| 368 |
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ |
|
| 369 |
PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N)) |
|
| 370 |
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) | \ |
|
| 371 |
PIN_OTYPE_PUSHPULL(GPIOA_SWITCH_STATUS_N) | \ |
|
| 372 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) | \ |
|
| 373 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) | \ |
|
| 374 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) | \ |
|
| 375 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) | \ |
|
| 376 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) | \ |
|
| 377 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) | \ |
|
| 378 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) | \ |
|
| 379 |
PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) | \ |
|
| 380 |
PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) | \ |
|
| 381 |
PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) | \ |
|
| 382 |
PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) | \ |
|
| 383 |
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ |
|
| 384 |
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ |
|
| 385 |
PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N)) |
|
| 386 |
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) | \ |
|
| 387 |
PIN_OSPEED_VERYHIGH(GPIOA_SWITCH_STATUS_N) | \ |
|
| 388 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) | \ |
|
| 389 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) | \ |
|
| 390 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) | \ |
|
| 391 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) | \ |
|
| 392 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) | \ |
|
| 393 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) | \ |
|
| 394 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) | \ |
|
| 395 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) | \ |
|
| 396 |
PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) | \ |
|
| 397 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) | \ |
|
| 398 |
PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) | \ |
|
| 399 |
PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) | \ |
|
| 400 |
PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) | \ |
|
| 401 |
PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N)) |
|
| 402 |
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_WKUP) | \ |
|
| 403 |
PIN_PUPDR_FLOATING(GPIOA_SWITCH_STATUS_N) | \ |
|
| 404 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) | \ |
|
| 405 |
PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) | \ |
|
| 406 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) | \ |
|
| 407 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) | \ |
|
| 408 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) | \ |
|
| 409 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) | \ |
|
| 410 |
PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) | \ |
|
| 411 |
PIN_PUPDR_FLOATING(GPIOA_PROG_RX) | \ |
|
| 412 |
PIN_PUPDR_PULLUP(GPIOA_PROG_TX) | \ |
|
| 413 |
PIN_PUPDR_FLOATING(GPIOA_CAN_RX) | \ |
|
| 414 |
PIN_PUPDR_FLOATING(GPIOA_CAN_TX) | \ |
|
| 415 |
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ |
|
| 416 |
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ |
|
| 417 |
PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N)) |
|
| 418 |
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_WKUP) | \ |
|
| 419 |
PIN_ODR_HIGH(GPIOA_SWITCH_STATUS_N) | \ |
|
| 420 |
PIN_ODR_HIGH(GPIOA_SYS_UART_TX) | \ |
|
| 421 |
PIN_ODR_HIGH(GPIOA_SYS_UART_RX) | \ |
|
| 422 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) | \ |
|
| 423 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) | \ |
|
| 424 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) | \ |
|
| 425 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) | \ |
|
| 426 |
PIN_ODR_HIGH(GPIOA_SYS_REG_EN) | \ |
|
| 427 |
PIN_ODR_HIGH(GPIOA_PROG_RX) | \ |
|
| 428 |
PIN_ODR_HIGH(GPIOA_PROG_TX) | \ |
|
| 429 |
PIN_ODR_HIGH(GPIOA_CAN_RX) | \ |
|
| 430 |
PIN_ODR_HIGH(GPIOA_CAN_TX) | \ |
|
| 431 |
PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
|
| 432 |
PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
|
| 433 |
PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N)) |
|
| 434 |
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) | \ |
|
| 435 |
PIN_AFIO_AF(GPIOA_SWITCH_STATUS_N, STM32F4xx_AF_system) | \ |
|
| 436 |
PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) | \ |
|
| 437 |
PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) | \ |
|
| 438 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) | \ |
|
| 439 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) | \ |
|
| 440 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) | \ |
|
| 441 |
PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2)) |
|
| 442 |
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) | \ |
|
| 443 |
PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) | \ |
|
| 444 |
PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) | \ |
|
| 445 |
PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
|
| 446 |
PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) | \ |
|
| 447 |
PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) | \ |
|
| 448 |
PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) | \ |
|
| 449 |
PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system)) |
|
| 450 |
|
|
| 451 |
/* |
|
| 452 |
* GPIOB setup: |
|
| 453 |
* |
|
| 454 |
* PB0 - IR_INT1_N (input floating) |
|
| 455 |
* PB1 - VSYS_SENSE (analog) |
|
| 456 |
* PB2 - POWER_EN (output pushpull high) |
|
| 457 |
* PB3 - SYS_UART_DN (output opendrain high) |
|
| 458 |
* PB4 - CHARGE_STAT2A (inout floating) |
|
| 459 |
* PB5 - BUZZER (alternate 2 pushpull floating) |
|
| 460 |
* PB6 - GAUGE_BATLOW2 (input floating) |
|
| 461 |
* PB7 - GAUGE_BATGD2_N (input floating) |
|
| 462 |
* PB8 - GAUGE_SCL2 (alternate 4 opendrain floating) |
|
| 463 |
* PB9 - GAUGE_SDA2 (alternate 4 opendrain floating) |
|
| 464 |
* PB10 - GAUGE_SCL1 (alternate 4 opendrain floating) |
|
| 465 |
* PB11 - GAUGE_SDA1 (alternate 4 opendrain floating) |
|
| 466 |
* PB12 - LED (output opendrain high) |
|
| 467 |
* PB13 - BT_RTS (alternate 7 pushpull floating) |
|
| 468 |
* PB14 - BT_CTS (inout floating) |
|
| 469 |
* PB15 - SYS_UART_UP (output opendrain high) |
|
| 470 |
*/ |
|
| 471 |
#define VAL_GPIOB_IGNORE (PIN_IGNORE(GPIOB_POWER_EN) | \ |
|
| 472 |
PIN_IGNORE(GPIOB_SYS_UART_DN) | \ |
|
| 473 |
PIN_IGNORE(GPIOB_LED) | \ |
|
| 474 |
PIN_IGNORE(GPIOB_SYS_UART_UP)) & 0 |
|
| 475 |
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_IR_INT1_N) | \ |
|
| 476 |
PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) | \ |
|
| 477 |
PIN_MODE_OUTPUT(GPIOB_POWER_EN) | \ |
|
| 478 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) | \ |
|
| 479 |
PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) | \ |
|
| 480 |
PIN_MODE_ALTERNATE(GPIOB_BUZZER) | \ |
|
| 481 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) | \ |
|
| 482 |
PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) | \ |
|
| 483 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) | \ |
|
| 484 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) | \ |
|
| 485 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) | \ |
|
| 486 |
PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) | \ |
|
| 487 |
PIN_MODE_OUTPUT(GPIOB_LED) | \ |
|
| 488 |
PIN_MODE_ALTERNATE(GPIOB_BT_RTS) | \ |
|
| 489 |
PIN_MODE_INPUT(GPIOB_BT_CTS) | \ |
|
| 490 |
PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP)) |
|
| 491 |
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) | \ |
|
| 492 |
PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) | \ |
|
| 493 |
PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) | \ |
|
| 494 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) | \ |
|
| 495 |
PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) | \ |
|
| 496 |
PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) | \ |
|
| 497 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) | \ |
|
| 498 |
PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) | \ |
|
| 499 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) | \ |
|
| 500 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) | \ |
|
| 501 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) | \ |
|
| 502 |
PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) | \ |
|
| 503 |
PIN_OTYPE_OPENDRAIN(GPIOB_LED) | \ |
|
| 504 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) | \ |
|
| 505 |
PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) | \ |
|
| 506 |
PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP)) |
|
| 507 |
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) | \ |
|
| 508 |
PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) | \ |
|
| 509 |
PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) | \ |
|
| 510 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) | \ |
|
| 511 |
PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) | \ |
|
| 512 |
PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) | \ |
|
| 513 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) | \ |
|
| 514 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) | \ |
|
| 515 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) | \ |
|
| 516 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) | \ |
|
| 517 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) | \ |
|
| 518 |
PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) | \ |
|
| 519 |
PIN_OSPEED_VERYHIGH(GPIOB_LED) | \ |
|
| 520 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) | \ |
|
| 521 |
PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) | \ |
|
| 522 |
PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP)) |
|
| 523 |
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) | \ |
|
| 524 |
PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) | \ |
|
| 525 |
PIN_PUPDR_FLOATING(GPIOB_POWER_EN) | \ |
|
| 526 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) | \ |
|
| 527 |
PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) | \ |
|
| 528 |
PIN_PUPDR_FLOATING(GPIOB_BUZZER) | \ |
|
| 529 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) | \ |
|
| 530 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) | \ |
|
| 531 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) | \ |
|
| 532 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) | \ |
|
| 533 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) | \ |
|
| 534 |
PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) | \ |
|
| 535 |
PIN_PUPDR_FLOATING(GPIOB_LED) | \ |
|
| 536 |
PIN_PUPDR_FLOATING(GPIOB_BT_RTS) | \ |
|
| 537 |
PIN_PUPDR_FLOATING(GPIOB_BT_CTS) | \ |
|
| 538 |
PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP)) |
|
| 539 |
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_IR_INT1_N) | \ |
|
| 540 |
PIN_ODR_HIGH(GPIOB_VSYS_SENSE) | \ |
|
| 541 |
PIN_ODR_HIGH(GPIOB_POWER_EN) | \ |
|
| 542 |
PIN_ODR_HIGH(GPIOB_SYS_UART_DN) | \ |
|
| 543 |
PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) | \ |
|
| 544 |
PIN_ODR_HIGH(GPIOB_BUZZER) | \ |
|
| 545 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) | \ |
|
| 546 |
PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) | \ |
|
| 547 |
PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) | \ |
|
| 548 |
PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) | \ |
|
Also available in: Unified diff