amiro-os / boards / DiWheelDrive / board.c @ b4885314
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1 | 58fe0e0b | Thomas Schöpping | #include "ch.h" |
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2 | #include "hal.h" |
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3 | |||
4 | /**
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5 | * @brief PAL setup.
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6 | * @details Digital I/O ports static configuration as defined in @p board.h.
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7 | * This variable is used by the HAL when initializing the PAL driver.
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8 | */
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9 | #if HAL_USE_PAL || defined(__DOXYGEN__)
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10 | const PALConfig pal_default_config =
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11 | { |
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12 | {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, |
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13 | {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, |
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14 | {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, |
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15 | {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, |
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16 | {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, |
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17 | {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH}, |
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18 | {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH}, |
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19 | }; |
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20 | |||
21 | #endif
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22 | |||
23 | /*
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24 | * Early initialization code.
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25 | * This initialization must be performed just after stack setup and before
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26 | * any other initialization.
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27 | */
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28 | void __early_init(void) { |
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29 | |||
30 | stm32_clock_init(); |
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31 | } |
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32 | |||
33 | /*
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34 | * Board-specific initialization code.
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35 | */
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36 | void boardInit(void) { |
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37 | /*
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38 | * Several I/O pins are re-mapped:
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39 | * JTAG disabled and SWJ enabled
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40 | * TIM2 to the PA15/PB3/PA2/PA3 pins.
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41 | * TIM3 to PC6/PC7 pins.
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42 | * USART3 to the PC10/PC11 pins.
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43 | * I2C1 to the PB8/PB9 pins.
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44 | */
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45 | AFIO->MAPR = AFIO_MAPR_SWJ_CFG_DISABLE | |
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46 | AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 | |
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47 | AFIO_MAPR_TIM3_REMAP_FULLREMAP | |
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48 | AFIO_MAPR_USART3_REMAP_PARTIALREMAP | |
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49 | AFIO_MAPR_I2C1_REMAP; |
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50 | } |
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51 | |||
52 | inline void boardWriteIoPower(const uint8_t value) |
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53 | { |
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54 | if (value) {
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55 | // drive pins
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56 | palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_STM32_ALTERNATE_PUSHPULL); |
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57 | } else {
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58 | // float pins
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59 | palSetPadMode(GPIOA, GPIOA_CAN_TX, PAL_MODE_INPUT); |
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60 | } |
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61 | } |
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62 | |||
63 | inline void boardWriteLed(int value) |
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64 | { |
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65 | palWritePad(GPIOA, GPIOA_LED, !value); |
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66 | } |
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67 | |||
68 | inline void boardRequestShutdown(void) |
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69 | { |
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70 | palClearPad(GPIOC, GPIOC_SYS_PD_N); |
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71 | } |
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72 | |||
73 | inline void boardStandby(void) |
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74 | { |
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75 | |||
76 | palSetPad(GPIOC, GPIOC_SYS_PD_N); |
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77 | chSysLock(); |
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78 | // Standby
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79 | // set deepsleep bit
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80 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
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81 | // enable wakeup pin
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82 | //PWR->CSR |= PWR_CSR_EWUP;
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83 | // set PDDS, clear WUF, clear SBF
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84 | PWR->CR |= (PWR_CR_CWUF | PWR_CR_PDDS | PWR_CR_CSBF); |
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85 | // clear RTC wakeup source flags
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86 | RTC->CRL &= ~(RTC_CRL_ALRF); |
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87 | // Wait for Interrupt
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88 | __WFI(); |
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89 | |||
90 | } |
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91 | |||
92 | inline void boardWakeup(void) { |
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93 | |||
94 | palClearPad(GPIOC, GPIOC_SYS_PD_N); |
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95 | chThdSleepMicroseconds(10);
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96 | palSetPad(GPIOC, GPIOC_SYS_PD_N); |
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97 | } |
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98 | |||
99 | b4885314 | Thomas Schöpping | inline void boardClearI2CBus(const uint8_t scl_pad, const uint8_t sda_pad) { |
100 | 58fe0e0b | Thomas Schöpping | |
101 | uint8_t i; |
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102 | |||
103 | b4885314 | Thomas Schöpping | // configure I²C SCL and SDA open drain
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104 | 58fe0e0b | Thomas Schöpping | palSetPadMode(GPIOB, scl_pad, PAL_MODE_OUTPUT_OPENDRAIN); |
105 | b4885314 | Thomas Schöpping | palSetPadMode(GPIOB, sda_pad, PAL_MODE_OUTPUT_OPENDRAIN); |
106 | 58fe0e0b | Thomas Schöpping | |
107 | b4885314 | Thomas Schöpping | // perform a 2-wire software reset for the eeprom (see AT24C01BN-SH-B datasheet, chapter 3)
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108 | // note: clock is ~50kHz (20us per cycle)
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109 | palSetPad(GPIOB, sda_pad); |
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110 | palClearPad(GPIOB, scl_pad); |
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111 | chThdSleepMicroseconds(10);
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112 | palSetPad(GPIOB, scl_pad); |
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113 | chThdSleepMicroseconds(5);
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114 | palClearPad(GPIOB, sda_pad); |
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115 | chThdSleepMicroseconds(5);
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116 | palClearPad(GPIOB, scl_pad); |
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117 | chThdSleepMicroseconds(5);
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118 | palSetPad(GPIOB, sda_pad); |
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119 | chThdSleepMicroseconds(5);
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120 | for (i = 0; i < 9; ++i) { |
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121 | palSetPad(GPIOB, scl_pad); |
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122 | chThdSleepMicroseconds(10);
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123 | palClearPad(GPIOB, scl_pad); |
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124 | chThdSleepMicroseconds(10);
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125 | } |
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126 | palSetPad(GPIOB, scl_pad); |
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127 | chThdSleepMicroseconds(5);
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128 | palClearPad(GPIOB, sda_pad); |
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129 | chThdSleepMicroseconds(5);
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130 | palClearPad(GPIOB, scl_pad); |
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131 | chThdSleepMicroseconds(10);
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132 | palSetPad(GPIOB, scl_pad); |
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133 | chThdSleepMicroseconds(5);
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134 | palSetPad(GPIOB, sda_pad); |
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135 | chThdSleepMicroseconds(5);
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136 | palClearPad(GPIOB, scl_pad); |
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137 | chThdSleepMicroseconds(10);
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138 | |||
139 | // perform bus clear as per I²C Specification v6 3.1.16
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140 | // note: clock is 100kHz (10us per cycle)
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141 | for (i = 0; i < 10; i++) { |
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142 | 58fe0e0b | Thomas Schöpping | palClearPad(GPIOB, scl_pad); |
143 | chThdSleepMicroseconds(5);
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144 | palSetPad(GPIOB, scl_pad); |
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145 | chThdSleepMicroseconds(5);
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146 | } |
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147 | |||
148 | // reconfigure I²C SCL
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149 | palSetPadMode(GPIOB, scl_pad, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); |
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150 | b4885314 | Thomas Schöpping | palSetPadMode(GPIOB, sda_pad, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); |
151 | 58fe0e0b | Thomas Schöpping | |
152 | b4885314 | Thomas Schöpping | return;
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153 | 58fe0e0b | Thomas Schöpping | } |