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amiro-os / modules / LightRing_1-0 / board.h @ d796dcdf

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1 e545e620 Thomas Schöpping
/*
2
AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
3 84f0ce9e Thomas Schöpping
Copyright (C) 2016..2019  Thomas Schöpping et al.
4 e545e620 Thomas Schöpping

5
This program is free software: you can redistribute it and/or modify
6
it under the terms of the GNU General Public License as published by
7
the Free Software Foundation, either version 3 of the License, or
8
(at your option) any later version.
9

10
This program is distributed in the hope that it will be useful,
11
but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
GNU General Public License for more details.
14

15
You should have received a copy of the GNU General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.
17
*/
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19 53710ca3 Marc Rothmann
/**
20 37bacabf Thomas Schöpping
 * @file
21 53710ca3 Marc Rothmann
 * @brief   LightRing v1.0 Board specific macros.
22
 *
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 * @addtogroup lightring_board
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 * @{
25
 */
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27 6ff06bbf Thomas Schöpping
#ifndef BOARD_H
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#define BOARD_H
29 e545e620 Thomas Schöpping
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/*===========================================================================*/
31
/* Driver constants.                                                         */
32
/*===========================================================================*/
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34 e545e620 Thomas Schöpping
/*
35 043cdf33 Thomas Schöpping
 * Setup for AMiRo LightRing v1.0 board.
36 e545e620 Thomas Schöpping
 */
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38
/*
39
 * Board identifier.
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 */
41 3cb82b1a Thomas Schöpping
#define BOARD_LIGHTRING_1_0
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#define BOARD_NAME              "AMiRo LightRing v1.0"
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44
/*
45
 * Board oscillators-related settings.
46
 * NOTE: LSE not fitted.
47
 */
48
#if !defined(STM32_LSECLK)
49
#define STM32_LSECLK                0U
50
#endif
51
52
#if !defined(STM32_HSECLK)
53
#define STM32_HSECLK                8000000U
54
#endif
55
56
/*
57
 * Board voltages.
58
 * Required for performance limits calculation.
59
 */
60
#define STM32_VDD                   330U
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62
/*
63
 * MCU type as defined in the ST header.
64
 */
65
#define STM32F103xE
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67
/*
68
 * IO pins assignments.
69
 */
70
#define GPIOA_PIN0                  0U
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#define GPIOA_PIN1                  1U
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#define GPIOA_LASER_RX              2U
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#define GPIOA_LASER_TX              3U
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#define GPIOA_LIGHT_BLANK           4U
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#define GPIOA_LIGHT_SCLK            5U
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#define GPIOA_PIN6                  6U
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#define GPIOA_LIGHT_MOSI            7U
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#define GPIOA_PIN8                  8U
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#define GPIOA_PROG_RX               9U
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#define GPIOA_PROG_TX               10U
81
#define GPIOA_CAN_RX                11U
82
#define GPIOA_CAN_TX                12U
83
#define GPIOA_SWDIO                 13U
84
#define GPIOA_SWCLK                 14U
85
#define GPIOA_PIN15                 15U
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87
#define GPIOB_PIN0                  0U
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#define GPIOB_PIN1                  1U
89
#define GPIOB_LASER_EN              2U
90
#define GPIOB_PIN3                  3U
91
#define GPIOB_PIN4                  4U
92
#define GPIOB_LASER_OC_N            5U
93
#define GPIOB_SYS_UART_DN           6U
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#define GPIOB_PIN7                  7U
95
#define GPIOB_WL_GDO2               8U
96
#define GPIOB_WL_GDO0               9U
97
#define GPIOB_MEM_SCL               10U
98
#define GPIOB_MEM_SDA               11U
99
#define GPIOB_WL_SS_N               12U
100
#define GPIOB_WL_SCLK               13U
101
#define GPIOB_WL_MISO               14U
102
#define GPIOB_WL_MOSI               15U
103
104
#define GPIOC_PIN0                  0U
105
#define GPIOC_PIN1                  1U
106
#define GPIOC_PIN2                  2U
107
#define GPIOC_PIN3                  3U
108
#define GPIOC_LIGHT_XLAT            4U
109
#define GPIOC_PIN5                  5U
110
#define GPIOC_PIN6                  6U
111
#define GPIOC_PIN7                  7U
112
#define GPIOC_PIN8                  8U
113
#define GPIOC_PIN9                  9U
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#define GPIOC_SYS_UART_RX           10U
115
#define GPIOC_SYS_UART_TX           11U
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#define GPIOC_PIN12                 12U
117
#define GPIOC_PIN13                 13U
118
#define GPIOC_SYS_PD_N              14U
119
#define GPIOC_PIN15                 15U
120
121
#define GPIOD_OSC_IN                0U
122
#define GPIOD_OSC_OUT               1U
123
#define GPIOD_SYS_INT_N             2U
124
#define GPIOD_PIN3                  3U
125
#define GPIOD_PIN4                  4U
126
#define GPIOD_PIN5                  5U
127
#define GPIOD_PIN6                  6U
128
#define GPIOD_PIN7                  7U
129
#define GPIOD_PIN8                  8U
130
#define GPIOD_PIN9                  9U
131
#define GPIOD_PIN10                 10U
132
#define GPIOD_PIN11                 11U
133
#define GPIOD_PIN12                 12U
134
#define GPIOD_PIN13                 13U
135
#define GPIOD_PIN14                 14U
136
#define GPIOD_PIN15                 15U
137
138
#define GPIOE_PIN0                  0U
139
#define GPIOE_PIN1                  1U
140
#define GPIOE_PIN2                  2U
141
#define GPIOE_PIN3                  3U
142
#define GPIOE_PIN4                  4U
143
#define GPIOE_PIN5                  5U
144
#define GPIOE_PIN6                  6U
145
#define GPIOE_PIN7                  7U
146
#define GPIOE_PIN8                  8U
147
#define GPIOE_PIN9                  9U
148
#define GPIOE_PIN10                 10U
149
#define GPIOE_PIN11                 11U
150
#define GPIOE_PIN12                 12U
151
#define GPIOE_PIN13                 13U
152
#define GPIOE_PIN14                 14U
153
#define GPIOE_PIN15                 15U
154
155
#define GPIOF_PIN0                  0U
156
#define GPIOF_PIN1                  1U
157
#define GPIOF_PIN2                  2U
158
#define GPIOF_PIN3                  3U
159
#define GPIOF_PIN4                  4U
160
#define GPIOF_PIN5                  5U
161
#define GPIOF_PIN6                  6U
162
#define GPIOF_PIN7                  7U
163
#define GPIOF_PIN8                  8U
164
#define GPIOF_PIN9                  9U
165
#define GPIOF_PIN10                 10U
166
#define GPIOF_PIN11                 11U
167
#define GPIOF_PIN12                 12U
168
#define GPIOF_PIN13                 13U
169
#define GPIOF_PIN14                 14U
170
#define GPIOF_PIN15                 15U
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172
#define GPIOG_PIN0                  0U
173
#define GPIOG_PIN1                  1U
174
#define GPIOG_PIN2                  2U
175
#define GPIOG_PIN3                  3U
176
#define GPIOG_PIN4                  4U
177
#define GPIOG_PIN5                  5U
178
#define GPIOG_PIN6                  6U
179
#define GPIOG_PIN7                  7U
180
#define GPIOG_PIN8                  8U
181
#define GPIOG_PIN9                  9U
182
#define GPIOG_PIN10                 10U
183
#define GPIOG_PIN11                 11U
184
#define GPIOG_PIN12                 12U
185
#define GPIOG_PIN13                 13U
186
#define GPIOG_PIN14                 14U
187
#define GPIOG_PIN15                 15U
188
189
/*
190
 * IO lines assignments.
191
 */
192
#define LINE_LASER_RX               PAL_LINE(GPIOA, GPIOA_LASER_RX)
193
#define LINE_LASER_TX               PAL_LINE(GPIOA, GPIOA_LASER_TX)
194
#define LINE_LIGHT_BLANK            PAL_LINE(GPIOA, GPIOA_LIGHT_BLANK)
195
#define LINE_LIGHT_SCLK             PAL_LINE(GPIOA, GPIOA_LIGHT_SCLK)
196
#define LINE_LIGHT_MOSI             PAL_LINE(GPIOA, GPIOA_LIGHT_MOSI)
197
#define LINE_PROG_RX                PAL_LINE(GPIOA, GPIOA_PROG_RX)
198
#define LINE_PROG_TX                PAL_LINE(GPIOA, GPIOA_PROG_TX)
199
#define LINE_CAN_RX                 PAL_LINE(GPIOA, GPIOA_CAN_RX)
200
#define LINE_CAN_TX                 PAL_LINE(GPIOA, GPIOA_CAN_TX)
201
#define LINE_SWDIO                  PAL_LINE(GPIOA, GPIOA_SWDIO)
202
#define LINE_SWCLK                  PAL_LINE(GPIOA, GPIOA_SWCLK)
203
204
#define LINE_LASER_EN               PAL_LINE(GPIOB, GPIOB_LASER_EN)
205
#define LINE_LASER_OC_N             PAL_LINE(GPIOB, GPIOB_LASER_OC_N)
206
#define LINE_SYS_UART_DN            PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
207
#define LINE_WL_GDO2                PAL_LINE(GPIOB, GPIOB_WL_GDO2)
208
#define LINE_WL_GDO0                PAL_LINE(GPIOB, GPIOB_WL_GDO0)
209
#define LINE_MEM_SCL                PAL_LINE(GPIOB, GPIOB_MEM_SCL)
210
#define LINE_MEM_SDA                PAL_LINE(GPIOB, GPIOB_MEM_SDA)
211
#define LINE_WL_SS_N                PAL_LINE(GPIOB, GPIOB_WL_SS_N)
212
#define LINE_WL_SCLK                PAL_LINE(GPIOB, GPIOB_WL_SCLK)
213
#define LINE_WL_MISO                PAL_LINE(GPIOB, GPIOB_WL_MISO)
214
#define LINE_WL_MOSI                PAL_LINE(GPIOB, GPIOB_WL_MOSI)
215
216
#define LINE_LIGHT_XLAT             PAL_LINE(GPIOC, GPIOC_LIGHT_XLAT)
217
#define LINE_SYS_UART_RX            PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
218
#define LINE_SYS_UART_TX            PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
219
#define LINE_SYS_PD_N               PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
220
221
#define LINE_SYS_INT_N              PAL_LINE(GPIOD, GPIOD_SYS_INT_N)
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223 cda14729 Thomas Schöpping
/*===========================================================================*/
224
/* Driver pre-compile time settings.                                         */
225
/*===========================================================================*/
226
227
/*===========================================================================*/
228
/* Derived constants and error checks.                                       */
229
/*===========================================================================*/
230
231
/*===========================================================================*/
232
/* Driver data structures and types.                                         */
233
/*===========================================================================*/
234
235
/*===========================================================================*/
236
/* Driver macros.                                                            */
237
/*===========================================================================*/
238
239 e545e620 Thomas Schöpping
/*
240
 * I/O ports initial setup, this configuration is established soon after reset
241
 * in the initialization code.
242
 * Please refer to the STM32 Reference Manual for details.
243
 */
244
#define PIN_MODE_INPUT              0U
245
#define PIN_MODE_OUTPUT_2M          2U
246
#define PIN_MODE_OUTPUT_10M         1U
247
#define PIN_MODE_OUTPUT_50M         3U
248
#define PIN_CNF_INPUT_ANALOG        0U
249
#define PIN_CNF_INPUT_FLOATING      1U
250
#define PIN_CNF_INPUT_PULLX         2U
251
#define PIN_CNF_OUTPUT_PUSHPULL     0U
252
#define PIN_CNF_OUTPUT_OPENDRAIN    1U
253
#define PIN_CNF_ALTERNATE_PUSHPULL  2U
254
#define PIN_CNF_ALTERNATE_OPENDRAIN 3U
255
#define PIN_CR(pin, mode, cnf)      (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U))
256
#define PIN_ODR_LOW(n)              (0U << (n))
257
#define PIN_ODR_HIGH(n)             (1U << (n))
258 37bacabf Thomas Schöpping
#define PIN_IGNORE(n)               (1U << (n))
259 e545e620 Thomas Schöpping
260
/*
261
 * GPIOA setup:
262
 *
263
 * PA0  - PIN0                      (input floating)
264
 * PA1  - PIN1                      (input floating)
265
 * PA2  - LASER_RX                  (alternate pushpull high 50MHz)
266
 * PA3  - LASER_TX                  (input pullup)
267
 * PA4  - LIGHT_BLANK               (output pushpull high 50MHz)
268
 * PA5  - LIGHT_SCLK                (alternate pushpull 50MHz)
269
 * PA6  - PIN6                      (input foating)
270
 * PA7  - LIGHT_MOSI                (alternate pushpull 50MHz)
271
 * PA8  - PIN8                      (input floating)
272
 * PA9  - PROG_RX                   (alternate pushpull 50MHz)
273
 * PA10 - PROG_TX                   (input pullup)
274
 * PA11 - CAN_RX                    (input floating)
275
 * PA12 - CAN_TX                    (alternate pushpull 50MHz)
276
 * PA13 - SWDIO                     (input pullup)
277
 * PA14 - SWCLK                     (input pullup)
278
 * PA15 - PIN15                     (input floating)
279
 */
280 37bacabf Thomas Schöpping
#define VAL_GPIOAIGN                0
281 e545e620 Thomas Schöpping
#define VAL_GPIOACRL                (PIN_CR(GPIOA_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
282
                                     PIN_CR(GPIOA_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
283
                                     PIN_CR(GPIOA_LASER_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |   \
284
                                     PIN_CR(GPIOA_LASER_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |               \
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                                     PIN_CR(GPIOA_LIGHT_BLANK, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |   \
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                                     PIN_CR(GPIOA_LIGHT_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \
287
                                     PIN_CR(GPIOA_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
288
                                     PIN_CR(GPIOA_LIGHT_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
289
#define VAL_GPIOACRH                (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
290
                                     PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |    \
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                                     PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
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                                     PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |              \
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                                     PIN_CR(GPIOA_CAN_TX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |     \
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                                     PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
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                                     PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
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                                     PIN_CR(GPIOA_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
297
#define VAL_GPIOAODR                (PIN_ODR_LOW(GPIOA_PIN0) |                                                   \
298
                                     PIN_ODR_LOW(GPIOA_PIN1) |                                                   \
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                                     PIN_ODR_HIGH(GPIOA_LASER_RX) |                                              \
300
                                     PIN_ODR_HIGH(GPIOA_LASER_TX) |                                              \
301
                                     PIN_ODR_HIGH(GPIOA_LIGHT_BLANK) |                                           \
302
                                     PIN_ODR_HIGH(GPIOA_LIGHT_SCLK) |                                            \
303
                                     PIN_ODR_LOW(GPIOA_PIN6) |                                                   \
304
                                     PIN_ODR_HIGH(GPIOA_LIGHT_MOSI) |                                            \
305
                                     PIN_ODR_LOW(GPIOA_PIN8) |                                                   \
306
                                     PIN_ODR_HIGH(GPIOA_PROG_RX) |                                               \
307
                                     PIN_ODR_HIGH(GPIOA_PROG_TX) |                                               \
308
                                     PIN_ODR_HIGH(GPIOA_CAN_RX) |                                                \
309
                                     PIN_ODR_HIGH(GPIOA_CAN_TX) |                                                \
310
                                     PIN_ODR_HIGH(GPIOA_SWDIO) |                                                 \
311
                                     PIN_ODR_HIGH(GPIOA_SWCLK) |                                                 \
312
                                     PIN_ODR_LOW(GPIOA_PIN15))
313
314
/*
315
 * GPIOB setup:
316
 *
317
 * PB0  - PIN0                      (input floating)
318
 * PB1  - PIN1                      (input floating)
319
 * PB2  - LASER_EN                  (output pushpull low 50MHz)
320
 * PB3  - PIN3                      (input floating)
321
 * PB4  - PIN4                      (input floating)
322
 * PB5  - LASER_OC_N                (input floating)
323
 * PB6  - SYS_UART_DN               (output opendrain high 50MHz)
324 c930aa01 Thomas Schöpping
 * PB7  - PIN7                      (input floating)
325 e545e620 Thomas Schöpping
 * PB8  - WL_GDO2                   (input pullup)
326
 * PB9  - WL_GDO0                   (input pullup)
327
 * PB10 - MEM_SCL                   (alternate opendrain 50MHz)
328
 * PB11 - MEM_SDA                   (alternate opendrain 50MHz)
329
 * PB12 - WL_SS_N                   (output pushpull high 50MHz)
330
 * PB13 - WL_SCLK                   (alternate pushpull 50MHz)
331
 * PB14 - WL_MISO                   (input pullup)
332
 * PB15 - WL_MOSI                   (alternate pushpull 50MHz)
333
 */
334 37bacabf Thomas Schöpping
#define VAL_GPIOBIGN                (PIN_IGNORE(GPIOB_SYS_UART_DN)) & 0
335 e545e620 Thomas Schöpping
#define VAL_GPIOBCRL                (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
336
                                     PIN_CR(GPIOB_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
337
                                     PIN_CR(GPIOB_LASER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |      \
338
                                     PIN_CR(GPIOB_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
339
                                     PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
340
                                     PIN_CR(GPIOB_LASER_OC_N, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |          \
341
                                     PIN_CR(GPIOB_SYS_UART_DN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |  \
342
                                     PIN_CR(GPIOB_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
343
#define VAL_GPIOBCRH                (PIN_CR(GPIOB_WL_GDO2, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
344
                                     PIN_CR(GPIOB_WL_GDO0, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
345
                                     PIN_CR(GPIOB_MEM_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |   \
346
                                     PIN_CR(GPIOB_MEM_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |   \
347
                                     PIN_CR(GPIOB_WL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
348
                                     PIN_CR(GPIOB_WL_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |    \
349
                                     PIN_CR(GPIOB_WL_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
350
                                     PIN_CR(GPIOB_WL_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
351
#define VAL_GPIOBODR                (PIN_ODR_LOW(GPIOB_PIN0) |                                                   \
352
                                     PIN_ODR_LOW(GPIOB_PIN1) |                                                   \
353
                                     PIN_ODR_LOW(GPIOB_LASER_EN) |                                               \
354
                                     PIN_ODR_LOW(GPIOB_PIN3) |                                                   \
355
                                     PIN_ODR_LOW(GPIOB_PIN4) |                                                   \
356
                                     PIN_ODR_HIGH(GPIOB_LASER_OC_N) |                                            \
357
                                     PIN_ODR_HIGH(GPIOB_SYS_UART_DN) |                                           \
358
                                     PIN_ODR_LOW(GPIOB_PIN7) |                                                   \
359
                                     PIN_ODR_HIGH(GPIOB_WL_GDO2) |                                               \
360
                                     PIN_ODR_HIGH(GPIOB_WL_GDO0) |                                               \
361
                                     PIN_ODR_HIGH(GPIOB_MEM_SCL) |                                               \
362
                                     PIN_ODR_HIGH(GPIOB_MEM_SDA) |                                               \
363
                                     PIN_ODR_HIGH(GPIOB_WL_SS_N) |                                               \
364
                                     PIN_ODR_HIGH(GPIOB_WL_SCLK) |                                               \
365
                                     PIN_ODR_HIGH(GPIOB_WL_MISO) |                                               \
366
                                     PIN_ODR_HIGH(GPIOB_WL_MOSI))
367
368
/*
369
 * GPIOC setup:
370
 *
371
 * PC0  - PIN0                      (input floating)
372
 * PC1  - PIN1                      (input floating)
373
 * PC2  - PIN2                      (input floating)
374
 * PC3  - PIN3                      (input floating)
375 c930aa01 Thomas Schöpping
 * PC4  - LIGHT_XLAT                (output pushpull low 50MHz)
376 e545e620 Thomas Schöpping
 * PC5  - PIN5                      (input floating)
377
 * PC6  - PIN6                      (input floating)
378
 * PC7  - PIN7                      (input floating)
379
 * PC8  - PIN8                      (input floating)
380
 * PC9  - PIN9                      (input floating)
381
 * PC10 - SYS_UART_RX               (input pullup)
382
 * PC11 - SYS_UART_TX               (input pullup)
383
 * PC12 - PIN12                     (input floating)
384
 * PC13 - PIN13                     (input floating)
385
 * PC14 - SYS_PD_N                  (output opendrain high 50MHz)
386
 * PC15 - PIN15                     (input floating)
387
 */
388 37bacabf Thomas Schöpping
#define VAL_GPIOCIGN                (PIN_IGNORE(GPIOC_SYS_PD_N)) & 0
389 e545e620 Thomas Schöpping
#define VAL_GPIOCCRL                (PIN_CR(GPIOC_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
390
                                     PIN_CR(GPIOC_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
391
                                     PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
392
                                     PIN_CR(GPIOC_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
393 c930aa01 Thomas Schöpping
                                     PIN_CR(GPIOC_LIGHT_XLAT, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |    \
394 e545e620 Thomas Schöpping
                                     PIN_CR(GPIOC_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
395
                                     PIN_CR(GPIOC_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
396
                                     PIN_CR(GPIOC_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
397
#define VAL_GPIOCCRH                (PIN_CR(GPIOC_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
398
                                     PIN_CR(GPIOC_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
399
                                     PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |            \
400
                                     PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |            \
401
                                     PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
402
                                     PIN_CR(GPIOC_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
403
                                     PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |     \
404
                                     PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
405
#define VAL_GPIOCODR                (PIN_ODR_LOW(GPIOC_PIN0) |                                                   \
406
                                     PIN_ODR_LOW(GPIOC_PIN1) |                                                   \
407
                                     PIN_ODR_LOW(GPIOC_PIN2) |                                                   \
408
                                     PIN_ODR_LOW(GPIOC_PIN3) |                                                   \
409
                                     PIN_ODR_LOW(GPIOC_LIGHT_XLAT) |                                             \
410
                                     PIN_ODR_LOW(GPIOC_PIN5) |                                                   \
411
                                     PIN_ODR_LOW(GPIOC_PIN6) |                                                   \
412
                                     PIN_ODR_LOW(GPIOC_PIN7) |                                                   \
413
                                     PIN_ODR_LOW(GPIOC_PIN8) |                                                   \
414
                                     PIN_ODR_LOW(GPIOC_PIN9) |                                                   \
415
                                     PIN_ODR_HIGH(GPIOC_SYS_UART_RX) |                                           \
416
                                     PIN_ODR_HIGH(GPIOC_SYS_UART_TX) |                                           \
417
                                     PIN_ODR_LOW(GPIOC_PIN12) |                                                  \
418
                                     PIN_ODR_LOW(GPIOC_PIN13) |                                                  \
419
                                     PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                                              \
420
                                     PIN_ODR_LOW(GPIOC_PIN15))
421
422
/*
423
 * GPIOD setup:
424
 *
425
 * PD0  - OSC_IN                    (input floating)
426
 * PD1  - OSC_OUT                   (input floating)
427
 * PD2  - SYS_INT_N                 (output opendrain low 50MHz)
428
 * PD3  - PIN3                      (input floating)
429
 * PD4  - PIN4                      (input floating)
430
 * PD5  - PIN5                      (input floating)
431
 * PD6  - PIN6                      (input floating)
432
 * PD7  - PIN7                      (input floating)
433
 * PD8  - PIN8                      (input floating)
434
 * PD9  - PIN9                      (input floating)
435
 * PD10 - PIN10                     (input floating)
436
 * PD11 - PIN11                     (input floating)
437
 * PD12 - PIN12                     (input floating)
438
 * PD13 - PIN13                     (input floating)
439
 * PD14 - PIN14                     (input floating)
440
 * PD15 - PIN15                     (input floating)
441
 */
442 37bacabf Thomas Schöpping
#define VAL_GPIODIGN                (PIN_IGNORE(GPIOD_SYS_INT_N)) & 0
443 e545e620 Thomas Schöpping
#define VAL_GPIODCRL                (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |              \
444
                                     PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |             \
445
                                     PIN_CR(GPIOD_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |    \
446
                                     PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
447
                                     PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
448
                                     PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
449
                                     PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
450
                                     PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
451
#define VAL_GPIODCRH                (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
452
                                     PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
453
                                     PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
454
                                     PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
455
                                     PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
456
                                     PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
457
                                     PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
458
                                     PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
459
#define VAL_GPIODODR                (PIN_ODR_HIGH(GPIOD_OSC_IN) |                                                \
460
                                     PIN_ODR_HIGH(GPIOD_OSC_OUT) |                                               \
461
                                     PIN_ODR_LOW(GPIOD_SYS_INT_N) |                                             \
462
                                     PIN_ODR_LOW(GPIOD_PIN3) |                                                   \
463
                                     PIN_ODR_LOW(GPIOD_PIN4) |                                                   \
464
                                     PIN_ODR_LOW(GPIOD_PIN5) |                                                   \
465
                                     PIN_ODR_LOW(GPIOD_PIN6) |                                                   \
466
                                     PIN_ODR_LOW(GPIOD_PIN7) |                                                   \
467
                                     PIN_ODR_LOW(GPIOD_PIN8) |                                                   \
468
                                     PIN_ODR_LOW(GPIOD_PIN9) |                                                   \
469
                                     PIN_ODR_LOW(GPIOD_PIN10) |                                                  \
470
                                     PIN_ODR_LOW(GPIOD_PIN11) |                                                  \
471
                                     PIN_ODR_LOW(GPIOD_PIN12) |                                                  \
472
                                     PIN_ODR_LOW(GPIOD_PIN13) |                                                  \
473
                                     PIN_ODR_LOW(GPIOD_PIN14) |                                                  \
474
                                     PIN_ODR_LOW(GPIOD_PIN15))
475
476
/*
477
 * GPIOE setup:
478
 *
479
 * PE0  - PIN0                      (input floating)
480
 * PE1  - PIN1                      (input floating)
481
 * PE2  - PIN2                      (input floating)
482
 * PE3  - PIN3                      (input floating)
483
 * PE4  - PIN4                      (input floating)
484
 * PE5  - PIN5                      (input floating)
485
 * PE6  - PIN6                      (input floating)
486
 * PE7  - PIN7                      (input floating)
487
 * PE8  - PIN8                      (input floating)
488
 * PE9  - PIN9                      (input floating)
489
 * PE10 - PIN10                     (input floating)
490
 * PE11 - PIN11                     (input floating)
491
 * PE12 - PIN12                     (input floating)
492
 * PE13 - PIN13                     (input floating)
493
 * PE14 - PIN14                     (input floating)
494
 * PE15 - PIN15                     (input floating)
495
 */
496 37bacabf Thomas Schöpping
#define VAL_GPIOEIGN                0
497 e545e620 Thomas Schöpping
#define VAL_GPIOECRL                (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
498
                                     PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
499
                                     PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
500
                                     PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
501
                                     PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
502
                                     PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
503
                                     PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
504
                                     PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
505
#define VAL_GPIOECRH                (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
506
                                     PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
507
                                     PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
508
                                     PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
509
                                     PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
510
                                     PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
511
                                     PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
512
                                     PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
513
#define VAL_GPIOEODR                (PIN_ODR_LOW(GPIOE_PIN0) |                                                     \
514
                                     PIN_ODR_LOW(GPIOE_PIN1) |                                                     \
515
                                     PIN_ODR_LOW(GPIOE_PIN2) |                                                     \
516
                                     PIN_ODR_LOW(GPIOE_PIN3) |                                                     \
517
                                     PIN_ODR_LOW(GPIOE_PIN4) |                                                     \
518
                                     PIN_ODR_LOW(GPIOE_PIN5) |                                                     \
519
                                     PIN_ODR_LOW(GPIOE_PIN6) |                                                     \
520
                                     PIN_ODR_LOW(GPIOE_PIN7) |                                                     \
521
                                     PIN_ODR_LOW(GPIOE_PIN8) |                                                     \
522
                                     PIN_ODR_LOW(GPIOE_PIN9) |                                                     \
523
                                     PIN_ODR_LOW(GPIOE_PIN10) |                                                    \
524
                                     PIN_ODR_LOW(GPIOE_PIN11) |                                                    \
525
                                     PIN_ODR_LOW(GPIOE_PIN12) |                                                    \
526
                                     PIN_ODR_LOW(GPIOE_PIN13) |                                                    \
527
                                     PIN_ODR_LOW(GPIOE_PIN14) |                                                    \
528
                                     PIN_ODR_LOW(GPIOE_PIN15))
529
530
/*
531
 * GPIOF setup:
532
 *
533
 * PF0  - PIN0                      (input floating)
534
 * PF1  - PIN1                      (input floating)
535
 * PF2  - PIN2                      (input floating)
536
 * PF3  - PIN3                      (input floating)
537
 * PF4  - PIN4                      (input floating)
538
 * PF5  - PIN5                      (input floating)
539
 * PF6  - PIN6                      (input floating)
540
 * PF7  - PIN7                      (input floating)
541
 * PF8  - PIN8                      (input floating)
542
 * PF9  - PIN9                      (input floating)
543
 * PF10 - PIN10                     (input floating)
544
 * PF11 - PIN11                     (input floating)
545
 * PF12 - PIN12                     (input floating)
546
 * PF13 - PIN13                     (input floating)
547
 * PF14 - PIN14                     (input floating)
548
 * PF15 - PIN15                     (input floating)
549
 */
550 37bacabf Thomas Schöpping
#define VAL_GPIOFIGN                0
551 e545e620 Thomas Schöpping
#define VAL_GPIOFCRL                (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
552
                                     PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
553
                                     PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
554
                                     PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
555
                                     PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
556
                                     PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
557
                                     PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
558
                                     PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
559
#define VAL_GPIOFCRH                (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
560
                                     PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
561
                                     PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
562
                                     PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
563
                                     PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
564
                                     PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
565
                                     PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
566
                                     PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
567
#define VAL_GPIOFODR                (PIN_ODR_LOW(GPIOF_PIN0) |                                                     \
568
                                     PIN_ODR_LOW(GPIOF_PIN1) |                                                     \
569
                                     PIN_ODR_LOW(GPIOF_PIN2) |                                                     \
570
                                     PIN_ODR_LOW(GPIOF_PIN3) |                                                     \
571
                                     PIN_ODR_LOW(GPIOF_PIN4) |                                                     \
572
                                     PIN_ODR_LOW(GPIOF_PIN5) |                                                     \
573
                                     PIN_ODR_LOW(GPIOF_PIN6) |                                                     \
574
                                     PIN_ODR_LOW(GPIOF_PIN7) |                                                     \
575
                                     PIN_ODR_LOW(GPIOF_PIN8) |                                                     \
576
                                     PIN_ODR_LOW(GPIOF_PIN9) |                                                     \
577
                                     PIN_ODR_LOW(GPIOF_PIN10) |                                                    \
578
                                     PIN_ODR_LOW(GPIOF_PIN11) |                                                    \
579
                                     PIN_ODR_LOW(GPIOF_PIN12) |                                                    \
580
                                     PIN_ODR_LOW(GPIOF_PIN13) |                                                    \
581
                                     PIN_ODR_LOW(GPIOF_PIN14) |                                                    \
582
                                     PIN_ODR_LOW(GPIOF_PIN15))
583
584
/*
585
 * GPIOG setup:
586
 *
587
 * PG0  - PIN0                      (input floating)
588
 * PG1  - PIN1                      (input floating)
589
 * PG2  - PIN2                      (input floating)
590
 * PG3  - PIN3                      (input floating)
591
 * PG4  - PIN4                      (input floating)
592
 * PG5  - PIN5                      (input floating)
593
 * PG6  - PIN6                      (input floating)
594
 * PG7  - PIN7                      (input floating)
595
 * PG8  - PIN8                      (input floating)
596
 * PG9  - PIN9                      (input floating)
597
 * PG10 - PIN10                     (input floating)
598
 * PG11 - PIN11                     (input floating)
599
 * PG12 - PIN12                     (input floating)
600
 * PG13 - PIN13                     (input floating)
601
 * PG14 - PIN14                     (input floating)
602
 * PG15 - PIN15                     (input floating)
603
 */
604 37bacabf Thomas Schöpping
#define VAL_GPIOGIGN                0
605 e545e620 Thomas Schöpping
#define VAL_GPIOGCRL                (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
606
                                     PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
607
                                     PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
608
                                     PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
609
                                     PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
610
                                     PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
611
                                     PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
612
                                     PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
613
#define VAL_GPIOGCRH                (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
614
                                     PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
615
                                     PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
616
                                     PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
617
                                     PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
618
                                     PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
619
                                     PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
620
                                     PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
621
#define VAL_GPIOGODR                (PIN_ODR_LOW(GPIOG_PIN0) |                                                     \
622
                                     PIN_ODR_LOW(GPIOG_PIN1) |                                                     \
623
                                     PIN_ODR_LOW(GPIOG_PIN2) |                                                     \
624
                                     PIN_ODR_LOW(GPIOG_PIN3) |                                                     \
625
                                     PIN_ODR_LOW(GPIOG_PIN4) |                                                     \
626
                                     PIN_ODR_LOW(GPIOG_PIN5) |                                                     \
627
                                     PIN_ODR_LOW(GPIOG_PIN6) |                                                     \
628
                                     PIN_ODR_LOW(GPIOG_PIN7) |                                                     \
629
                                     PIN_ODR_LOW(GPIOG_PIN8) |                                                     \
630
                                     PIN_ODR_LOW(GPIOG_PIN9) |                                                     \
631
                                     PIN_ODR_LOW(GPIOG_PIN10) |                                                    \
632
                                     PIN_ODR_LOW(GPIOG_PIN11) |                                                    \
633
                                     PIN_ODR_LOW(GPIOG_PIN12) |                                                    \
634
                                     PIN_ODR_LOW(GPIOG_PIN13) |                                                    \
635
                                     PIN_ODR_LOW(GPIOG_PIN14) |                                                    \
636
                                     PIN_ODR_LOW(GPIOG_PIN15))
637
638 cda14729 Thomas Schöpping
/*===========================================================================*/
639
/* External declarations.                                                    */
640
/*===========================================================================*/
641
642 e545e620 Thomas Schöpping
#if !defined(_FROM_ASM_)
643
#ifdef __cplusplus
644
extern "C" {
645
#endif
646
  void boardInit(void);
647
#ifdef __cplusplus
648
}
649
#endif
650
#endif /* _FROM_ASM_ */
651
652 6ff06bbf Thomas Schöpping
#endif /* BOARD_H */
653 53710ca3 Marc Rothmann
654
/** @} */