amiro-os / modules / LightRing_1-0 / board.h @ 3cb82b1a
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1 | e545e620 | Thomas Schöpping | /*
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2 | AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
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3 | 84f0ce9e | Thomas Schöpping | Copyright (C) 2016..2019 Thomas Schöpping et al.
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4 | e545e620 | Thomas Schöpping | |
5 | This program is free software: you can redistribute it and/or modify
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6 | it under the terms of the GNU General Public License as published by
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7 | the Free Software Foundation, either version 3 of the License, or
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8 | (at your option) any later version.
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9 | |||
10 | This program is distributed in the hope that it will be useful,
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11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 | GNU General Public License for more details.
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14 | |||
15 | You should have received a copy of the GNU General Public License
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16 | along with this program. If not, see <http://www.gnu.org/licenses/>.
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17 | */
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18 | |||
19 | 53710ca3 | Marc Rothmann | /**
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20 | 37bacabf | Thomas Schöpping | * @file
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21 | 53710ca3 | Marc Rothmann | * @brief LightRing v1.0 Board specific macros.
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22 | *
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23 | * @addtogroup lightring_board
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24 | * @{
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25 | */
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26 | |||
27 | 6ff06bbf | Thomas Schöpping | #ifndef BOARD_H
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28 | #define BOARD_H
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29 | e545e620 | Thomas Schöpping | |
30 | /*
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31 | 043cdf33 | Thomas Schöpping | * Setup for AMiRo LightRing v1.0 board.
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32 | e545e620 | Thomas Schöpping | */
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33 | |||
34 | /*
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35 | * Board identifier.
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36 | */
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37 | 3cb82b1a | Thomas Schöpping | #define BOARD_LIGHTRING_1_0
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38 | #define BOARD_NAME "AMiRo LightRing v1.0" |
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39 | e545e620 | Thomas Schöpping | |
40 | /*
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41 | * Board oscillators-related settings.
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42 | * NOTE: LSE not fitted.
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43 | */
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44 | #if !defined(STM32_LSECLK)
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45 | #define STM32_LSECLK 0U |
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46 | #endif
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47 | |||
48 | #if !defined(STM32_HSECLK)
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49 | #define STM32_HSECLK 8000000U |
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50 | #endif
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51 | |||
52 | /*
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53 | * Board voltages.
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54 | * Required for performance limits calculation.
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55 | */
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56 | #define STM32_VDD 330U |
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57 | |||
58 | /*
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59 | * MCU type as defined in the ST header.
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60 | */
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61 | #define STM32F103xE
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62 | |||
63 | /*
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64 | * IO pins assignments.
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65 | */
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66 | #define GPIOA_PIN0 0U |
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67 | #define GPIOA_PIN1 1U |
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68 | #define GPIOA_LASER_RX 2U |
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69 | #define GPIOA_LASER_TX 3U |
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70 | #define GPIOA_LIGHT_BLANK 4U |
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71 | #define GPIOA_LIGHT_SCLK 5U |
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72 | #define GPIOA_PIN6 6U |
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73 | #define GPIOA_LIGHT_MOSI 7U |
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74 | #define GPIOA_PIN8 8U |
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75 | #define GPIOA_PROG_RX 9U |
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76 | #define GPIOA_PROG_TX 10U |
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77 | #define GPIOA_CAN_RX 11U |
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78 | #define GPIOA_CAN_TX 12U |
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79 | #define GPIOA_SWDIO 13U |
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80 | #define GPIOA_SWCLK 14U |
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81 | #define GPIOA_PIN15 15U |
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82 | |||
83 | #define GPIOB_PIN0 0U |
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84 | #define GPIOB_PIN1 1U |
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85 | #define GPIOB_LASER_EN 2U |
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86 | #define GPIOB_PIN3 3U |
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87 | #define GPIOB_PIN4 4U |
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88 | #define GPIOB_LASER_OC_N 5U |
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89 | #define GPIOB_SYS_UART_DN 6U |
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90 | #define GPIOB_PIN7 7U |
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91 | #define GPIOB_WL_GDO2 8U |
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92 | #define GPIOB_WL_GDO0 9U |
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93 | #define GPIOB_MEM_SCL 10U |
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94 | #define GPIOB_MEM_SDA 11U |
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95 | #define GPIOB_WL_SS_N 12U |
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96 | #define GPIOB_WL_SCLK 13U |
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97 | #define GPIOB_WL_MISO 14U |
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98 | #define GPIOB_WL_MOSI 15U |
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99 | |||
100 | #define GPIOC_PIN0 0U |
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101 | #define GPIOC_PIN1 1U |
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102 | #define GPIOC_PIN2 2U |
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103 | #define GPIOC_PIN3 3U |
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104 | #define GPIOC_LIGHT_XLAT 4U |
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105 | #define GPIOC_PIN5 5U |
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106 | #define GPIOC_PIN6 6U |
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107 | #define GPIOC_PIN7 7U |
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108 | #define GPIOC_PIN8 8U |
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109 | #define GPIOC_PIN9 9U |
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110 | #define GPIOC_SYS_UART_RX 10U |
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111 | #define GPIOC_SYS_UART_TX 11U |
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112 | #define GPIOC_PIN12 12U |
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113 | #define GPIOC_PIN13 13U |
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114 | #define GPIOC_SYS_PD_N 14U |
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115 | #define GPIOC_PIN15 15U |
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116 | |||
117 | #define GPIOD_OSC_IN 0U |
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118 | #define GPIOD_OSC_OUT 1U |
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119 | #define GPIOD_SYS_INT_N 2U |
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120 | #define GPIOD_PIN3 3U |
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121 | #define GPIOD_PIN4 4U |
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122 | #define GPIOD_PIN5 5U |
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123 | #define GPIOD_PIN6 6U |
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124 | #define GPIOD_PIN7 7U |
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125 | #define GPIOD_PIN8 8U |
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126 | #define GPIOD_PIN9 9U |
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127 | #define GPIOD_PIN10 10U |
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128 | #define GPIOD_PIN11 11U |
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129 | #define GPIOD_PIN12 12U |
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130 | #define GPIOD_PIN13 13U |
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131 | #define GPIOD_PIN14 14U |
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132 | #define GPIOD_PIN15 15U |
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133 | |||
134 | #define GPIOE_PIN0 0U |
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135 | #define GPIOE_PIN1 1U |
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136 | #define GPIOE_PIN2 2U |
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137 | #define GPIOE_PIN3 3U |
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138 | #define GPIOE_PIN4 4U |
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139 | #define GPIOE_PIN5 5U |
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140 | #define GPIOE_PIN6 6U |
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141 | #define GPIOE_PIN7 7U |
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142 | #define GPIOE_PIN8 8U |
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143 | #define GPIOE_PIN9 9U |
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144 | #define GPIOE_PIN10 10U |
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145 | #define GPIOE_PIN11 11U |
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146 | #define GPIOE_PIN12 12U |
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147 | #define GPIOE_PIN13 13U |
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148 | #define GPIOE_PIN14 14U |
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149 | #define GPIOE_PIN15 15U |
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150 | |||
151 | #define GPIOF_PIN0 0U |
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152 | #define GPIOF_PIN1 1U |
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153 | #define GPIOF_PIN2 2U |
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154 | #define GPIOF_PIN3 3U |
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155 | #define GPIOF_PIN4 4U |
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156 | #define GPIOF_PIN5 5U |
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157 | #define GPIOF_PIN6 6U |
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158 | #define GPIOF_PIN7 7U |
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159 | #define GPIOF_PIN8 8U |
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160 | #define GPIOF_PIN9 9U |
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161 | #define GPIOF_PIN10 10U |
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162 | #define GPIOF_PIN11 11U |
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163 | #define GPIOF_PIN12 12U |
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164 | #define GPIOF_PIN13 13U |
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165 | #define GPIOF_PIN14 14U |
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166 | #define GPIOF_PIN15 15U |
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167 | |||
168 | #define GPIOG_PIN0 0U |
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169 | #define GPIOG_PIN1 1U |
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170 | #define GPIOG_PIN2 2U |
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171 | #define GPIOG_PIN3 3U |
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172 | #define GPIOG_PIN4 4U |
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173 | #define GPIOG_PIN5 5U |
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174 | #define GPIOG_PIN6 6U |
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175 | #define GPIOG_PIN7 7U |
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176 | #define GPIOG_PIN8 8U |
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177 | #define GPIOG_PIN9 9U |
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178 | #define GPIOG_PIN10 10U |
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179 | #define GPIOG_PIN11 11U |
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180 | #define GPIOG_PIN12 12U |
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181 | #define GPIOG_PIN13 13U |
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182 | #define GPIOG_PIN14 14U |
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183 | #define GPIOG_PIN15 15U |
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184 | |||
185 | /*
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186 | * IO lines assignments.
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187 | */
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188 | #define LINE_LASER_RX PAL_LINE(GPIOA, GPIOA_LASER_RX)
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189 | #define LINE_LASER_TX PAL_LINE(GPIOA, GPIOA_LASER_TX)
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190 | #define LINE_LIGHT_BLANK PAL_LINE(GPIOA, GPIOA_LIGHT_BLANK)
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191 | #define LINE_LIGHT_SCLK PAL_LINE(GPIOA, GPIOA_LIGHT_SCLK)
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192 | #define LINE_LIGHT_MOSI PAL_LINE(GPIOA, GPIOA_LIGHT_MOSI)
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193 | #define LINE_PROG_RX PAL_LINE(GPIOA, GPIOA_PROG_RX)
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194 | #define LINE_PROG_TX PAL_LINE(GPIOA, GPIOA_PROG_TX)
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195 | #define LINE_CAN_RX PAL_LINE(GPIOA, GPIOA_CAN_RX)
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196 | #define LINE_CAN_TX PAL_LINE(GPIOA, GPIOA_CAN_TX)
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197 | #define LINE_SWDIO PAL_LINE(GPIOA, GPIOA_SWDIO)
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198 | #define LINE_SWCLK PAL_LINE(GPIOA, GPIOA_SWCLK)
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199 | |||
200 | #define LINE_LASER_EN PAL_LINE(GPIOB, GPIOB_LASER_EN)
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201 | #define LINE_LASER_OC_N PAL_LINE(GPIOB, GPIOB_LASER_OC_N)
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202 | #define LINE_SYS_UART_DN PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
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203 | #define LINE_WL_GDO2 PAL_LINE(GPIOB, GPIOB_WL_GDO2)
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204 | #define LINE_WL_GDO0 PAL_LINE(GPIOB, GPIOB_WL_GDO0)
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205 | #define LINE_MEM_SCL PAL_LINE(GPIOB, GPIOB_MEM_SCL)
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206 | #define LINE_MEM_SDA PAL_LINE(GPIOB, GPIOB_MEM_SDA)
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207 | #define LINE_WL_SS_N PAL_LINE(GPIOB, GPIOB_WL_SS_N)
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208 | #define LINE_WL_SCLK PAL_LINE(GPIOB, GPIOB_WL_SCLK)
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209 | #define LINE_WL_MISO PAL_LINE(GPIOB, GPIOB_WL_MISO)
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210 | #define LINE_WL_MOSI PAL_LINE(GPIOB, GPIOB_WL_MOSI)
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211 | |||
212 | #define LINE_LIGHT_XLAT PAL_LINE(GPIOC, GPIOC_LIGHT_XLAT)
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213 | #define LINE_SYS_UART_RX PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
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214 | #define LINE_SYS_UART_TX PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
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215 | #define LINE_SYS_PD_N PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
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216 | |||
217 | #define LINE_SYS_INT_N PAL_LINE(GPIOD, GPIOD_SYS_INT_N)
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218 | |||
219 | /*
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220 | * I/O ports initial setup, this configuration is established soon after reset
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221 | * in the initialization code.
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222 | * Please refer to the STM32 Reference Manual for details.
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223 | */
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224 | #define PIN_MODE_INPUT 0U |
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225 | #define PIN_MODE_OUTPUT_2M 2U |
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226 | #define PIN_MODE_OUTPUT_10M 1U |
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227 | #define PIN_MODE_OUTPUT_50M 3U |
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228 | #define PIN_CNF_INPUT_ANALOG 0U |
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229 | #define PIN_CNF_INPUT_FLOATING 1U |
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230 | #define PIN_CNF_INPUT_PULLX 2U |
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231 | #define PIN_CNF_OUTPUT_PUSHPULL 0U |
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232 | #define PIN_CNF_OUTPUT_OPENDRAIN 1U |
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233 | #define PIN_CNF_ALTERNATE_PUSHPULL 2U |
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234 | #define PIN_CNF_ALTERNATE_OPENDRAIN 3U |
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235 | #define PIN_CR(pin, mode, cnf) (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U)) |
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236 | #define PIN_ODR_LOW(n) (0U << (n)) |
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237 | #define PIN_ODR_HIGH(n) (1U << (n)) |
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238 | 37bacabf | Thomas Schöpping | #define PIN_IGNORE(n) (1U << (n)) |
239 | e545e620 | Thomas Schöpping | |
240 | /*
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241 | * GPIOA setup:
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242 | *
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243 | * PA0 - PIN0 (input floating)
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244 | * PA1 - PIN1 (input floating)
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245 | * PA2 - LASER_RX (alternate pushpull high 50MHz)
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246 | * PA3 - LASER_TX (input pullup)
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247 | * PA4 - LIGHT_BLANK (output pushpull high 50MHz)
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248 | * PA5 - LIGHT_SCLK (alternate pushpull 50MHz)
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249 | * PA6 - PIN6 (input foating)
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250 | * PA7 - LIGHT_MOSI (alternate pushpull 50MHz)
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251 | * PA8 - PIN8 (input floating)
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252 | * PA9 - PROG_RX (alternate pushpull 50MHz)
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253 | * PA10 - PROG_TX (input pullup)
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254 | * PA11 - CAN_RX (input floating)
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255 | * PA12 - CAN_TX (alternate pushpull 50MHz)
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256 | * PA13 - SWDIO (input pullup)
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257 | * PA14 - SWCLK (input pullup)
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258 | * PA15 - PIN15 (input floating)
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259 | */
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260 | 37bacabf | Thomas Schöpping | #define VAL_GPIOAIGN 0 |
261 | e545e620 | Thomas Schöpping | #define VAL_GPIOACRL (PIN_CR(GPIOA_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
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262 | PIN_CR(GPIOA_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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263 | PIN_CR(GPIOA_LASER_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \ |
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264 | PIN_CR(GPIOA_LASER_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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265 | PIN_CR(GPIOA_LIGHT_BLANK, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) | \ |
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266 | PIN_CR(GPIOA_LIGHT_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \ |
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267 | PIN_CR(GPIOA_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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268 | PIN_CR(GPIOA_LIGHT_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL)) |
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269 | #define VAL_GPIOACRH (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
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270 | PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \ |
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271 | PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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272 | PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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273 | PIN_CR(GPIOA_CAN_TX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \ |
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274 | PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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275 | PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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276 | PIN_CR(GPIOA_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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277 | #define VAL_GPIOAODR (PIN_ODR_LOW(GPIOA_PIN0) | \
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278 | PIN_ODR_LOW(GPIOA_PIN1) | \ |
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279 | PIN_ODR_HIGH(GPIOA_LASER_RX) | \ |
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280 | PIN_ODR_HIGH(GPIOA_LASER_TX) | \ |
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281 | PIN_ODR_HIGH(GPIOA_LIGHT_BLANK) | \ |
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282 | PIN_ODR_HIGH(GPIOA_LIGHT_SCLK) | \ |
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283 | PIN_ODR_LOW(GPIOA_PIN6) | \ |
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284 | PIN_ODR_HIGH(GPIOA_LIGHT_MOSI) | \ |
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285 | PIN_ODR_LOW(GPIOA_PIN8) | \ |
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286 | PIN_ODR_HIGH(GPIOA_PROG_RX) | \ |
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287 | PIN_ODR_HIGH(GPIOA_PROG_TX) | \ |
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288 | PIN_ODR_HIGH(GPIOA_CAN_RX) | \ |
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289 | PIN_ODR_HIGH(GPIOA_CAN_TX) | \ |
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290 | PIN_ODR_HIGH(GPIOA_SWDIO) | \ |
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291 | PIN_ODR_HIGH(GPIOA_SWCLK) | \ |
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292 | PIN_ODR_LOW(GPIOA_PIN15)) |
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293 | |||
294 | /*
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295 | * GPIOB setup:
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296 | *
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297 | * PB0 - PIN0 (input floating)
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298 | * PB1 - PIN1 (input floating)
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299 | * PB2 - LASER_EN (output pushpull low 50MHz)
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300 | * PB3 - PIN3 (input floating)
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301 | * PB4 - PIN4 (input floating)
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302 | * PB5 - LASER_OC_N (input floating)
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303 | * PB6 - SYS_UART_DN (output opendrain high 50MHz)
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304 | * PB7 - PIN7 (input foating)
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305 | * PB8 - WL_GDO2 (input pullup)
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306 | * PB9 - WL_GDO0 (input pullup)
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307 | * PB10 - MEM_SCL (alternate opendrain 50MHz)
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308 | * PB11 - MEM_SDA (alternate opendrain 50MHz)
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309 | * PB12 - WL_SS_N (output pushpull high 50MHz)
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310 | * PB13 - WL_SCLK (alternate pushpull 50MHz)
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311 | * PB14 - WL_MISO (input pullup)
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312 | * PB15 - WL_MOSI (alternate pushpull 50MHz)
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313 | */
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314 | 37bacabf | Thomas Schöpping | #define VAL_GPIOBIGN (PIN_IGNORE(GPIOB_SYS_UART_DN)) & 0 |
315 | e545e620 | Thomas Schöpping | #define VAL_GPIOBCRL (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
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316 | PIN_CR(GPIOB_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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317 | PIN_CR(GPIOB_LASER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) | \ |
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318 | PIN_CR(GPIOB_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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319 | PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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320 | PIN_CR(GPIOB_LASER_OC_N, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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321 | PIN_CR(GPIOB_SYS_UART_DN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) | \ |
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322 | PIN_CR(GPIOB_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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323 | #define VAL_GPIOBCRH (PIN_CR(GPIOB_WL_GDO2, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \
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324 | PIN_CR(GPIOB_WL_GDO0, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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325 | PIN_CR(GPIOB_MEM_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \ |
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326 | PIN_CR(GPIOB_MEM_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \ |
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327 | PIN_CR(GPIOB_WL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) | \ |
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328 | PIN_CR(GPIOB_WL_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \ |
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329 | PIN_CR(GPIOB_WL_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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330 | PIN_CR(GPIOB_WL_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL)) |
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331 | #define VAL_GPIOBODR (PIN_ODR_LOW(GPIOB_PIN0) | \
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332 | PIN_ODR_LOW(GPIOB_PIN1) | \ |
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333 | PIN_ODR_LOW(GPIOB_LASER_EN) | \ |
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334 | PIN_ODR_LOW(GPIOB_PIN3) | \ |
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335 | PIN_ODR_LOW(GPIOB_PIN4) | \ |
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336 | PIN_ODR_HIGH(GPIOB_LASER_OC_N) | \ |
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337 | PIN_ODR_HIGH(GPIOB_SYS_UART_DN) | \ |
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338 | PIN_ODR_LOW(GPIOB_PIN7) | \ |
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339 | PIN_ODR_HIGH(GPIOB_WL_GDO2) | \ |
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340 | PIN_ODR_HIGH(GPIOB_WL_GDO0) | \ |
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341 | PIN_ODR_HIGH(GPIOB_MEM_SCL) | \ |
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342 | PIN_ODR_HIGH(GPIOB_MEM_SDA) | \ |
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343 | PIN_ODR_HIGH(GPIOB_WL_SS_N) | \ |
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344 | PIN_ODR_HIGH(GPIOB_WL_SCLK) | \ |
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345 | PIN_ODR_HIGH(GPIOB_WL_MISO) | \ |
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346 | PIN_ODR_HIGH(GPIOB_WL_MOSI)) |
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347 | |||
348 | /*
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349 | * GPIOC setup:
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350 | *
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351 | * PC0 - PIN0 (input floating)
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352 | * PC1 - PIN1 (input floating)
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353 | * PC2 - PIN2 (input floating)
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354 | * PC3 - PIN3 (input floating)
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355 | * PC4 - LIGHT_XLAT (output pushpull high 10MHz)
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356 | * PC5 - PIN5 (input floating)
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357 | * PC6 - PIN6 (input floating)
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358 | * PC7 - PIN7 (input floating)
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359 | * PC8 - PIN8 (input floating)
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360 | * PC9 - PIN9 (input floating)
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361 | * PC10 - SYS_UART_RX (input pullup)
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362 | * PC11 - SYS_UART_TX (input pullup)
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363 | * PC12 - PIN12 (input floating)
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364 | * PC13 - PIN13 (input floating)
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365 | * PC14 - SYS_PD_N (output opendrain high 50MHz)
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366 | * PC15 - PIN15 (input floating)
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367 | */
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368 | 37bacabf | Thomas Schöpping | #define VAL_GPIOCIGN (PIN_IGNORE(GPIOC_SYS_PD_N)) & 0 |
369 | e545e620 | Thomas Schöpping | #define VAL_GPIOCCRL (PIN_CR(GPIOC_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
|
370 | PIN_CR(GPIOC_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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371 | PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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372 | PIN_CR(GPIOC_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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373 | PIN_CR(GPIOC_LIGHT_XLAT, PIN_MODE_OUTPUT_10M, PIN_CNF_OUTPUT_PUSHPULL) | \ |
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374 | PIN_CR(GPIOC_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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375 | PIN_CR(GPIOC_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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376 | PIN_CR(GPIOC_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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377 | #define VAL_GPIOCCRH (PIN_CR(GPIOC_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
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378 | PIN_CR(GPIOC_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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379 | PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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380 | PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) | \ |
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381 | PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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382 | PIN_CR(GPIOC_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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383 | PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) | \ |
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384 | PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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385 | #define VAL_GPIOCODR (PIN_ODR_LOW(GPIOC_PIN0) | \
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386 | PIN_ODR_LOW(GPIOC_PIN1) | \ |
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387 | PIN_ODR_LOW(GPIOC_PIN2) | \ |
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388 | PIN_ODR_LOW(GPIOC_PIN3) | \ |
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389 | PIN_ODR_LOW(GPIOC_LIGHT_XLAT) | \ |
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390 | PIN_ODR_LOW(GPIOC_PIN5) | \ |
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391 | PIN_ODR_LOW(GPIOC_PIN6) | \ |
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392 | PIN_ODR_LOW(GPIOC_PIN7) | \ |
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393 | PIN_ODR_LOW(GPIOC_PIN8) | \ |
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394 | PIN_ODR_LOW(GPIOC_PIN9) | \ |
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395 | PIN_ODR_HIGH(GPIOC_SYS_UART_RX) | \ |
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396 | PIN_ODR_HIGH(GPIOC_SYS_UART_TX) | \ |
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397 | PIN_ODR_LOW(GPIOC_PIN12) | \ |
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398 | PIN_ODR_LOW(GPIOC_PIN13) | \ |
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399 | PIN_ODR_HIGH(GPIOC_SYS_PD_N) | \ |
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400 | PIN_ODR_LOW(GPIOC_PIN15)) |
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401 | |||
402 | /*
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403 | * GPIOD setup:
|
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404 | *
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405 | * PD0 - OSC_IN (input floating)
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406 | * PD1 - OSC_OUT (input floating)
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407 | * PD2 - SYS_INT_N (output opendrain low 50MHz)
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408 | * PD3 - PIN3 (input floating)
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409 | * PD4 - PIN4 (input floating)
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410 | * PD5 - PIN5 (input floating)
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411 | * PD6 - PIN6 (input floating)
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412 | * PD7 - PIN7 (input floating)
|
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413 | * PD8 - PIN8 (input floating)
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414 | * PD9 - PIN9 (input floating)
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415 | * PD10 - PIN10 (input floating)
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416 | * PD11 - PIN11 (input floating)
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417 | * PD12 - PIN12 (input floating)
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418 | * PD13 - PIN13 (input floating)
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419 | * PD14 - PIN14 (input floating)
|
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420 | * PD15 - PIN15 (input floating)
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421 | */
|
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422 | 37bacabf | Thomas Schöpping | #define VAL_GPIODIGN (PIN_IGNORE(GPIOD_SYS_INT_N)) & 0 |
423 | e545e620 | Thomas Schöpping | #define VAL_GPIODCRL (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
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424 | PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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425 | PIN_CR(GPIOD_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) | \ |
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426 | PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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427 | PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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428 | PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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429 | PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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430 | PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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431 | #define VAL_GPIODCRH (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
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432 | PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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433 | PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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434 | PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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435 | PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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436 | PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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437 | PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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438 | PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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439 | #define VAL_GPIODODR (PIN_ODR_HIGH(GPIOD_OSC_IN) | \
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440 | PIN_ODR_HIGH(GPIOD_OSC_OUT) | \ |
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441 | PIN_ODR_LOW(GPIOD_SYS_INT_N) | \ |
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442 | PIN_ODR_LOW(GPIOD_PIN3) | \ |
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443 | PIN_ODR_LOW(GPIOD_PIN4) | \ |
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444 | PIN_ODR_LOW(GPIOD_PIN5) | \ |
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445 | PIN_ODR_LOW(GPIOD_PIN6) | \ |
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446 | PIN_ODR_LOW(GPIOD_PIN7) | \ |
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447 | PIN_ODR_LOW(GPIOD_PIN8) | \ |
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448 | PIN_ODR_LOW(GPIOD_PIN9) | \ |
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449 | PIN_ODR_LOW(GPIOD_PIN10) | \ |
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450 | PIN_ODR_LOW(GPIOD_PIN11) | \ |
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451 | PIN_ODR_LOW(GPIOD_PIN12) | \ |
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452 | PIN_ODR_LOW(GPIOD_PIN13) | \ |
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453 | PIN_ODR_LOW(GPIOD_PIN14) | \ |
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454 | PIN_ODR_LOW(GPIOD_PIN15)) |
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455 | |||
456 | /*
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457 | * GPIOE setup:
|
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458 | *
|
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459 | * PE0 - PIN0 (input floating)
|
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460 | * PE1 - PIN1 (input floating)
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461 | * PE2 - PIN2 (input floating)
|
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462 | * PE3 - PIN3 (input floating)
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463 | * PE4 - PIN4 (input floating)
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464 | * PE5 - PIN5 (input floating)
|
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465 | * PE6 - PIN6 (input floating)
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466 | * PE7 - PIN7 (input floating)
|
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467 | * PE8 - PIN8 (input floating)
|
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468 | * PE9 - PIN9 (input floating)
|
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469 | * PE10 - PIN10 (input floating)
|
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470 | * PE11 - PIN11 (input floating)
|
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471 | * PE12 - PIN12 (input floating)
|
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472 | * PE13 - PIN13 (input floating)
|
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473 | * PE14 - PIN14 (input floating)
|
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474 | * PE15 - PIN15 (input floating)
|
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475 | */
|
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476 | 37bacabf | Thomas Schöpping | #define VAL_GPIOEIGN 0 |
477 | e545e620 | Thomas Schöpping | #define VAL_GPIOECRL (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
|
478 | PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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479 | PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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480 | PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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481 | PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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482 | PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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483 | PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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484 | PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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485 | #define VAL_GPIOECRH (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
|
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486 | PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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487 | PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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488 | PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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489 | PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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490 | PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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491 | PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
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492 | PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
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493 | #define VAL_GPIOEODR (PIN_ODR_LOW(GPIOE_PIN0) | \
|
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494 | PIN_ODR_LOW(GPIOE_PIN1) | \ |
||
495 | PIN_ODR_LOW(GPIOE_PIN2) | \ |
||
496 | PIN_ODR_LOW(GPIOE_PIN3) | \ |
||
497 | PIN_ODR_LOW(GPIOE_PIN4) | \ |
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498 | PIN_ODR_LOW(GPIOE_PIN5) | \ |
||
499 | PIN_ODR_LOW(GPIOE_PIN6) | \ |
||
500 | PIN_ODR_LOW(GPIOE_PIN7) | \ |
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501 | PIN_ODR_LOW(GPIOE_PIN8) | \ |
||
502 | PIN_ODR_LOW(GPIOE_PIN9) | \ |
||
503 | PIN_ODR_LOW(GPIOE_PIN10) | \ |
||
504 | PIN_ODR_LOW(GPIOE_PIN11) | \ |
||
505 | PIN_ODR_LOW(GPIOE_PIN12) | \ |
||
506 | PIN_ODR_LOW(GPIOE_PIN13) | \ |
||
507 | PIN_ODR_LOW(GPIOE_PIN14) | \ |
||
508 | PIN_ODR_LOW(GPIOE_PIN15)) |
||
509 | |||
510 | /*
|
||
511 | * GPIOF setup:
|
||
512 | *
|
||
513 | * PF0 - PIN0 (input floating)
|
||
514 | * PF1 - PIN1 (input floating)
|
||
515 | * PF2 - PIN2 (input floating)
|
||
516 | * PF3 - PIN3 (input floating)
|
||
517 | * PF4 - PIN4 (input floating)
|
||
518 | * PF5 - PIN5 (input floating)
|
||
519 | * PF6 - PIN6 (input floating)
|
||
520 | * PF7 - PIN7 (input floating)
|
||
521 | * PF8 - PIN8 (input floating)
|
||
522 | * PF9 - PIN9 (input floating)
|
||
523 | * PF10 - PIN10 (input floating)
|
||
524 | * PF11 - PIN11 (input floating)
|
||
525 | * PF12 - PIN12 (input floating)
|
||
526 | * PF13 - PIN13 (input floating)
|
||
527 | * PF14 - PIN14 (input floating)
|
||
528 | * PF15 - PIN15 (input floating)
|
||
529 | */
|
||
530 | 37bacabf | Thomas Schöpping | #define VAL_GPIOFIGN 0 |
531 | e545e620 | Thomas Schöpping | #define VAL_GPIOFCRL (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
|
532 | PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
533 | PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
534 | PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
535 | PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
536 | PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
537 | PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
538 | PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
||
539 | #define VAL_GPIOFCRH (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
|
||
540 | PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
541 | PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
542 | PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
543 | PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
544 | PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
545 | PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
546 | PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
||
547 | #define VAL_GPIOFODR (PIN_ODR_LOW(GPIOF_PIN0) | \
|
||
548 | PIN_ODR_LOW(GPIOF_PIN1) | \ |
||
549 | PIN_ODR_LOW(GPIOF_PIN2) | \ |
||
550 | PIN_ODR_LOW(GPIOF_PIN3) | \ |
||
551 | PIN_ODR_LOW(GPIOF_PIN4) | \ |
||
552 | PIN_ODR_LOW(GPIOF_PIN5) | \ |
||
553 | PIN_ODR_LOW(GPIOF_PIN6) | \ |
||
554 | PIN_ODR_LOW(GPIOF_PIN7) | \ |
||
555 | PIN_ODR_LOW(GPIOF_PIN8) | \ |
||
556 | PIN_ODR_LOW(GPIOF_PIN9) | \ |
||
557 | PIN_ODR_LOW(GPIOF_PIN10) | \ |
||
558 | PIN_ODR_LOW(GPIOF_PIN11) | \ |
||
559 | PIN_ODR_LOW(GPIOF_PIN12) | \ |
||
560 | PIN_ODR_LOW(GPIOF_PIN13) | \ |
||
561 | PIN_ODR_LOW(GPIOF_PIN14) | \ |
||
562 | PIN_ODR_LOW(GPIOF_PIN15)) |
||
563 | |||
564 | /*
|
||
565 | * GPIOG setup:
|
||
566 | *
|
||
567 | * PG0 - PIN0 (input floating)
|
||
568 | * PG1 - PIN1 (input floating)
|
||
569 | * PG2 - PIN2 (input floating)
|
||
570 | * PG3 - PIN3 (input floating)
|
||
571 | * PG4 - PIN4 (input floating)
|
||
572 | * PG5 - PIN5 (input floating)
|
||
573 | * PG6 - PIN6 (input floating)
|
||
574 | * PG7 - PIN7 (input floating)
|
||
575 | * PG8 - PIN8 (input floating)
|
||
576 | * PG9 - PIN9 (input floating)
|
||
577 | * PG10 - PIN10 (input floating)
|
||
578 | * PG11 - PIN11 (input floating)
|
||
579 | * PG12 - PIN12 (input floating)
|
||
580 | * PG13 - PIN13 (input floating)
|
||
581 | * PG14 - PIN14 (input floating)
|
||
582 | * PG15 - PIN15 (input floating)
|
||
583 | */
|
||
584 | 37bacabf | Thomas Schöpping | #define VAL_GPIOGIGN 0 |
585 | e545e620 | Thomas Schöpping | #define VAL_GPIOGCRL (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
|
586 | PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
587 | PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
588 | PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
589 | PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
590 | PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
591 | PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
592 | PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
||
593 | #define VAL_GPIOGCRH (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \
|
||
594 | PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
595 | PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
596 | PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
597 | PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
598 | PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
599 | PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) | \ |
||
600 | PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING)) |
||
601 | #define VAL_GPIOGODR (PIN_ODR_LOW(GPIOG_PIN0) | \
|
||
602 | PIN_ODR_LOW(GPIOG_PIN1) | \ |
||
603 | PIN_ODR_LOW(GPIOG_PIN2) | \ |
||
604 | PIN_ODR_LOW(GPIOG_PIN3) | \ |
||
605 | PIN_ODR_LOW(GPIOG_PIN4) | \ |
||
606 | PIN_ODR_LOW(GPIOG_PIN5) | \ |
||
607 | PIN_ODR_LOW(GPIOG_PIN6) | \ |
||
608 | PIN_ODR_LOW(GPIOG_PIN7) | \ |
||
609 | PIN_ODR_LOW(GPIOG_PIN8) | \ |
||
610 | PIN_ODR_LOW(GPIOG_PIN9) | \ |
||
611 | PIN_ODR_LOW(GPIOG_PIN10) | \ |
||
612 | PIN_ODR_LOW(GPIOG_PIN11) | \ |
||
613 | PIN_ODR_LOW(GPIOG_PIN12) | \ |
||
614 | PIN_ODR_LOW(GPIOG_PIN13) | \ |
||
615 | PIN_ODR_LOW(GPIOG_PIN14) | \ |
||
616 | PIN_ODR_LOW(GPIOG_PIN15)) |
||
617 | |||
618 | #if !defined(_FROM_ASM_)
|
||
619 | #ifdef __cplusplus
|
||
620 | extern "C" { |
||
621 | #endif
|
||
622 | void boardInit(void); |
||
623 | #ifdef __cplusplus
|
||
624 | } |
||
625 | #endif
|
||
626 | #endif /* _FROM_ASM_ */ |
||
627 | |||
628 | 6ff06bbf | Thomas Schöpping | #endif /* BOARD_H */ |
629 | 53710ca3 | Marc Rothmann | |
630 | /** @} */ |